diff options
Diffstat (limited to 'include/asm-sh/cpu-sh4/ubc.h')
| -rw-r--r-- | include/asm-sh/cpu-sh4/ubc.h | 64 |
1 files changed, 0 insertions, 64 deletions
diff --git a/include/asm-sh/cpu-sh4/ubc.h b/include/asm-sh/cpu-sh4/ubc.h deleted file mode 100644 index c86e17050935..000000000000 --- a/include/asm-sh/cpu-sh4/ubc.h +++ /dev/null | |||
| @@ -1,64 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * include/asm-sh/cpu-sh4/ubc.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 1999 Niibe Yutaka | ||
| 5 | * Copyright (C) 2003 Paul Mundt | ||
| 6 | * Copyright (C) 2006 Lineo Solutions Inc. support SH4A UBC | ||
| 7 | * | ||
| 8 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 9 | * License. See the file "COPYING" in the main directory of this archive | ||
| 10 | * for more details. | ||
| 11 | */ | ||
| 12 | #ifndef __ASM_CPU_SH4_UBC_H | ||
| 13 | #define __ASM_CPU_SH4_UBC_H | ||
| 14 | |||
| 15 | #if defined(CONFIG_CPU_SH4A) | ||
| 16 | #define UBC_CBR0 0xff200000 | ||
| 17 | #define UBC_CRR0 0xff200004 | ||
| 18 | #define UBC_CAR0 0xff200008 | ||
| 19 | #define UBC_CAMR0 0xff20000c | ||
| 20 | #define UBC_CBR1 0xff200020 | ||
| 21 | #define UBC_CRR1 0xff200024 | ||
| 22 | #define UBC_CAR1 0xff200028 | ||
| 23 | #define UBC_CAMR1 0xff20002c | ||
| 24 | #define UBC_CDR1 0xff200030 | ||
| 25 | #define UBC_CDMR1 0xff200034 | ||
| 26 | #define UBC_CETR1 0xff200038 | ||
| 27 | #define UBC_CCMFR 0xff200600 | ||
| 28 | #define UBC_CBCR 0xff200620 | ||
| 29 | |||
| 30 | /* CBR */ | ||
| 31 | #define UBC_CBR_AIE (0x01<<30) | ||
| 32 | #define UBC_CBR_ID_INST (0x01<<4) | ||
| 33 | #define UBC_CBR_RW_READ (0x01<<1) | ||
| 34 | #define UBC_CBR_CE (0x01) | ||
| 35 | |||
| 36 | #define UBC_CBR_AIV_MASK (0x00FF0000) | ||
| 37 | #define UBC_CBR_AIV_SHIFT (16) | ||
| 38 | #define UBC_CBR_AIV_SET(asid) (((asid)<<UBC_CBR_AIV_SHIFT) & UBC_CBR_AIV_MASK) | ||
| 39 | |||
| 40 | #define UBC_CBR_INIT 0x20000000 | ||
| 41 | |||
| 42 | /* CRR */ | ||
| 43 | #define UBC_CRR_RES (0x01<<13) | ||
| 44 | #define UBC_CRR_PCB (0x01<<1) | ||
| 45 | #define UBC_CRR_BIE (0x01) | ||
| 46 | |||
| 47 | #define UBC_CRR_INIT 0x00002000 | ||
| 48 | |||
| 49 | #else /* CONFIG_CPU_SH4 */ | ||
| 50 | #define UBC_BARA 0xff200000 | ||
| 51 | #define UBC_BAMRA 0xff200004 | ||
| 52 | #define UBC_BBRA 0xff200008 | ||
| 53 | #define UBC_BASRA 0xff000014 | ||
| 54 | #define UBC_BARB 0xff20000c | ||
| 55 | #define UBC_BAMRB 0xff200010 | ||
| 56 | #define UBC_BBRB 0xff200014 | ||
| 57 | #define UBC_BASRB 0xff000018 | ||
| 58 | #define UBC_BDRB 0xff200018 | ||
| 59 | #define UBC_BDMRB 0xff20001c | ||
| 60 | #define UBC_BRCR 0xff200020 | ||
| 61 | #endif /* CONFIG_CPU_SH4 */ | ||
| 62 | |||
| 63 | #endif /* __ASM_CPU_SH4_UBC_H */ | ||
| 64 | |||