diff options
Diffstat (limited to 'include/asm-sh/cpu-sh2')
-rw-r--r-- | include/asm-sh/cpu-sh2/irq.h | 84 |
1 files changed, 0 insertions, 84 deletions
diff --git a/include/asm-sh/cpu-sh2/irq.h b/include/asm-sh/cpu-sh2/irq.h deleted file mode 100644 index 4032a14d0f41..000000000000 --- a/include/asm-sh/cpu-sh2/irq.h +++ /dev/null | |||
@@ -1,84 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH2_IRQ_H | ||
2 | #define __ASM_SH_CPU_SH2_IRQ_H | ||
3 | |||
4 | /* | ||
5 | * | ||
6 | * linux/include/asm-sh/cpu-sh2/irq.h | ||
7 | * | ||
8 | * Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi | ||
9 | * Copyright (C) 2000 Kazumoto Kojima | ||
10 | * Copyright (C) 2003 Paul Mundt | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/config.h> | ||
15 | |||
16 | #if defined(CONFIG_CPU_SUBTYPE_SH7044) | ||
17 | #define INTC_IPRA 0xffff8348UL | ||
18 | #define INTC_IPRB 0xffff834aUL | ||
19 | #define INTC_IPRC 0xffff834cUL | ||
20 | #define INTC_IPRD 0xffff834eUL | ||
21 | #define INTC_IPRE 0xffff8350UL | ||
22 | #define INTC_IPRF 0xffff8352UL | ||
23 | #define INTC_IPRG 0xffff8354UL | ||
24 | #define INTC_IPRH 0xffff8356UL | ||
25 | |||
26 | #define INTC_ICR 0xffff8358UL | ||
27 | #define INTC_ISR 0xffff835aUL | ||
28 | #elif defined(CONFIG_CPU_SUBTYPE_SH7604) | ||
29 | #define INTC_IPRA 0xfffffee2UL | ||
30 | #define INTC_IPRB 0xfffffe60UL | ||
31 | |||
32 | #define INTC_VCRA 0xfffffe62UL | ||
33 | #define INTC_VCRB 0xfffffe64UL | ||
34 | #define INTC_VCRC 0xfffffe66UL | ||
35 | #define INTC_VCRD 0xfffffe68UL | ||
36 | |||
37 | #define INTC_VCRWDT 0xfffffee4UL | ||
38 | #define INTC_VCRDIV 0xffffff0cUL | ||
39 | #define INTC_VCRDMA0 0xffffffa0UL | ||
40 | #define INTC_VCRDMA1 0xffffffa8UL | ||
41 | |||
42 | #define INTC_ICR 0xfffffee0UL | ||
43 | #elif defined(CONFIG_CPU_SUBTYPE_SH7619) | ||
44 | #define INTC_IPRA 0xf8140006UL | ||
45 | #define INTC_IPRB 0xf8140008UL | ||
46 | #define INTC_IPRC 0xf8080000UL | ||
47 | #define INTC_IPRD 0xf8080002UL | ||
48 | #define INTC_IPRE 0xf8080004UL | ||
49 | #define INTC_IPRF 0xf8080006UL | ||
50 | #define INTC_IPRG 0xf8080008UL | ||
51 | |||
52 | #define INTC_ICR0 0xf8140000UL | ||
53 | #define INTC_IRQCR 0xf8140002UL | ||
54 | #define INTC_IRQSR 0xf8140004UL | ||
55 | |||
56 | #define CMI0_IRQ 86 | ||
57 | #define CMI1_IRQ 87 | ||
58 | |||
59 | #define SCIF_ERI_IRQ 88 | ||
60 | #define SCIF_RXI_IRQ 89 | ||
61 | #define SCIF_BRI_IRQ 90 | ||
62 | #define SCIF_TXI_IRQ 91 | ||
63 | #define SCIF_IPR_ADDR INTC_IPRD | ||
64 | #define SCIF_IPR_POS 3 | ||
65 | #define SCIF_PRIORITY 3 | ||
66 | |||
67 | #define SCIF1_ERI_IRQ 92 | ||
68 | #define SCIF1_RXI_IRQ 93 | ||
69 | #define SCIF1_BRI_IRQ 94 | ||
70 | #define SCIF1_TXI_IRQ 95 | ||
71 | #define SCIF1_IPR_ADDR INTC_IPRD | ||
72 | #define SCIF1_IPR_POS 2 | ||
73 | #define SCIF1_PRIORITY 3 | ||
74 | |||
75 | #define SCIF2_BRI_IRQ 96 | ||
76 | #define SCIF2_RXI_IRQ 97 | ||
77 | #define SCIF2_ERI_IRQ 98 | ||
78 | #define SCIF2_TXI_IRQ 99 | ||
79 | #define SCIF2_IPR_ADDR INTC_IPRD | ||
80 | #define SCIF2_IPR_POS 1 | ||
81 | #define SCIF2_PRIORITY 3 | ||
82 | #endif | ||
83 | |||
84 | #endif /* __ASM_SH_CPU_SH2_IRQ_H */ | ||