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-rw-r--r--include/asm-sh/bitops.h117
1 files changed, 32 insertions, 85 deletions
diff --git a/include/asm-sh/bitops.h b/include/asm-sh/bitops.h
index df805f20b267..b6ba5a60dec2 100644
--- a/include/asm-sh/bitops.h
+++ b/include/asm-sh/bitops.h
@@ -11,100 +11,22 @@
11/* For __swab32 */ 11/* For __swab32 */
12#include <asm/byteorder.h> 12#include <asm/byteorder.h>
13 13
14static inline void set_bit(int nr, volatile void * addr) 14#ifdef CONFIG_GUSA_RB
15{ 15#include <asm/bitops-grb.h>
16 int mask; 16#else
17 volatile unsigned int *a = addr; 17#include <asm/bitops-irq.h>
18 unsigned long flags; 18#endif
19 19
20 a += nr >> 5;
21 mask = 1 << (nr & 0x1f);
22 local_irq_save(flags);
23 *a |= mask;
24 local_irq_restore(flags);
25}
26 20
27/* 21/*
28 * clear_bit() doesn't provide any barrier for the compiler. 22 * clear_bit() doesn't provide any barrier for the compiler.
29 */ 23 */
30#define smp_mb__before_clear_bit() barrier() 24#define smp_mb__before_clear_bit() barrier()
31#define smp_mb__after_clear_bit() barrier() 25#define smp_mb__after_clear_bit() barrier()
32static inline void clear_bit(int nr, volatile void * addr)
33{
34 int mask;
35 volatile unsigned int *a = addr;
36 unsigned long flags;
37
38 a += nr >> 5;
39 mask = 1 << (nr & 0x1f);
40 local_irq_save(flags);
41 *a &= ~mask;
42 local_irq_restore(flags);
43}
44
45static inline void change_bit(int nr, volatile void * addr)
46{
47 int mask;
48 volatile unsigned int *a = addr;
49 unsigned long flags;
50
51 a += nr >> 5;
52 mask = 1 << (nr & 0x1f);
53 local_irq_save(flags);
54 *a ^= mask;
55 local_irq_restore(flags);
56}
57
58static inline int test_and_set_bit(int nr, volatile void * addr)
59{
60 int mask, retval;
61 volatile unsigned int *a = addr;
62 unsigned long flags;
63
64 a += nr >> 5;
65 mask = 1 << (nr & 0x1f);
66 local_irq_save(flags);
67 retval = (mask & *a) != 0;
68 *a |= mask;
69 local_irq_restore(flags);
70
71 return retval;
72}
73
74static inline int test_and_clear_bit(int nr, volatile void * addr)
75{
76 int mask, retval;
77 volatile unsigned int *a = addr;
78 unsigned long flags;
79
80 a += nr >> 5;
81 mask = 1 << (nr & 0x1f);
82 local_irq_save(flags);
83 retval = (mask & *a) != 0;
84 *a &= ~mask;
85 local_irq_restore(flags);
86
87 return retval;
88}
89
90static inline int test_and_change_bit(int nr, volatile void * addr)
91{
92 int mask, retval;
93 volatile unsigned int *a = addr;
94 unsigned long flags;
95
96 a += nr >> 5;
97 mask = 1 << (nr & 0x1f);
98 local_irq_save(flags);
99 retval = (mask & *a) != 0;
100 *a ^= mask;
101 local_irq_restore(flags);
102
103 return retval;
104}
105 26
106#include <asm-generic/bitops/non-atomic.h> 27#include <asm-generic/bitops/non-atomic.h>
107 28
29#ifdef CONFIG_SUPERH32
108static inline unsigned long ffz(unsigned long word) 30static inline unsigned long ffz(unsigned long word)
109{ 31{
110 unsigned long result; 32 unsigned long result;
@@ -138,6 +60,31 @@ static inline unsigned long __ffs(unsigned long word)
138 : "t"); 60 : "t");
139 return result; 61 return result;
140} 62}
63#else
64static inline unsigned long ffz(unsigned long word)
65{
66 unsigned long result, __d2, __d3;
67
68 __asm__("gettr tr0, %2\n\t"
69 "pta $+32, tr0\n\t"
70 "andi %1, 1, %3\n\t"
71 "beq %3, r63, tr0\n\t"
72 "pta $+4, tr0\n"
73 "0:\n\t"
74 "shlri.l %1, 1, %1\n\t"
75 "addi %0, 1, %0\n\t"
76 "andi %1, 1, %3\n\t"
77 "beqi %3, 1, tr0\n"
78 "1:\n\t"
79 "ptabs %2, tr0\n\t"
80 : "=r" (result), "=r" (word), "=r" (__d2), "=r" (__d3)
81 : "0" (0L), "1" (word));
82
83 return result;
84}
85
86#include <asm-generic/bitops/__ffs.h>
87#endif
141 88
142#include <asm-generic/bitops/find.h> 89#include <asm-generic/bitops/find.h>
143#include <asm-generic/bitops/ffs.h> 90#include <asm-generic/bitops/ffs.h>