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-rw-r--r--include/asm-s390/system.h384
1 files changed, 145 insertions, 239 deletions
diff --git a/include/asm-s390/system.h b/include/asm-s390/system.h
index 71a0732cd518..ccbafe4bf2cb 100644
--- a/include/asm-s390/system.h
+++ b/include/asm-s390/system.h
@@ -23,74 +23,68 @@ struct task_struct;
23 23
24extern struct task_struct *__switch_to(void *, void *); 24extern struct task_struct *__switch_to(void *, void *);
25 25
26#ifdef __s390x__
27#define __FLAG_SHIFT 56
28#else /* ! __s390x__ */
29#define __FLAG_SHIFT 24
30#endif /* ! __s390x__ */
31
32static inline void save_fp_regs(s390_fp_regs *fpregs) 26static inline void save_fp_regs(s390_fp_regs *fpregs)
33{ 27{
34 asm volatile ( 28 asm volatile(
35 " std 0,8(%1)\n" 29 " std 0,8(%1)\n"
36 " std 2,24(%1)\n" 30 " std 2,24(%1)\n"
37 " std 4,40(%1)\n" 31 " std 4,40(%1)\n"
38 " std 6,56(%1)" 32 " std 6,56(%1)"
39 : "=m" (*fpregs) : "a" (fpregs), "m" (*fpregs) : "memory" ); 33 : "=m" (*fpregs) : "a" (fpregs), "m" (*fpregs) : "memory");
40 if (!MACHINE_HAS_IEEE) 34 if (!MACHINE_HAS_IEEE)
41 return; 35 return;
42 asm volatile( 36 asm volatile(
43 " stfpc 0(%1)\n" 37 " stfpc 0(%1)\n"
44 " std 1,16(%1)\n" 38 " std 1,16(%1)\n"
45 " std 3,32(%1)\n" 39 " std 3,32(%1)\n"
46 " std 5,48(%1)\n" 40 " std 5,48(%1)\n"
47 " std 7,64(%1)\n" 41 " std 7,64(%1)\n"
48 " std 8,72(%1)\n" 42 " std 8,72(%1)\n"
49 " std 9,80(%1)\n" 43 " std 9,80(%1)\n"
50 " std 10,88(%1)\n" 44 " std 10,88(%1)\n"
51 " std 11,96(%1)\n" 45 " std 11,96(%1)\n"
52 " std 12,104(%1)\n" 46 " std 12,104(%1)\n"
53 " std 13,112(%1)\n" 47 " std 13,112(%1)\n"
54 " std 14,120(%1)\n" 48 " std 14,120(%1)\n"
55 " std 15,128(%1)\n" 49 " std 15,128(%1)\n"
56 : "=m" (*fpregs) : "a" (fpregs), "m" (*fpregs) : "memory" ); 50 : "=m" (*fpregs) : "a" (fpregs), "m" (*fpregs) : "memory");
57} 51}
58 52
59static inline void restore_fp_regs(s390_fp_regs *fpregs) 53static inline void restore_fp_regs(s390_fp_regs *fpregs)
60{ 54{
61 asm volatile ( 55 asm volatile(
62 " ld 0,8(%0)\n" 56 " ld 0,8(%0)\n"
63 " ld 2,24(%0)\n" 57 " ld 2,24(%0)\n"
64 " ld 4,40(%0)\n" 58 " ld 4,40(%0)\n"
65 " ld 6,56(%0)" 59 " ld 6,56(%0)"
66 : : "a" (fpregs), "m" (*fpregs) ); 60 : : "a" (fpregs), "m" (*fpregs));
67 if (!MACHINE_HAS_IEEE) 61 if (!MACHINE_HAS_IEEE)
68 return; 62 return;
69 asm volatile( 63 asm volatile(
70 " lfpc 0(%0)\n" 64 " lfpc 0(%0)\n"
71 " ld 1,16(%0)\n" 65 " ld 1,16(%0)\n"
72 " ld 3,32(%0)\n" 66 " ld 3,32(%0)\n"
73 " ld 5,48(%0)\n" 67 " ld 5,48(%0)\n"
74 " ld 7,64(%0)\n" 68 " ld 7,64(%0)\n"
75 " ld 8,72(%0)\n" 69 " ld 8,72(%0)\n"
76 " ld 9,80(%0)\n" 70 " ld 9,80(%0)\n"
77 " ld 10,88(%0)\n" 71 " ld 10,88(%0)\n"
78 " ld 11,96(%0)\n" 72 " ld 11,96(%0)\n"
79 " ld 12,104(%0)\n" 73 " ld 12,104(%0)\n"
80 " ld 13,112(%0)\n" 74 " ld 13,112(%0)\n"
81 " ld 14,120(%0)\n" 75 " ld 14,120(%0)\n"
82 " ld 15,128(%0)\n" 76 " ld 15,128(%0)\n"
83 : : "a" (fpregs), "m" (*fpregs) ); 77 : : "a" (fpregs), "m" (*fpregs));
84} 78}
85 79
86static inline void save_access_regs(unsigned int *acrs) 80static inline void save_access_regs(unsigned int *acrs)
87{ 81{
88 asm volatile ("stam 0,15,0(%0)" : : "a" (acrs) : "memory" ); 82 asm volatile("stam 0,15,0(%0)" : : "a" (acrs) : "memory");
89} 83}
90 84
91static inline void restore_access_regs(unsigned int *acrs) 85static inline void restore_access_regs(unsigned int *acrs)
92{ 86{
93 asm volatile ("lam 0,15,0(%0)" : : "a" (acrs) ); 87 asm volatile("lam 0,15,0(%0)" : : "a" (acrs));
94} 88}
95 89
96#define switch_to(prev,next,last) do { \ 90#define switch_to(prev,next,last) do { \
@@ -126,10 +120,15 @@ extern void account_system_vtime(struct task_struct *);
126 account_vtime(prev); \ 120 account_vtime(prev); \
127} while (0) 121} while (0)
128 122
129#define nop() __asm__ __volatile__ ("nop") 123#define nop() asm volatile("nop")
130 124
131#define xchg(ptr,x) \ 125#define xchg(ptr,x) \
132 ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(void *)(ptr),sizeof(*(ptr)))) 126({ \
127 __typeof__(*(ptr)) __ret; \
128 __ret = (__typeof__(*(ptr))) \
129 __xchg((unsigned long)(x), (void *)(ptr),sizeof(*(ptr))); \
130 __ret; \
131})
133 132
134static inline unsigned long __xchg(unsigned long x, void * ptr, int size) 133static inline unsigned long __xchg(unsigned long x, void * ptr, int size)
135{ 134{
@@ -142,15 +141,15 @@ static inline unsigned long __xchg(unsigned long x, void * ptr, int size)
142 shift = (3 ^ (addr & 3)) << 3; 141 shift = (3 ^ (addr & 3)) << 3;
143 addr ^= addr & 3; 142 addr ^= addr & 3;
144 asm volatile( 143 asm volatile(
145 " l %0,0(%4)\n" 144 " l %0,0(%4)\n"
146 "0: lr 0,%0\n" 145 "0: lr 0,%0\n"
147 " nr 0,%3\n" 146 " nr 0,%3\n"
148 " or 0,%2\n" 147 " or 0,%2\n"
149 " cs %0,0,0(%4)\n" 148 " cs %0,0,0(%4)\n"
150 " jl 0b\n" 149 " jl 0b\n"
151 : "=&d" (old), "=m" (*(int *) addr) 150 : "=&d" (old), "=m" (*(int *) addr)
152 : "d" (x << shift), "d" (~(255 << shift)), "a" (addr), 151 : "d" (x << shift), "d" (~(255 << shift)), "a" (addr),
153 "m" (*(int *) addr) : "memory", "cc", "0" ); 152 "m" (*(int *) addr) : "memory", "cc", "0");
154 x = old >> shift; 153 x = old >> shift;
155 break; 154 break;
156 case 2: 155 case 2:
@@ -158,36 +157,36 @@ static inline unsigned long __xchg(unsigned long x, void * ptr, int size)
158 shift = (2 ^ (addr & 2)) << 3; 157 shift = (2 ^ (addr & 2)) << 3;
159 addr ^= addr & 2; 158 addr ^= addr & 2;
160 asm volatile( 159 asm volatile(
161 " l %0,0(%4)\n" 160 " l %0,0(%4)\n"
162 "0: lr 0,%0\n" 161 "0: lr 0,%0\n"
163 " nr 0,%3\n" 162 " nr 0,%3\n"
164 " or 0,%2\n" 163 " or 0,%2\n"
165 " cs %0,0,0(%4)\n" 164 " cs %0,0,0(%4)\n"
166 " jl 0b\n" 165 " jl 0b\n"
167 : "=&d" (old), "=m" (*(int *) addr) 166 : "=&d" (old), "=m" (*(int *) addr)
168 : "d" (x << shift), "d" (~(65535 << shift)), "a" (addr), 167 : "d" (x << shift), "d" (~(65535 << shift)), "a" (addr),
169 "m" (*(int *) addr) : "memory", "cc", "0" ); 168 "m" (*(int *) addr) : "memory", "cc", "0");
170 x = old >> shift; 169 x = old >> shift;
171 break; 170 break;
172 case 4: 171 case 4:
173 asm volatile ( 172 asm volatile(
174 " l %0,0(%3)\n" 173 " l %0,0(%3)\n"
175 "0: cs %0,%2,0(%3)\n" 174 "0: cs %0,%2,0(%3)\n"
176 " jl 0b\n" 175 " jl 0b\n"
177 : "=&d" (old), "=m" (*(int *) ptr) 176 : "=&d" (old), "=m" (*(int *) ptr)
178 : "d" (x), "a" (ptr), "m" (*(int *) ptr) 177 : "d" (x), "a" (ptr), "m" (*(int *) ptr)
179 : "memory", "cc" ); 178 : "memory", "cc");
180 x = old; 179 x = old;
181 break; 180 break;
182#ifdef __s390x__ 181#ifdef __s390x__
183 case 8: 182 case 8:
184 asm volatile ( 183 asm volatile(
185 " lg %0,0(%3)\n" 184 " lg %0,0(%3)\n"
186 "0: csg %0,%2,0(%3)\n" 185 "0: csg %0,%2,0(%3)\n"
187 " jl 0b\n" 186 " jl 0b\n"
188 : "=&d" (old), "=m" (*(long *) ptr) 187 : "=&d" (old), "=m" (*(long *) ptr)
189 : "d" (x), "a" (ptr), "m" (*(long *) ptr) 188 : "d" (x), "a" (ptr), "m" (*(long *) ptr)
190 : "memory", "cc" ); 189 : "memory", "cc");
191 x = old; 190 x = old;
192 break; 191 break;
193#endif /* __s390x__ */ 192#endif /* __s390x__ */
@@ -219,55 +218,55 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
219 shift = (3 ^ (addr & 3)) << 3; 218 shift = (3 ^ (addr & 3)) << 3;
220 addr ^= addr & 3; 219 addr ^= addr & 3;
221 asm volatile( 220 asm volatile(
222 " l %0,0(%4)\n" 221 " l %0,0(%4)\n"
223 "0: nr %0,%5\n" 222 "0: nr %0,%5\n"
224 " lr %1,%0\n" 223 " lr %1,%0\n"
225 " or %0,%2\n" 224 " or %0,%2\n"
226 " or %1,%3\n" 225 " or %1,%3\n"
227 " cs %0,%1,0(%4)\n" 226 " cs %0,%1,0(%4)\n"
228 " jnl 1f\n" 227 " jnl 1f\n"
229 " xr %1,%0\n" 228 " xr %1,%0\n"
230 " nr %1,%5\n" 229 " nr %1,%5\n"
231 " jnz 0b\n" 230 " jnz 0b\n"
232 "1:" 231 "1:"
233 : "=&d" (prev), "=&d" (tmp) 232 : "=&d" (prev), "=&d" (tmp)
234 : "d" (old << shift), "d" (new << shift), "a" (ptr), 233 : "d" (old << shift), "d" (new << shift), "a" (ptr),
235 "d" (~(255 << shift)) 234 "d" (~(255 << shift))
236 : "memory", "cc" ); 235 : "memory", "cc");
237 return prev >> shift; 236 return prev >> shift;
238 case 2: 237 case 2:
239 addr = (unsigned long) ptr; 238 addr = (unsigned long) ptr;
240 shift = (2 ^ (addr & 2)) << 3; 239 shift = (2 ^ (addr & 2)) << 3;
241 addr ^= addr & 2; 240 addr ^= addr & 2;
242 asm volatile( 241 asm volatile(
243 " l %0,0(%4)\n" 242 " l %0,0(%4)\n"
244 "0: nr %0,%5\n" 243 "0: nr %0,%5\n"
245 " lr %1,%0\n" 244 " lr %1,%0\n"
246 " or %0,%2\n" 245 " or %0,%2\n"
247 " or %1,%3\n" 246 " or %1,%3\n"
248 " cs %0,%1,0(%4)\n" 247 " cs %0,%1,0(%4)\n"
249 " jnl 1f\n" 248 " jnl 1f\n"
250 " xr %1,%0\n" 249 " xr %1,%0\n"
251 " nr %1,%5\n" 250 " nr %1,%5\n"
252 " jnz 0b\n" 251 " jnz 0b\n"
253 "1:" 252 "1:"
254 : "=&d" (prev), "=&d" (tmp) 253 : "=&d" (prev), "=&d" (tmp)
255 : "d" (old << shift), "d" (new << shift), "a" (ptr), 254 : "d" (old << shift), "d" (new << shift), "a" (ptr),
256 "d" (~(65535 << shift)) 255 "d" (~(65535 << shift))
257 : "memory", "cc" ); 256 : "memory", "cc");
258 return prev >> shift; 257 return prev >> shift;
259 case 4: 258 case 4:
260 asm volatile ( 259 asm volatile(
261 " cs %0,%2,0(%3)\n" 260 " cs %0,%2,0(%3)\n"
262 : "=&d" (prev) : "0" (old), "d" (new), "a" (ptr) 261 : "=&d" (prev) : "0" (old), "d" (new), "a" (ptr)
263 : "memory", "cc" ); 262 : "memory", "cc");
264 return prev; 263 return prev;
265#ifdef __s390x__ 264#ifdef __s390x__
266 case 8: 265 case 8:
267 asm volatile ( 266 asm volatile(
268 " csg %0,%2,0(%3)\n" 267 " csg %0,%2,0(%3)\n"
269 : "=&d" (prev) : "0" (old), "d" (new), "a" (ptr) 268 : "=&d" (prev) : "0" (old), "d" (new), "a" (ptr)
270 : "memory", "cc" ); 269 : "memory", "cc");
271 return prev; 270 return prev;
272#endif /* __s390x__ */ 271#endif /* __s390x__ */
273 } 272 }
@@ -284,8 +283,8 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
284 * all memory ops have completed wrt other CPU's ( see 7-15 POP DJB ). 283 * all memory ops have completed wrt other CPU's ( see 7-15 POP DJB ).
285 */ 284 */
286 285
287#define eieio() __asm__ __volatile__ ( "bcr 15,0" : : : "memory" ) 286#define eieio() asm volatile("bcr 15,0" : : : "memory")
288# define SYNC_OTHER_CORES(x) eieio() 287#define SYNC_OTHER_CORES(x) eieio()
289#define mb() eieio() 288#define mb() eieio()
290#define rmb() eieio() 289#define rmb() eieio()
291#define wmb() eieio() 290#define wmb() eieio()
@@ -299,151 +298,60 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
299 298
300 299
301#define set_mb(var, value) do { var = value; mb(); } while (0) 300#define set_mb(var, value) do { var = value; mb(); } while (0)
302#define set_wmb(var, value) do { var = value; wmb(); } while (0)
303
304/* interrupt control.. */
305#define local_irq_enable() ({ \
306 unsigned long __dummy; \
307 __asm__ __volatile__ ( \
308 "stosm 0(%1),0x03" \
309 : "=m" (__dummy) : "a" (&__dummy) : "memory" ); \
310 })
311
312#define local_irq_disable() ({ \
313 unsigned long __flags; \
314 __asm__ __volatile__ ( \
315 "stnsm 0(%1),0xfc" : "=m" (__flags) : "a" (&__flags) ); \
316 __flags; \
317 })
318
319#define local_save_flags(x) \
320 __asm__ __volatile__("stosm 0(%1),0" : "=m" (x) : "a" (&x), "m" (x) )
321
322#define local_irq_restore(x) \
323 __asm__ __volatile__("ssm 0(%0)" : : "a" (&x), "m" (x) : "memory")
324
325#define irqs_disabled() \
326({ \
327 unsigned long flags; \
328 local_save_flags(flags); \
329 !((flags >> __FLAG_SHIFT) & 3); \
330})
331 301
332#ifdef __s390x__ 302#ifdef __s390x__
333 303
334#define __ctl_load(array, low, high) ({ \ 304#define __ctl_load(array, low, high) ({ \
335 typedef struct { char _[sizeof(array)]; } addrtype; \ 305 typedef struct { char _[sizeof(array)]; } addrtype; \
336 __asm__ __volatile__ ( \ 306 asm volatile( \
337 " bras 1,0f\n" \ 307 " lctlg %1,%2,0(%0)\n" \
338 " lctlg 0,0,0(%0)\n" \ 308 : : "a" (&array), "i" (low), "i" (high), \
339 "0: ex %1,0(1)" \ 309 "m" (*(addrtype *)(array))); \
340 : : "a" (&array), "a" (((low)<<4)+(high)), \
341 "m" (*(addrtype *)(array)) : "1" ); \
342 }) 310 })
343 311
344#define __ctl_store(array, low, high) ({ \ 312#define __ctl_store(array, low, high) ({ \
345 typedef struct { char _[sizeof(array)]; } addrtype; \ 313 typedef struct { char _[sizeof(array)]; } addrtype; \
346 __asm__ __volatile__ ( \ 314 asm volatile( \
347 " bras 1,0f\n" \ 315 " stctg %2,%3,0(%1)\n" \
348 " stctg 0,0,0(%1)\n" \ 316 : "=m" (*(addrtype *)(array)) \
349 "0: ex %2,0(1)" \ 317 : "a" (&array), "i" (low), "i" (high)); \
350 : "=m" (*(addrtype *)(array)) \
351 : "a" (&array), "a" (((low)<<4)+(high)) : "1" ); \
352 }) 318 })
353 319
354#define __ctl_set_bit(cr, bit) ({ \
355 __u8 __dummy[24]; \
356 __asm__ __volatile__ ( \
357 " bras 1,0f\n" /* skip indirect insns */ \
358 " stctg 0,0,0(%1)\n" \
359 " lctlg 0,0,0(%1)\n" \
360 "0: ex %2,0(1)\n" /* execute stctl */ \
361 " lg 0,0(%1)\n" \
362 " ogr 0,%3\n" /* set the bit */ \
363 " stg 0,0(%1)\n" \
364 "1: ex %2,6(1)" /* execute lctl */ \
365 : "=m" (__dummy) \
366 : "a" ((((unsigned long) &__dummy) + 7) & ~7UL), \
367 "a" (cr*17), "a" (1L<<(bit)) \
368 : "cc", "0", "1" ); \
369 })
370
371#define __ctl_clear_bit(cr, bit) ({ \
372 __u8 __dummy[16]; \
373 __asm__ __volatile__ ( \
374 " bras 1,0f\n" /* skip indirect insns */ \
375 " stctg 0,0,0(%1)\n" \
376 " lctlg 0,0,0(%1)\n" \
377 "0: ex %2,0(1)\n" /* execute stctl */ \
378 " lg 0,0(%1)\n" \
379 " ngr 0,%3\n" /* set the bit */ \
380 " stg 0,0(%1)\n" \
381 "1: ex %2,6(1)" /* execute lctl */ \
382 : "=m" (__dummy) \
383 : "a" ((((unsigned long) &__dummy) + 7) & ~7UL), \
384 "a" (cr*17), "a" (~(1L<<(bit))) \
385 : "cc", "0", "1" ); \
386 })
387
388#else /* __s390x__ */ 320#else /* __s390x__ */
389 321
390#define __ctl_load(array, low, high) ({ \ 322#define __ctl_load(array, low, high) ({ \
391 typedef struct { char _[sizeof(array)]; } addrtype; \ 323 typedef struct { char _[sizeof(array)]; } addrtype; \
392 __asm__ __volatile__ ( \ 324 asm volatile( \
393 " bras 1,0f\n" \ 325 " lctl %1,%2,0(%0)\n" \
394 " lctl 0,0,0(%0)\n" \ 326 : : "a" (&array), "i" (low), "i" (high), \
395 "0: ex %1,0(1)" \ 327 "m" (*(addrtype *)(array))); \
396 : : "a" (&array), "a" (((low)<<4)+(high)), \ 328})
397 "m" (*(addrtype *)(array)) : "1" ); \
398 })
399 329
400#define __ctl_store(array, low, high) ({ \ 330#define __ctl_store(array, low, high) ({ \
401 typedef struct { char _[sizeof(array)]; } addrtype; \ 331 typedef struct { char _[sizeof(array)]; } addrtype; \
402 __asm__ __volatile__ ( \ 332 asm volatile( \
403 " bras 1,0f\n" \ 333 " stctl %2,%3,0(%1)\n" \
404 " stctl 0,0,0(%1)\n" \ 334 : "=m" (*(addrtype *)(array)) \
405 "0: ex %2,0(1)" \ 335 : "a" (&array), "i" (low), "i" (high)); \
406 : "=m" (*(addrtype *)(array)) \
407 : "a" (&array), "a" (((low)<<4)+(high)): "1" ); \
408 }) 336 })
409 337
410#define __ctl_set_bit(cr, bit) ({ \
411 __u8 __dummy[16]; \
412 __asm__ __volatile__ ( \
413 " bras 1,0f\n" /* skip indirect insns */ \
414 " stctl 0,0,0(%1)\n" \
415 " lctl 0,0,0(%1)\n" \
416 "0: ex %2,0(1)\n" /* execute stctl */ \
417 " l 0,0(%1)\n" \
418 " or 0,%3\n" /* set the bit */ \
419 " st 0,0(%1)\n" \
420 "1: ex %2,4(1)" /* execute lctl */ \
421 : "=m" (__dummy) \
422 : "a" ((((unsigned long) &__dummy) + 7) & ~7UL), \
423 "a" (cr*17), "a" (1<<(bit)) \
424 : "cc", "0", "1" ); \
425 })
426
427#define __ctl_clear_bit(cr, bit) ({ \
428 __u8 __dummy[16]; \
429 __asm__ __volatile__ ( \
430 " bras 1,0f\n" /* skip indirect insns */ \
431 " stctl 0,0,0(%1)\n" \
432 " lctl 0,0,0(%1)\n" \
433 "0: ex %2,0(1)\n" /* execute stctl */ \
434 " l 0,0(%1)\n" \
435 " nr 0,%3\n" /* set the bit */ \
436 " st 0,0(%1)\n" \
437 "1: ex %2,4(1)" /* execute lctl */ \
438 : "=m" (__dummy) \
439 : "a" ((((unsigned long) &__dummy) + 7) & ~7UL), \
440 "a" (cr*17), "a" (~(1<<(bit))) \
441 : "cc", "0", "1" ); \
442 })
443#endif /* __s390x__ */ 338#endif /* __s390x__ */
444 339
445/* For spinlocks etc */ 340#define __ctl_set_bit(cr, bit) ({ \
446#define local_irq_save(x) ((x) = local_irq_disable()) 341 unsigned long __dummy; \
342 __ctl_store(__dummy, cr, cr); \
343 __dummy |= 1UL << (bit); \
344 __ctl_load(__dummy, cr, cr); \
345})
346
347#define __ctl_clear_bit(cr, bit) ({ \
348 unsigned long __dummy; \
349 __ctl_store(__dummy, cr, cr); \
350 __dummy &= ~(1UL << (bit)); \
351 __ctl_load(__dummy, cr, cr); \
352})
353
354#include <linux/irqflags.h>
447 355
448/* 356/*
449 * Use to set psw mask except for the first byte which 357 * Use to set psw mask except for the first byte which
@@ -452,8 +360,7 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
452static inline void 360static inline void
453__set_psw_mask(unsigned long mask) 361__set_psw_mask(unsigned long mask)
454{ 362{
455 local_save_flags(mask); 363 __load_psw_mask(mask | (__raw_local_irq_stosm(0x00) & ~(-1UL >> 8)));
456 __load_psw_mask(mask);
457} 364}
458 365
459#define local_mcck_enable() __set_psw_mask(PSW_KERNEL_BITS) 366#define local_mcck_enable() __set_psw_mask(PSW_KERNEL_BITS)
@@ -482,4 +389,3 @@ extern void (*_machine_power_off)(void);
482#endif /* __KERNEL__ */ 389#endif /* __KERNEL__ */
483 390
484#endif 391#endif
485
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