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-rw-r--r--include/asm-s390/bitops.h668
1 files changed, 292 insertions, 376 deletions
diff --git a/include/asm-s390/bitops.h b/include/asm-s390/bitops.h
index 4d2b126ba159..f79c9b792af1 100644
--- a/include/asm-s390/bitops.h
+++ b/include/asm-s390/bitops.h
@@ -12,6 +12,9 @@
12 * Copyright (C) 1992, Linus Torvalds 12 * Copyright (C) 1992, Linus Torvalds
13 * 13 *
14 */ 14 */
15
16#ifdef __KERNEL__
17
15#include <linux/compiler.h> 18#include <linux/compiler.h>
16 19
17/* 20/*
@@ -50,19 +53,6 @@
50 * with operation of the form "set_bit(bitnr, flags)". 53 * with operation of the form "set_bit(bitnr, flags)".
51 */ 54 */
52 55
53/* set ALIGN_CS to 1 if the SMP safe bit operations should
54 * align the address to 4 byte boundary. It seems to work
55 * without the alignment.
56 */
57#ifdef __KERNEL__
58#define ALIGN_CS 0
59#else
60#define ALIGN_CS 1
61#ifndef CONFIG_SMP
62#error "bitops won't work without CONFIG_SMP"
63#endif
64#endif
65
66/* bitmap tables from arch/S390/kernel/bitmap.S */ 56/* bitmap tables from arch/S390/kernel/bitmap.S */
67extern const char _oi_bitmap[]; 57extern const char _oi_bitmap[];
68extern const char _ni_bitmap[]; 58extern const char _ni_bitmap[];
@@ -77,16 +67,35 @@ extern const char _sb_findmap[];
77#define __BITOPS_AND "nr" 67#define __BITOPS_AND "nr"
78#define __BITOPS_XOR "xr" 68#define __BITOPS_XOR "xr"
79 69
80#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \ 70#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
81 __asm__ __volatile__(" l %0,0(%4)\n" \ 71
82 "0: lr %1,%0\n" \ 72#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
83 __op_string " %1,%3\n" \ 73 asm volatile( \
84 " cs %0,%1,0(%4)\n" \ 74 " l %0,%2\n" \
85 " jl 0b" \ 75 "0: lr %1,%0\n" \
86 : "=&d" (__old), "=&d" (__new), \ 76 __op_string " %1,%3\n" \
87 "=m" (*(unsigned long *) __addr) \ 77 " cs %0,%1,%2\n" \
88 : "d" (__val), "a" (__addr), \ 78 " jl 0b" \
89 "m" (*(unsigned long *) __addr) : "cc" ); 79 : "=&d" (__old), "=&d" (__new), \
80 "=Q" (*(unsigned long *) __addr) \
81 : "d" (__val), "Q" (*(unsigned long *) __addr) \
82 : "cc");
83
84#else /* __GNUC__ */
85
86#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
87 asm volatile( \
88 " l %0,0(%4)\n" \
89 "0: lr %1,%0\n" \
90 __op_string " %1,%3\n" \
91 " cs %0,%1,0(%4)\n" \
92 " jl 0b" \
93 : "=&d" (__old), "=&d" (__new), \
94 "=m" (*(unsigned long *) __addr) \
95 : "d" (__val), "a" (__addr), \
96 "m" (*(unsigned long *) __addr) : "cc");
97
98#endif /* __GNUC__ */
90 99
91#else /* __s390x__ */ 100#else /* __s390x__ */
92 101
@@ -96,21 +105,41 @@ extern const char _sb_findmap[];
96#define __BITOPS_AND "ngr" 105#define __BITOPS_AND "ngr"
97#define __BITOPS_XOR "xgr" 106#define __BITOPS_XOR "xgr"
98 107
99#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \ 108#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
100 __asm__ __volatile__(" lg %0,0(%4)\n" \ 109
101 "0: lgr %1,%0\n" \ 110#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
102 __op_string " %1,%3\n" \ 111 asm volatile( \
103 " csg %0,%1,0(%4)\n" \ 112 " lg %0,%2\n" \
104 " jl 0b" \ 113 "0: lgr %1,%0\n" \
105 : "=&d" (__old), "=&d" (__new), \ 114 __op_string " %1,%3\n" \
106 "=m" (*(unsigned long *) __addr) \ 115 " csg %0,%1,%2\n" \
107 : "d" (__val), "a" (__addr), \ 116 " jl 0b" \
108 "m" (*(unsigned long *) __addr) : "cc" ); 117 : "=&d" (__old), "=&d" (__new), \
118 "=Q" (*(unsigned long *) __addr) \
119 : "d" (__val), "Q" (*(unsigned long *) __addr) \
120 : "cc");
121
122#else /* __GNUC__ */
123
124#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
125 asm volatile( \
126 " lg %0,0(%4)\n" \
127 "0: lgr %1,%0\n" \
128 __op_string " %1,%3\n" \
129 " csg %0,%1,0(%4)\n" \
130 " jl 0b" \
131 : "=&d" (__old), "=&d" (__new), \
132 "=m" (*(unsigned long *) __addr) \
133 : "d" (__val), "a" (__addr), \
134 "m" (*(unsigned long *) __addr) : "cc");
135
136
137#endif /* __GNUC__ */
109 138
110#endif /* __s390x__ */ 139#endif /* __s390x__ */
111 140
112#define __BITOPS_WORDS(bits) (((bits)+__BITOPS_WORDSIZE-1)/__BITOPS_WORDSIZE) 141#define __BITOPS_WORDS(bits) (((bits)+__BITOPS_WORDSIZE-1)/__BITOPS_WORDSIZE)
113#define __BITOPS_BARRIER() __asm__ __volatile__ ( "" : : : "memory" ) 142#define __BITOPS_BARRIER() asm volatile("" : : : "memory")
114 143
115#ifdef CONFIG_SMP 144#ifdef CONFIG_SMP
116/* 145/*
@@ -121,10 +150,6 @@ static inline void set_bit_cs(unsigned long nr, volatile unsigned long *ptr)
121 unsigned long addr, old, new, mask; 150 unsigned long addr, old, new, mask;
122 151
123 addr = (unsigned long) ptr; 152 addr = (unsigned long) ptr;
124#if ALIGN_CS == 1
125 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
126 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
127#endif
128 /* calculate address for CS */ 153 /* calculate address for CS */
129 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3; 154 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
130 /* make OR mask */ 155 /* make OR mask */
@@ -141,10 +166,6 @@ static inline void clear_bit_cs(unsigned long nr, volatile unsigned long *ptr)
141 unsigned long addr, old, new, mask; 166 unsigned long addr, old, new, mask;
142 167
143 addr = (unsigned long) ptr; 168 addr = (unsigned long) ptr;
144#if ALIGN_CS == 1
145 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
146 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
147#endif
148 /* calculate address for CS */ 169 /* calculate address for CS */
149 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3; 170 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
150 /* make AND mask */ 171 /* make AND mask */
@@ -161,10 +182,6 @@ static inline void change_bit_cs(unsigned long nr, volatile unsigned long *ptr)
161 unsigned long addr, old, new, mask; 182 unsigned long addr, old, new, mask;
162 183
163 addr = (unsigned long) ptr; 184 addr = (unsigned long) ptr;
164#if ALIGN_CS == 1
165 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
166 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
167#endif
168 /* calculate address for CS */ 185 /* calculate address for CS */
169 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3; 186 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
170 /* make XOR mask */ 187 /* make XOR mask */
@@ -182,10 +199,6 @@ test_and_set_bit_cs(unsigned long nr, volatile unsigned long *ptr)
182 unsigned long addr, old, new, mask; 199 unsigned long addr, old, new, mask;
183 200
184 addr = (unsigned long) ptr; 201 addr = (unsigned long) ptr;
185#if ALIGN_CS == 1
186 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
187 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
188#endif
189 /* calculate address for CS */ 202 /* calculate address for CS */
190 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3; 203 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
191 /* make OR/test mask */ 204 /* make OR/test mask */
@@ -205,10 +218,6 @@ test_and_clear_bit_cs(unsigned long nr, volatile unsigned long *ptr)
205 unsigned long addr, old, new, mask; 218 unsigned long addr, old, new, mask;
206 219
207 addr = (unsigned long) ptr; 220 addr = (unsigned long) ptr;
208#if ALIGN_CS == 1
209 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
210 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
211#endif
212 /* calculate address for CS */ 221 /* calculate address for CS */
213 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3; 222 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
214 /* make AND/test mask */ 223 /* make AND/test mask */
@@ -228,10 +237,6 @@ test_and_change_bit_cs(unsigned long nr, volatile unsigned long *ptr)
228 unsigned long addr, old, new, mask; 237 unsigned long addr, old, new, mask;
229 238
230 addr = (unsigned long) ptr; 239 addr = (unsigned long) ptr;
231#if ALIGN_CS == 1
232 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
233 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
234#endif
235 /* calculate address for CS */ 240 /* calculate address for CS */
236 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3; 241 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
237 /* make XOR/test mask */ 242 /* make XOR/test mask */
@@ -251,10 +256,10 @@ static inline void __set_bit(unsigned long nr, volatile unsigned long *ptr)
251 unsigned long addr; 256 unsigned long addr;
252 257
253 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); 258 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
254 asm volatile("oc 0(1,%1),0(%2)" 259 asm volatile(
255 : "=m" (*(char *) addr) 260 " oc 0(1,%1),0(%2)"
256 : "a" (addr), "a" (_oi_bitmap + (nr & 7)), 261 : "=m" (*(char *) addr) : "a" (addr),
257 "m" (*(char *) addr) : "cc" ); 262 "a" (_oi_bitmap + (nr & 7)), "m" (*(char *) addr) : "cc" );
258} 263}
259 264
260static inline void 265static inline void
@@ -263,40 +268,7 @@ __constant_set_bit(const unsigned long nr, volatile unsigned long *ptr)
263 unsigned long addr; 268 unsigned long addr;
264 269
265 addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); 270 addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
266 switch (nr&7) { 271 *(unsigned char *) addr |= 1 << (nr & 7);
267 case 0:
268 asm volatile ("oi 0(%1),0x01" : "=m" (*(char *) addr)
269 : "a" (addr), "m" (*(char *) addr) : "cc" );
270 break;
271 case 1:
272 asm volatile ("oi 0(%1),0x02" : "=m" (*(char *) addr)
273 : "a" (addr), "m" (*(char *) addr) : "cc" );
274 break;
275 case 2:
276 asm volatile ("oi 0(%1),0x04" : "=m" (*(char *) addr)
277 : "a" (addr), "m" (*(char *) addr) : "cc" );
278 break;
279 case 3:
280 asm volatile ("oi 0(%1),0x08" : "=m" (*(char *) addr)
281 : "a" (addr), "m" (*(char *) addr) : "cc" );
282 break;
283 case 4:
284 asm volatile ("oi 0(%1),0x10" : "=m" (*(char *) addr)
285 : "a" (addr), "m" (*(char *) addr) : "cc" );
286 break;
287 case 5:
288 asm volatile ("oi 0(%1),0x20" : "=m" (*(char *) addr)
289 : "a" (addr), "m" (*(char *) addr) : "cc" );
290 break;
291 case 6:
292 asm volatile ("oi 0(%1),0x40" : "=m" (*(char *) addr)
293 : "a" (addr), "m" (*(char *) addr) : "cc" );
294 break;
295 case 7:
296 asm volatile ("oi 0(%1),0x80" : "=m" (*(char *) addr)
297 : "a" (addr), "m" (*(char *) addr) : "cc" );
298 break;
299 }
300} 272}
301 273
302#define set_bit_simple(nr,addr) \ 274#define set_bit_simple(nr,addr) \
@@ -313,10 +285,10 @@ __clear_bit(unsigned long nr, volatile unsigned long *ptr)
313 unsigned long addr; 285 unsigned long addr;
314 286
315 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); 287 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
316 asm volatile("nc 0(1,%1),0(%2)" 288 asm volatile(
317 : "=m" (*(char *) addr) 289 " nc 0(1,%1),0(%2)"
318 : "a" (addr), "a" (_ni_bitmap + (nr & 7)), 290 : "=m" (*(char *) addr) : "a" (addr),
319 "m" (*(char *) addr) : "cc" ); 291 "a" (_ni_bitmap + (nr & 7)), "m" (*(char *) addr) : "cc");
320} 292}
321 293
322static inline void 294static inline void
@@ -325,40 +297,7 @@ __constant_clear_bit(const unsigned long nr, volatile unsigned long *ptr)
325 unsigned long addr; 297 unsigned long addr;
326 298
327 addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); 299 addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
328 switch (nr&7) { 300 *(unsigned char *) addr &= ~(1 << (nr & 7));
329 case 0:
330 asm volatile ("ni 0(%1),0xFE" : "=m" (*(char *) addr)
331 : "a" (addr), "m" (*(char *) addr) : "cc" );
332 break;
333 case 1:
334 asm volatile ("ni 0(%1),0xFD": "=m" (*(char *) addr)
335 : "a" (addr), "m" (*(char *) addr) : "cc" );
336 break;
337 case 2:
338 asm volatile ("ni 0(%1),0xFB" : "=m" (*(char *) addr)
339 : "a" (addr), "m" (*(char *) addr) : "cc" );
340 break;
341 case 3:
342 asm volatile ("ni 0(%1),0xF7" : "=m" (*(char *) addr)
343 : "a" (addr), "m" (*(char *) addr) : "cc" );
344 break;
345 case 4:
346 asm volatile ("ni 0(%1),0xEF" : "=m" (*(char *) addr)
347 : "a" (addr), "m" (*(char *) addr) : "cc" );
348 break;
349 case 5:
350 asm volatile ("ni 0(%1),0xDF" : "=m" (*(char *) addr)
351 : "a" (addr), "m" (*(char *) addr) : "cc" );
352 break;
353 case 6:
354 asm volatile ("ni 0(%1),0xBF" : "=m" (*(char *) addr)
355 : "a" (addr), "m" (*(char *) addr) : "cc" );
356 break;
357 case 7:
358 asm volatile ("ni 0(%1),0x7F" : "=m" (*(char *) addr)
359 : "a" (addr), "m" (*(char *) addr) : "cc" );
360 break;
361 }
362} 301}
363 302
364#define clear_bit_simple(nr,addr) \ 303#define clear_bit_simple(nr,addr) \
@@ -374,10 +313,10 @@ static inline void __change_bit(unsigned long nr, volatile unsigned long *ptr)
374 unsigned long addr; 313 unsigned long addr;
375 314
376 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); 315 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
377 asm volatile("xc 0(1,%1),0(%2)" 316 asm volatile(
378 : "=m" (*(char *) addr) 317 " xc 0(1,%1),0(%2)"
379 : "a" (addr), "a" (_oi_bitmap + (nr & 7)), 318 : "=m" (*(char *) addr) : "a" (addr),
380 "m" (*(char *) addr) : "cc" ); 319 "a" (_oi_bitmap + (nr & 7)), "m" (*(char *) addr) : "cc" );
381} 320}
382 321
383static inline void 322static inline void
@@ -386,40 +325,7 @@ __constant_change_bit(const unsigned long nr, volatile unsigned long *ptr)
386 unsigned long addr; 325 unsigned long addr;
387 326
388 addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); 327 addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
389 switch (nr&7) { 328 *(unsigned char *) addr ^= 1 << (nr & 7);
390 case 0:
391 asm volatile ("xi 0(%1),0x01" : "=m" (*(char *) addr)
392 : "a" (addr), "m" (*(char *) addr) : "cc" );
393 break;
394 case 1:
395 asm volatile ("xi 0(%1),0x02" : "=m" (*(char *) addr)
396 : "a" (addr), "m" (*(char *) addr) : "cc" );
397 break;
398 case 2:
399 asm volatile ("xi 0(%1),0x04" : "=m" (*(char *) addr)
400 : "a" (addr), "m" (*(char *) addr) : "cc" );
401 break;
402 case 3:
403 asm volatile ("xi 0(%1),0x08" : "=m" (*(char *) addr)
404 : "a" (addr), "m" (*(char *) addr) : "cc" );
405 break;
406 case 4:
407 asm volatile ("xi 0(%1),0x10" : "=m" (*(char *) addr)
408 : "a" (addr), "m" (*(char *) addr) : "cc" );
409 break;
410 case 5:
411 asm volatile ("xi 0(%1),0x20" : "=m" (*(char *) addr)
412 : "a" (addr), "m" (*(char *) addr) : "cc" );
413 break;
414 case 6:
415 asm volatile ("xi 0(%1),0x40" : "=m" (*(char *) addr)
416 : "a" (addr), "m" (*(char *) addr) : "cc" );
417 break;
418 case 7:
419 asm volatile ("xi 0(%1),0x80" : "=m" (*(char *) addr)
420 : "a" (addr), "m" (*(char *) addr) : "cc" );
421 break;
422 }
423} 329}
424 330
425#define change_bit_simple(nr,addr) \ 331#define change_bit_simple(nr,addr) \
@@ -438,10 +344,11 @@ test_and_set_bit_simple(unsigned long nr, volatile unsigned long *ptr)
438 344
439 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); 345 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
440 ch = *(unsigned char *) addr; 346 ch = *(unsigned char *) addr;
441 asm volatile("oc 0(1,%1),0(%2)" 347 asm volatile(
442 : "=m" (*(char *) addr) 348 " oc 0(1,%1),0(%2)"
443 : "a" (addr), "a" (_oi_bitmap + (nr & 7)), 349 : "=m" (*(char *) addr)
444 "m" (*(char *) addr) : "cc", "memory" ); 350 : "a" (addr), "a" (_oi_bitmap + (nr & 7)),
351 "m" (*(char *) addr) : "cc", "memory");
445 return (ch >> (nr & 7)) & 1; 352 return (ch >> (nr & 7)) & 1;
446} 353}
447#define __test_and_set_bit(X,Y) test_and_set_bit_simple(X,Y) 354#define __test_and_set_bit(X,Y) test_and_set_bit_simple(X,Y)
@@ -457,10 +364,11 @@ test_and_clear_bit_simple(unsigned long nr, volatile unsigned long *ptr)
457 364
458 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); 365 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
459 ch = *(unsigned char *) addr; 366 ch = *(unsigned char *) addr;
460 asm volatile("nc 0(1,%1),0(%2)" 367 asm volatile(
461 : "=m" (*(char *) addr) 368 " nc 0(1,%1),0(%2)"
462 : "a" (addr), "a" (_ni_bitmap + (nr & 7)), 369 : "=m" (*(char *) addr)
463 "m" (*(char *) addr) : "cc", "memory" ); 370 : "a" (addr), "a" (_ni_bitmap + (nr & 7)),
371 "m" (*(char *) addr) : "cc", "memory");
464 return (ch >> (nr & 7)) & 1; 372 return (ch >> (nr & 7)) & 1;
465} 373}
466#define __test_and_clear_bit(X,Y) test_and_clear_bit_simple(X,Y) 374#define __test_and_clear_bit(X,Y) test_and_clear_bit_simple(X,Y)
@@ -476,10 +384,11 @@ test_and_change_bit_simple(unsigned long nr, volatile unsigned long *ptr)
476 384
477 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); 385 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
478 ch = *(unsigned char *) addr; 386 ch = *(unsigned char *) addr;
479 asm volatile("xc 0(1,%1),0(%2)" 387 asm volatile(
480 : "=m" (*(char *) addr) 388 " xc 0(1,%1),0(%2)"
481 : "a" (addr), "a" (_oi_bitmap + (nr & 7)), 389 : "=m" (*(char *) addr)
482 "m" (*(char *) addr) : "cc", "memory" ); 390 : "a" (addr), "a" (_oi_bitmap + (nr & 7)),
391 "m" (*(char *) addr) : "cc", "memory");
483 return (ch >> (nr & 7)) & 1; 392 return (ch >> (nr & 7)) & 1;
484} 393}
485#define __test_and_change_bit(X,Y) test_and_change_bit_simple(X,Y) 394#define __test_and_change_bit(X,Y) test_and_change_bit_simple(X,Y)
@@ -591,35 +500,36 @@ find_first_zero_bit(const unsigned long * addr, unsigned long size)
591 500
592 if (!size) 501 if (!size)
593 return 0; 502 return 0;
594 __asm__(" lhi %1,-1\n" 503 asm volatile(
595 " lr %2,%3\n" 504 " lhi %1,-1\n"
596 " slr %0,%0\n" 505 " lr %2,%3\n"
597 " ahi %2,31\n" 506 " slr %0,%0\n"
598 " srl %2,5\n" 507 " ahi %2,31\n"
599 "0: c %1,0(%0,%4)\n" 508 " srl %2,5\n"
600 " jne 1f\n" 509 "0: c %1,0(%0,%4)\n"
601 " la %0,4(%0)\n" 510 " jne 1f\n"
602 " brct %2,0b\n" 511 " la %0,4(%0)\n"
603 " lr %0,%3\n" 512 " brct %2,0b\n"
604 " j 4f\n" 513 " lr %0,%3\n"
605 "1: l %2,0(%0,%4)\n" 514 " j 4f\n"
606 " sll %0,3\n" 515 "1: l %2,0(%0,%4)\n"
607 " lhi %1,0xff\n" 516 " sll %0,3\n"
608 " tml %2,0xffff\n" 517 " lhi %1,0xff\n"
609 " jno 2f\n" 518 " tml %2,0xffff\n"
610 " ahi %0,16\n" 519 " jno 2f\n"
611 " srl %2,16\n" 520 " ahi %0,16\n"
612 "2: tml %2,0x00ff\n" 521 " srl %2,16\n"
613 " jno 3f\n" 522 "2: tml %2,0x00ff\n"
614 " ahi %0,8\n" 523 " jno 3f\n"
615 " srl %2,8\n" 524 " ahi %0,8\n"
616 "3: nr %2,%1\n" 525 " srl %2,8\n"
617 " ic %2,0(%2,%5)\n" 526 "3: nr %2,%1\n"
618 " alr %0,%2\n" 527 " ic %2,0(%2,%5)\n"
619 "4:" 528 " alr %0,%2\n"
620 : "=&a" (res), "=&d" (cmp), "=&a" (count) 529 "4:"
621 : "a" (size), "a" (addr), "a" (&_zb_findmap), 530 : "=&a" (res), "=&d" (cmp), "=&a" (count)
622 "m" (*(addrtype *) addr) : "cc" ); 531 : "a" (size), "a" (addr), "a" (&_zb_findmap),
532 "m" (*(addrtype *) addr) : "cc");
623 return (res < size) ? res : size; 533 return (res < size) ? res : size;
624} 534}
625 535
@@ -632,35 +542,36 @@ find_first_bit(const unsigned long * addr, unsigned long size)
632 542
633 if (!size) 543 if (!size)
634 return 0; 544 return 0;
635 __asm__(" slr %1,%1\n" 545 asm volatile(
636 " lr %2,%3\n" 546 " slr %1,%1\n"
637 " slr %0,%0\n" 547 " lr %2,%3\n"
638 " ahi %2,31\n" 548 " slr %0,%0\n"
639 " srl %2,5\n" 549 " ahi %2,31\n"
640 "0: c %1,0(%0,%4)\n" 550 " srl %2,5\n"
641 " jne 1f\n" 551 "0: c %1,0(%0,%4)\n"
642 " la %0,4(%0)\n" 552 " jne 1f\n"
643 " brct %2,0b\n" 553 " la %0,4(%0)\n"
644 " lr %0,%3\n" 554 " brct %2,0b\n"
645 " j 4f\n" 555 " lr %0,%3\n"
646 "1: l %2,0(%0,%4)\n" 556 " j 4f\n"
647 " sll %0,3\n" 557 "1: l %2,0(%0,%4)\n"
648 " lhi %1,0xff\n" 558 " sll %0,3\n"
649 " tml %2,0xffff\n" 559 " lhi %1,0xff\n"
650 " jnz 2f\n" 560 " tml %2,0xffff\n"
651 " ahi %0,16\n" 561 " jnz 2f\n"
652 " srl %2,16\n" 562 " ahi %0,16\n"
653 "2: tml %2,0x00ff\n" 563 " srl %2,16\n"
654 " jnz 3f\n" 564 "2: tml %2,0x00ff\n"
655 " ahi %0,8\n" 565 " jnz 3f\n"
656 " srl %2,8\n" 566 " ahi %0,8\n"
657 "3: nr %2,%1\n" 567 " srl %2,8\n"
658 " ic %2,0(%2,%5)\n" 568 "3: nr %2,%1\n"
659 " alr %0,%2\n" 569 " ic %2,0(%2,%5)\n"
660 "4:" 570 " alr %0,%2\n"
661 : "=&a" (res), "=&d" (cmp), "=&a" (count) 571 "4:"
662 : "a" (size), "a" (addr), "a" (&_sb_findmap), 572 : "=&a" (res), "=&d" (cmp), "=&a" (count)
663 "m" (*(addrtype *) addr) : "cc" ); 573 : "a" (size), "a" (addr), "a" (&_sb_findmap),
574 "m" (*(addrtype *) addr) : "cc");
664 return (res < size) ? res : size; 575 return (res < size) ? res : size;
665} 576}
666 577
@@ -674,39 +585,40 @@ find_first_zero_bit(const unsigned long * addr, unsigned long size)
674 585
675 if (!size) 586 if (!size)
676 return 0; 587 return 0;
677 __asm__(" lghi %1,-1\n" 588 asm volatile(
678 " lgr %2,%3\n" 589 " lghi %1,-1\n"
679 " slgr %0,%0\n" 590 " lgr %2,%3\n"
680 " aghi %2,63\n" 591 " slgr %0,%0\n"
681 " srlg %2,%2,6\n" 592 " aghi %2,63\n"
682 "0: cg %1,0(%0,%4)\n" 593 " srlg %2,%2,6\n"
683 " jne 1f\n" 594 "0: cg %1,0(%0,%4)\n"
684 " la %0,8(%0)\n" 595 " jne 1f\n"
685 " brct %2,0b\n" 596 " la %0,8(%0)\n"
686 " lgr %0,%3\n" 597 " brct %2,0b\n"
687 " j 5f\n" 598 " lgr %0,%3\n"
688 "1: lg %2,0(%0,%4)\n" 599 " j 5f\n"
689 " sllg %0,%0,3\n" 600 "1: lg %2,0(%0,%4)\n"
690 " clr %2,%1\n" 601 " sllg %0,%0,3\n"
691 " jne 2f\n" 602 " clr %2,%1\n"
692 " aghi %0,32\n" 603 " jne 2f\n"
693 " srlg %2,%2,32\n" 604 " aghi %0,32\n"
694 "2: lghi %1,0xff\n" 605 " srlg %2,%2,32\n"
695 " tmll %2,0xffff\n" 606 "2: lghi %1,0xff\n"
696 " jno 3f\n" 607 " tmll %2,0xffff\n"
697 " aghi %0,16\n" 608 " jno 3f\n"
698 " srl %2,16\n" 609 " aghi %0,16\n"
699 "3: tmll %2,0x00ff\n" 610 " srl %2,16\n"
700 " jno 4f\n" 611 "3: tmll %2,0x00ff\n"
701 " aghi %0,8\n" 612 " jno 4f\n"
702 " srl %2,8\n" 613 " aghi %0,8\n"
703 "4: ngr %2,%1\n" 614 " srl %2,8\n"
704 " ic %2,0(%2,%5)\n" 615 "4: ngr %2,%1\n"
705 " algr %0,%2\n" 616 " ic %2,0(%2,%5)\n"
706 "5:" 617 " algr %0,%2\n"
707 : "=&a" (res), "=&d" (cmp), "=&a" (count) 618 "5:"
619 : "=&a" (res), "=&d" (cmp), "=&a" (count)
708 : "a" (size), "a" (addr), "a" (&_zb_findmap), 620 : "a" (size), "a" (addr), "a" (&_zb_findmap),
709 "m" (*(addrtype *) addr) : "cc" ); 621 "m" (*(addrtype *) addr) : "cc");
710 return (res < size) ? res : size; 622 return (res < size) ? res : size;
711} 623}
712 624
@@ -718,39 +630,40 @@ find_first_bit(const unsigned long * addr, unsigned long size)
718 630
719 if (!size) 631 if (!size)
720 return 0; 632 return 0;
721 __asm__(" slgr %1,%1\n" 633 asm volatile(
722 " lgr %2,%3\n" 634 " slgr %1,%1\n"
723 " slgr %0,%0\n" 635 " lgr %2,%3\n"
724 " aghi %2,63\n" 636 " slgr %0,%0\n"
725 " srlg %2,%2,6\n" 637 " aghi %2,63\n"
726 "0: cg %1,0(%0,%4)\n" 638 " srlg %2,%2,6\n"
727 " jne 1f\n" 639 "0: cg %1,0(%0,%4)\n"
728 " aghi %0,8\n" 640 " jne 1f\n"
729 " brct %2,0b\n" 641 " aghi %0,8\n"
730 " lgr %0,%3\n" 642 " brct %2,0b\n"
731 " j 5f\n" 643 " lgr %0,%3\n"
732 "1: lg %2,0(%0,%4)\n" 644 " j 5f\n"
733 " sllg %0,%0,3\n" 645 "1: lg %2,0(%0,%4)\n"
734 " clr %2,%1\n" 646 " sllg %0,%0,3\n"
735 " jne 2f\n" 647 " clr %2,%1\n"
736 " aghi %0,32\n" 648 " jne 2f\n"
737 " srlg %2,%2,32\n" 649 " aghi %0,32\n"
738 "2: lghi %1,0xff\n" 650 " srlg %2,%2,32\n"
739 " tmll %2,0xffff\n" 651 "2: lghi %1,0xff\n"
740 " jnz 3f\n" 652 " tmll %2,0xffff\n"
741 " aghi %0,16\n" 653 " jnz 3f\n"
742 " srl %2,16\n" 654 " aghi %0,16\n"
743 "3: tmll %2,0x00ff\n" 655 " srl %2,16\n"
744 " jnz 4f\n" 656 "3: tmll %2,0x00ff\n"
745 " aghi %0,8\n" 657 " jnz 4f\n"
746 " srl %2,8\n" 658 " aghi %0,8\n"
747 "4: ngr %2,%1\n" 659 " srl %2,8\n"
748 " ic %2,0(%2,%5)\n" 660 "4: ngr %2,%1\n"
749 " algr %0,%2\n" 661 " ic %2,0(%2,%5)\n"
750 "5:" 662 " algr %0,%2\n"
751 : "=&a" (res), "=&d" (cmp), "=&a" (count) 663 "5:"
664 : "=&a" (res), "=&d" (cmp), "=&a" (count)
752 : "a" (size), "a" (addr), "a" (&_sb_findmap), 665 : "a" (size), "a" (addr), "a" (&_sb_findmap),
753 "m" (*(addrtype *) addr) : "cc" ); 666 "m" (*(addrtype *) addr) : "cc");
754 return (res < size) ? res : size; 667 return (res < size) ? res : size;
755} 668}
756 669
@@ -834,8 +747,6 @@ static inline int sched_find_first_bit(unsigned long *b)
834 747
835#include <asm-generic/bitops/hweight.h> 748#include <asm-generic/bitops/hweight.h>
836 749
837#ifdef __KERNEL__
838
839/* 750/*
840 * ATTENTION: intel byte ordering convention for ext2 and minix !! 751 * ATTENTION: intel byte ordering convention for ext2 and minix !!
841 * bit 0 is the LSB of addr; bit 31 is the MSB of addr; 752 * bit 0 is the LSB of addr; bit 31 is the MSB of addr;
@@ -868,36 +779,37 @@ ext2_find_first_zero_bit(void *vaddr, unsigned int size)
868 779
869 if (!size) 780 if (!size)
870 return 0; 781 return 0;
871 __asm__(" lhi %1,-1\n" 782 asm volatile(
872 " lr %2,%3\n" 783 " lhi %1,-1\n"
873 " ahi %2,31\n" 784 " lr %2,%3\n"
874 " srl %2,5\n" 785 " ahi %2,31\n"
875 " slr %0,%0\n" 786 " srl %2,5\n"
876 "0: cl %1,0(%0,%4)\n" 787 " slr %0,%0\n"
877 " jne 1f\n" 788 "0: cl %1,0(%0,%4)\n"
878 " ahi %0,4\n" 789 " jne 1f\n"
879 " brct %2,0b\n" 790 " ahi %0,4\n"
880 " lr %0,%3\n" 791 " brct %2,0b\n"
881 " j 4f\n" 792 " lr %0,%3\n"
882 "1: l %2,0(%0,%4)\n" 793 " j 4f\n"
883 " sll %0,3\n" 794 "1: l %2,0(%0,%4)\n"
884 " ahi %0,24\n" 795 " sll %0,3\n"
885 " lhi %1,0xff\n" 796 " ahi %0,24\n"
886 " tmh %2,0xffff\n" 797 " lhi %1,0xff\n"
887 " jo 2f\n" 798 " tmh %2,0xffff\n"
888 " ahi %0,-16\n" 799 " jo 2f\n"
889 " srl %2,16\n" 800 " ahi %0,-16\n"
890 "2: tml %2,0xff00\n" 801 " srl %2,16\n"
891 " jo 3f\n" 802 "2: tml %2,0xff00\n"
892 " ahi %0,-8\n" 803 " jo 3f\n"
893 " srl %2,8\n" 804 " ahi %0,-8\n"
894 "3: nr %2,%1\n" 805 " srl %2,8\n"
895 " ic %2,0(%2,%5)\n" 806 "3: nr %2,%1\n"
896 " alr %0,%2\n" 807 " ic %2,0(%2,%5)\n"
897 "4:" 808 " alr %0,%2\n"
898 : "=&a" (res), "=&d" (cmp), "=&a" (count) 809 "4:"
899 : "a" (size), "a" (vaddr), "a" (&_zb_findmap), 810 : "=&a" (res), "=&d" (cmp), "=&a" (count)
900 "m" (*(addrtype *) vaddr) : "cc" ); 811 : "a" (size), "a" (vaddr), "a" (&_zb_findmap),
812 "m" (*(addrtype *) vaddr) : "cc");
901 return (res < size) ? res : size; 813 return (res < size) ? res : size;
902} 814}
903 815
@@ -911,39 +823,40 @@ ext2_find_first_zero_bit(void *vaddr, unsigned long size)
911 823
912 if (!size) 824 if (!size)
913 return 0; 825 return 0;
914 __asm__(" lghi %1,-1\n" 826 asm volatile(
915 " lgr %2,%3\n" 827 " lghi %1,-1\n"
916 " aghi %2,63\n" 828 " lgr %2,%3\n"
917 " srlg %2,%2,6\n" 829 " aghi %2,63\n"
918 " slgr %0,%0\n" 830 " srlg %2,%2,6\n"
919 "0: clg %1,0(%0,%4)\n" 831 " slgr %0,%0\n"
920 " jne 1f\n" 832 "0: clg %1,0(%0,%4)\n"
921 " aghi %0,8\n" 833 " jne 1f\n"
922 " brct %2,0b\n" 834 " aghi %0,8\n"
923 " lgr %0,%3\n" 835 " brct %2,0b\n"
924 " j 5f\n" 836 " lgr %0,%3\n"
925 "1: cl %1,0(%0,%4)\n" 837 " j 5f\n"
926 " jne 2f\n" 838 "1: cl %1,0(%0,%4)\n"
927 " aghi %0,4\n" 839 " jne 2f\n"
928 "2: l %2,0(%0,%4)\n" 840 " aghi %0,4\n"
929 " sllg %0,%0,3\n" 841 "2: l %2,0(%0,%4)\n"
930 " aghi %0,24\n" 842 " sllg %0,%0,3\n"
931 " lghi %1,0xff\n" 843 " aghi %0,24\n"
932 " tmlh %2,0xffff\n" 844 " lghi %1,0xff\n"
933 " jo 3f\n" 845 " tmlh %2,0xffff\n"
934 " aghi %0,-16\n" 846 " jo 3f\n"
935 " srl %2,16\n" 847 " aghi %0,-16\n"
936 "3: tmll %2,0xff00\n" 848 " srl %2,16\n"
937 " jo 4f\n" 849 "3: tmll %2,0xff00\n"
938 " aghi %0,-8\n" 850 " jo 4f\n"
939 " srl %2,8\n" 851 " aghi %0,-8\n"
940 "4: ngr %2,%1\n" 852 " srl %2,8\n"
941 " ic %2,0(%2,%5)\n" 853 "4: ngr %2,%1\n"
942 " algr %0,%2\n" 854 " ic %2,0(%2,%5)\n"
943 "5:" 855 " algr %0,%2\n"
944 : "=&a" (res), "=&d" (cmp), "=&a" (count) 856 "5:"
857 : "=&a" (res), "=&d" (cmp), "=&a" (count)
945 : "a" (size), "a" (vaddr), "a" (&_zb_findmap), 858 : "a" (size), "a" (vaddr), "a" (&_zb_findmap),
946 "m" (*(addrtype *) vaddr) : "cc" ); 859 "m" (*(addrtype *) vaddr) : "cc");
947 return (res < size) ? res : size; 860 return (res < size) ? res : size;
948} 861}
949 862
@@ -963,13 +876,16 @@ ext2_find_next_zero_bit(void *vaddr, unsigned long size, unsigned long offset)
963 p = addr + offset / __BITOPS_WORDSIZE; 876 p = addr + offset / __BITOPS_WORDSIZE;
964 if (bit) { 877 if (bit) {
965#ifndef __s390x__ 878#ifndef __s390x__
966 asm(" ic %0,0(%1)\n" 879 asm volatile(
967 " icm %0,2,1(%1)\n" 880 " ic %0,0(%1)\n"
968 " icm %0,4,2(%1)\n" 881 " icm %0,2,1(%1)\n"
969 " icm %0,8,3(%1)" 882 " icm %0,4,2(%1)\n"
970 : "=&a" (word) : "a" (p), "m" (*p) : "cc" ); 883 " icm %0,8,3(%1)"
884 : "=&a" (word) : "a" (p), "m" (*p) : "cc");
971#else 885#else
972 asm(" lrvg %0,%1" : "=a" (word) : "m" (*p) ); 886 asm volatile(
887 " lrvg %0,%1"
888 : "=a" (word) : "m" (*p) );
973#endif 889#endif
974 /* 890 /*
975 * s390 version of ffz returns __BITOPS_WORDSIZE 891 * s390 version of ffz returns __BITOPS_WORDSIZE
generated by cgit v1.2.2 (git 2.25.0) at 2025-11-09 10:59:26 -0500