24 files changed, 236 insertions, 187 deletions

diff --git a/include/asm-ppc/fsl_ocp.h b/include/asm-ppc/fsl_ocp.h
deleted file mode 100644
index 050fbba8d049..000000000000
--- a/include/asm-ppc/fsl_ocp.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * include/asm-ppc/fsl_ocp.h
- *
- * Definitions for the on-chip peripherals on Freescale PPC processors
- *
- * Maintainer: Kumar Gala (kumar.gala@freescale.com)
- *
- * Copyright 2004 Freescale Semiconductor, Inc
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_FS_OCP_H__
-#define __ASM_FS_OCP_H__
-
-/* A table of information for supporting the Gianfar Ethernet Controller
- * This helps identify which enet controller we are dealing with,
- * and what type of enet controller it is
- */
-struct ocp_gfar_data {
-        uint interruptTransmit;
-        uint interruptError;
-        uint interruptReceive;
-        uint interruptPHY;
-        uint flags;
-        uint phyid;
-        uint phyregidx;
-        unsigned char mac_addr[6];
-};
-
-/* Flags in the flags field */
-#define GFAR_HAS_COALESCE               0x20
-#define GFAR_HAS_RMON                   0x10
-#define GFAR_HAS_MULTI_INTR             0x08
-#define GFAR_FIRM_SET_MACADDR           0x04
-#define GFAR_HAS_PHY_INTR               0x02    /* if not set use a timer */
-#define GFAR_HAS_GIGABIT                0x01
-
-/* Data structure for I2C support.  Just contains a couple flags
- * to distinguish various I2C implementations*/
-struct ocp_fs_i2c_data {
-        uint flags;
-};
-
-/* Flags for I2C */
-#define FS_I2C_SEPARATE_DFSRR   0x02
-#define FS_I2C_CLOCK_5200       0x01
-
-#endif  /* __ASM_FS_OCP_H__ */
-#endif  /* __KERNEL__ */
diff --git a/include/asm-ppc/irq.h b/include/asm-ppc/irq.h
index 06b86be61ed1..a9b33324f562 100644
--- a/include/asm-ppc/irq.h
+++ b/include/asm-ppc/irq.h
@@ -176,7 +176,7 @@ static __inline__ int irq_canonicalize(int irq)
 */
 #include <asm/mpc85xx.h>
 
-/* The MPC8560 openpic has  32 internal interrupts and 12 external
+/* The MPC8548 openpic has 48 internal interrupts and 12 external
  * interrupts.
  *
  * We are "flattening" the interrupt vectors of the cascaded CPM
@@ -184,7 +184,7 @@ static __inline__ int irq_canonicalize(int irq)
  * single integer.
  */
 #define NR_CPM_INTS     64
-#define NR_EPIC_INTS    44
+#define NR_EPIC_INTS    60
 #ifndef NR_8259_INTS
 #define NR_8259_INTS    0
 #endif
@@ -223,9 +223,15 @@ static __inline__ int irq_canonicalize(int irq)
 #define MPC85xx_IRQ_RIO_RX      (12 + MPC85xx_OPENPIC_IRQ_OFFSET)
 #define MPC85xx_IRQ_TSEC1_TX    (13 + MPC85xx_OPENPIC_IRQ_OFFSET)
 #define MPC85xx_IRQ_TSEC1_RX    (14 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_TSEC3_TX    (15 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_TSEC3_RX    (16 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_TSEC3_ERROR (17 + MPC85xx_OPENPIC_IRQ_OFFSET)
 #define MPC85xx_IRQ_TSEC1_ERROR (18 + MPC85xx_OPENPIC_IRQ_OFFSET)
 #define MPC85xx_IRQ_TSEC2_TX    (19 + MPC85xx_OPENPIC_IRQ_OFFSET)
 #define MPC85xx_IRQ_TSEC2_RX    (20 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_TSEC4_TX    (21 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_TSEC4_RX    (22 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_TSEC4_ERROR (23 + MPC85xx_OPENPIC_IRQ_OFFSET)
 #define MPC85xx_IRQ_TSEC2_ERROR (24 + MPC85xx_OPENPIC_IRQ_OFFSET)
 #define MPC85xx_IRQ_FEC         (25 + MPC85xx_OPENPIC_IRQ_OFFSET)
 #define MPC85xx_IRQ_DUART       (26 + MPC85xx_OPENPIC_IRQ_OFFSET)
@@ -235,18 +241,18 @@ static __inline__ int irq_canonicalize(int irq)
 #define MPC85xx_IRQ_CPM         (30 + MPC85xx_OPENPIC_IRQ_OFFSET)
 
 /* The 12 external interrupt lines */
-#define MPC85xx_IRQ_EXT0        (32 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT1        (33 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT2        (34 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT3        (35 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT4        (36 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT5        (37 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT6        (38 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT7        (39 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT8        (40 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT9        (41 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT10       (42 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT11       (43 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT0        (48 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT1        (49 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT2        (50 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT3        (51 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT4        (52 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT5        (53 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT6        (54 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT7        (55 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT8        (56 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT9        (57 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT10       (58 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT11       (59 + MPC85xx_OPENPIC_IRQ_OFFSET)
 
 /* CPM related interrupts */
 #define SIU_INT_ERROR           ((uint)0x00+CPM_IRQ_OFFSET)
diff --git a/include/asm-ppc/kexec.h b/include/asm-ppc/kexec.h
new file mode 100644
index 000000000000..73191310d8db
--- /dev/null
+++ b/include/asm-ppc/kexec.h
@@ -0,0 +1,38 @@
+#ifndef _PPC_KEXEC_H
+#define _PPC_KEXEC_H
+
+#ifdef CONFIG_KEXEC
+
+/*
+ * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
+ * I.e. Maximum page that is mapped directly into kernel memory,
+ * and kmap is not required.
+ *
+ * Someone correct me if FIXADDR_START - PAGEOFFSET is not the correct
+ * calculation for the amount of memory directly mappable into the
+ * kernel memory space.
+ */
+
+/* Maximum physical address we can use pages from */
+#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
+/* Maximum address we can reach in physical address mode */
+#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
+/* Maximum address we can use for the control code buffer */
+#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
+
+#define KEXEC_CONTROL_CODE_SIZE 4096
+
+/* The native architecture */
+#define KEXEC_ARCH KEXEC_ARCH_PPC
+
+#ifndef __ASSEMBLY__
+
+struct kimage;
+
+extern void machine_kexec_simple(struct kimage *image);
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* CONFIG_KEXEC */
+
+#endif /* _PPC_KEXEC_H */
diff --git a/include/asm-ppc/machdep.h b/include/asm-ppc/machdep.h
index b78d40870c95..1d4ab70a56f3 100644
--- a/include/asm-ppc/machdep.h
+++ b/include/asm-ppc/machdep.h
@@ -4,6 +4,7 @@
 
 #include <linux/config.h>
 #include <linux/init.h>
+#include <linux/kexec.h>
 
 #include <asm/setup.h>
 #include <asm/page.h>
@@ -114,6 +115,36 @@ struct machdep_calls {
         /* functions for dealing with other cpus */
         struct smp_ops_t *smp_ops;
 #endif /* CONFIG_SMP */
+
+#ifdef CONFIG_KEXEC
+        /* Called to shutdown machine specific hardware not already controlled
+         * by other drivers.
+         * XXX Should we move this one out of kexec scope?
+         */
+        void (*machine_shutdown)(void);
+
+        /* Called to do the minimal shutdown needed to run a kexec'd kernel
+         * to run successfully.
+         * XXX Should we move this one out of kexec scope?
+         */
+        void (*machine_crash_shutdown)(void);
+
+        /* Called to do what every setup is needed on image and the
+         * reboot code buffer. Returns 0 on success.
+         * Provide your own (maybe dummy) implementation if your platform
+         * claims to support kexec.
+         */
+        int (*machine_kexec_prepare)(struct kimage *image);
+
+        /* Called to handle any machine specific cleanup on image */
+        void (*machine_kexec_cleanup)(struct kimage *image);
+
+        /* Called to perform the _real_ kexec.
+         * Do NOT allocate memory or fail here. We are past the point of
+         * no return.
+         */
+        void (*machine_kexec)(struct kimage *image);
+#endif /* CONFIG_KEXEC */
 };
 
 extern struct machdep_calls ppc_md;
diff --git a/include/asm-ppc/macio.h b/include/asm-ppc/macio.h
index 2cafc9978607..a481b772d154 100644
--- a/include/asm-ppc/macio.h
+++ b/include/asm-ppc/macio.h
@@ -1,6 +1,7 @@
 #ifndef __MACIO_ASIC_H__
 #define __MACIO_ASIC_H__
 
+#include <linux/mod_devicetable.h>
 #include <asm/of_device.h>
 
 extern struct bus_type macio_bus_type;
@@ -120,10 +121,10 @@ static inline struct pci_dev *macio_get_pci_dev(struct macio_dev *mdev)
 struct macio_driver
 {
         char                    *name;
-        struct of_match         *match_table;
+        struct of_device_id     *match_table;
         struct module           *owner;
 
-        int     (*probe)(struct macio_dev* dev, const struct of_match *match);
+        int     (*probe)(struct macio_dev* dev, const struct of_device_id *match);
         int     (*remove)(struct macio_dev* dev);
 
         int     (*suspend)(struct macio_dev* dev, pm_message_t state);
diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h
index d465aee1c82e..9205db404c7a 100644
--- a/include/asm-ppc/mmu.h
+++ b/include/asm-ppc/mmu.h
@@ -405,7 +405,7 @@ typedef struct _P601_BAT {
 
 #define MAS0_TLBSEL(x)  ((x << 28) & 0x30000000)
 #define MAS0_ESEL(x)    ((x << 16) & 0x0FFF0000)
-#define MAS0_NV         0x00000FFF
+#define MAS0_NV(x)      ((x) & 0x00000FFF)
 
 #define MAS1_VALID      0x80000000
 #define MAS1_IPROT      0x40000000
diff --git a/include/asm-ppc/mmu_context.h b/include/asm-ppc/mmu_context.h
index 9222fa6ca172..ccabbce39d85 100644
--- a/include/asm-ppc/mmu_context.h
+++ b/include/asm-ppc/mmu_context.h
@@ -63,7 +63,7 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 #define LAST_CONTEXT            255
 #define FIRST_CONTEXT           1
 
-#elif defined(CONFIG_E500)
+#elif defined(CONFIG_E200) || defined(CONFIG_E500)
 #define NO_CONTEXT              256
 #define LAST_CONTEXT            255
 #define FIRST_CONTEXT           1
diff --git a/include/asm-ppc/mpc10x.h b/include/asm-ppc/mpc10x.h
index d8e7e2d6128e..f5196a4efbe0 100644
--- a/include/asm-ppc/mpc10x.h
+++ b/include/asm-ppc/mpc10x.h
@@ -159,6 +159,12 @@ extern unsigned long			ioremap_base;
 #define MPC10X_MAPA_EUMB_BASE           (ioremap_base - MPC10X_EUMB_SIZE)
 #define MPC10X_MAPB_EUMB_BASE           MPC10X_MAPA_EUMB_BASE
 
+enum ppc_sys_devices {
+        MPC10X_IIC1,
+        MPC10X_DMA0,
+        MPC10X_DMA1,
+        MPC10X_DUART,
+};
 
 int mpc10x_bridge_init(struct pci_controller *hose,
                        uint current_map,
diff --git a/include/asm-ppc/mpc85xx.h b/include/asm-ppc/mpc85xx.h
index 22713e331585..516984ee14b5 100644
--- a/include/asm-ppc/mpc85xx.h
+++ b/include/asm-ppc/mpc85xx.h
@@ -25,7 +25,7 @@
 #ifdef CONFIG_MPC8540_ADS
 #include <platforms/85xx/mpc8540_ads.h>
 #endif
-#ifdef CONFIG_MPC8555_CDS
+#if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS)
 #include <platforms/85xx/mpc8555_cds.h>
 #endif
 #ifdef CONFIG_MPC8560_ADS
@@ -74,7 +74,7 @@ extern unsigned char __res[];
 #define MPC85xx_GUTS_OFFSET     (0xe0000)
 #define MPC85xx_GUTS_SIZE       (0x01000)
 #define MPC85xx_IIC1_OFFSET     (0x03000)
-#define MPC85xx_IIC1_SIZE       (0x01000)
+#define MPC85xx_IIC1_SIZE       (0x00100)
 #define MPC85xx_OPENPIC_OFFSET  (0x40000)
 #define MPC85xx_OPENPIC_SIZE    (0x40000)
 #define MPC85xx_PCI1_OFFSET     (0x08000)
@@ -127,8 +127,64 @@ enum ppc_sys_devices {
         MPC85xx_CPM_MCC2,
         MPC85xx_CPM_SMC1,
         MPC85xx_CPM_SMC2,
+        MPC85xx_eTSEC1,
+        MPC85xx_eTSEC2,
+        MPC85xx_eTSEC3,
+        MPC85xx_eTSEC4,
+        MPC85xx_IIC2,
 };
 
+/* Internal interrupts are all Level Sensitive, and Positive Polarity */
+#define MPC85XX_INTERNAL_IRQ_SENSES \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  0 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  1 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  2 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  3 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  4 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  5 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  6 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  7 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  8 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  9 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 10 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 11 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 12 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 13 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 14 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 15 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 16 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 17 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 18 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 19 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 20 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 21 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 22 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 23 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 24 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 25 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 26 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 27 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 28 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 29 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 30 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 31 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 32 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 33 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 34 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 35 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 36 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 37 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 38 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 39 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 40 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 41 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 42 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 43 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 44 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 45 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 46 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE)       /* Internal 47 */
+
 #endif /* CONFIG_85xx */
 #endif /* __ASM_MPC85xx_H__ */
 #endif /* __KERNEL__ */
diff --git a/include/asm-ppc/mpc8xx.h b/include/asm-ppc/mpc8xx.h
index 714d69c819d3..7c31f2d564a1 100644
--- a/include/asm-ppc/mpc8xx.h
+++ b/include/asm-ppc/mpc8xx.h
@@ -68,6 +68,10 @@
 #include <platforms/lantec.h>
 #endif
 
+#if defined(CONFIG_MPC885ADS)
+#include <platforms/mpc885ads.h>
+#endif
+
 /* Currently, all 8xx boards that support a processor to PCI/ISA bridge
  * use the same memory map.
  */
diff --git a/include/asm-ppc/ocp.h b/include/asm-ppc/ocp.h
index b98db3cdae83..983116f59d90 100644
--- a/include/asm-ppc/ocp.h
+++ b/include/asm-ppc/ocp.h
@@ -189,7 +189,7 @@ extern void ocp_for_each_device(void(*callback)(struct ocp_device *, void *arg),
 /* Sysfs support */
 #define OCP_SYSFS_ADDTL(type, format, name, field)                      \
 static ssize_t                                                          \
-show_##name##_##field(struct device *dev, char *buf)                    \
+show_##name##_##field(struct device *dev, struct device_attribute *attr, char *buf)                     \
 {                                                                       \
         struct ocp_device *odev = to_ocp_dev(dev);                      \
         type *add = odev->def->additions;                               \
@@ -202,10 +202,6 @@ static DEVICE_ATTR(name##_##field, S_IRUGO, show_##name##_##field, NULL);
 #include <asm/ibm_ocp.h>
 #endif
 
-#ifdef CONFIG_FSL_OCP
-#include <asm/fsl_ocp.h>
-#endif
-
 #endif                          /* CONFIG_PPC_OCP */
 #endif                          /* __OCP_H__ */
 #endif                          /* __KERNEL__ */
diff --git a/include/asm-ppc/of_device.h b/include/asm-ppc/of_device.h
index 7229735a7c18..4b264cfd3998 100644
--- a/include/asm-ppc/of_device.h
+++ b/include/asm-ppc/of_device.h
@@ -24,20 +24,8 @@ struct of_device
 };
 #define to_of_device(d) container_of(d, struct of_device, dev)
 
-/*
- * Struct used for matching a device
- */
-struct of_match
-{
-        char    *name;
-        char    *type;
-        char    *compatible;
-        void    *data;
-};
-#define OF_ANY_MATCH            ((char *)-1L)
-
-extern const struct of_match *of_match_device(
-        const struct of_match *matches, const struct of_device *dev);
+extern const struct of_device_id *of_match_device(
+        const struct of_device_id *matches, const struct of_device *dev);
 
 extern struct of_device *of_dev_get(struct of_device *dev);
 extern void of_dev_put(struct of_device *dev);
@@ -49,10 +37,10 @@ extern void of_dev_put(struct of_device *dev);
 struct of_platform_driver
 {
         char                    *name;
-        struct of_match         *match_table;
+        struct of_device_id     *match_table;
         struct module           *owner;
 
-        int     (*probe)(struct of_device* dev, const struct of_match *match);
+        int     (*probe)(struct of_device* dev, const struct of_device_id *match);
         int     (*remove)(struct of_device* dev);
 
         int     (*suspend)(struct of_device* dev, pm_message_t state);
diff --git a/include/asm-ppc/open_pic.h b/include/asm-ppc/open_pic.h
index dbe853319741..7848aa610c05 100644
--- a/include/asm-ppc/open_pic.h
+++ b/include/asm-ppc/open_pic.h
@@ -25,6 +25,11 @@
 #define OPENPIC_VEC_IPI         118     /* and up */
 #define OPENPIC_VEC_SPURIOUS    255
 
+/* Priorities */
+#define OPENPIC_PRIORITY_IPI_BASE       10
+#define OPENPIC_PRIORITY_DEFAULT        4
+#define OPENPIC_PRIORITY_NMI            9
+
 /* OpenPIC IRQ controller structure */
 extern struct hw_interrupt_type open_pic;
 
@@ -42,6 +47,7 @@ extern int epic_serial_mode;
 extern void openpic_set_sources(int first_irq, int num_irqs, void __iomem *isr);
 extern void openpic_init(int linux_irq_offset);
 extern void openpic_init_nmi_irq(u_int irq);
+extern void openpic_set_irq_priority(u_int irq, u_int pri);
 extern void openpic_hookup_cascade(u_int irq, char *name,
                                    int (*cascade_fn)(struct pt_regs *));
 extern u_int openpic_irq(void);
diff --git a/include/asm-ppc/pc_serial.h b/include/asm-ppc/pc_serial.h
index fa9cbb67ce3e..8f994f9f8857 100644
--- a/include/asm-ppc/pc_serial.h
+++ b/include/asm-ppc/pc_serial.h
@@ -35,93 +35,9 @@
 #define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
 #endif
 
-#ifdef CONFIG_SERIAL_MANY_PORTS
-#define FOURPORT_FLAGS ASYNC_FOURPORT
-#define ACCENT_FLAGS 0
-#define BOCA_FLAGS 0
-#define HUB6_FLAGS 0
-#endif
-        
-/*
- * The following define the access methods for the HUB6 card. All
- * access is through two ports for all 24 possible chips. The card is
- * selected through the high 2 bits, the port on that card with the
- * "middle" 3 bits, and the register on that port with the bottom
- * 3 bits.
- *
- * While the access port and interrupt is configurable, the default
- * port locations are 0x302 for the port control register, and 0x303
- * for the data read/write register. Normally, the interrupt is at irq3
- * but can be anything from 3 to 7 inclusive. Note that using 3 will
- * require disabling com2.
- */
-
-#define C_P(card,port) (((card)<<6|(port)<<3) + 1)
-
-#define STD_SERIAL_PORT_DEFNS                   \
+#define SERIAL_PORT_DFNS                        \
         /* UART CLK   PORT IRQ     FLAGS        */                      \
         { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS },      /* ttyS0 */     \
         { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS },      /* ttyS1 */     \
         { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS },      /* ttyS2 */     \
         { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS },     /* ttyS3 */
-
-
-#ifdef CONFIG_SERIAL_MANY_PORTS
-#define EXTRA_SERIAL_PORT_DEFNS                 \
-        { 0, BASE_BAUD, 0x1A0, 9, FOURPORT_FLAGS },     /* ttyS4 */     \
-        { 0, BASE_BAUD, 0x1A8, 9, FOURPORT_FLAGS },     /* ttyS5 */     \
-        { 0, BASE_BAUD, 0x1B0, 9, FOURPORT_FLAGS },     /* ttyS6 */     \
-        { 0, BASE_BAUD, 0x1B8, 9, FOURPORT_FLAGS },     /* ttyS7 */     \
-        { 0, BASE_BAUD, 0x2A0, 5, FOURPORT_FLAGS },     /* ttyS8 */     \
-        { 0, BASE_BAUD, 0x2A8, 5, FOURPORT_FLAGS },     /* ttyS9 */     \
-        { 0, BASE_BAUD, 0x2B0, 5, FOURPORT_FLAGS },     /* ttyS10 */    \
-        { 0, BASE_BAUD, 0x2B8, 5, FOURPORT_FLAGS },     /* ttyS11 */    \
-        { 0, BASE_BAUD, 0x330, 4, ACCENT_FLAGS },       /* ttyS12 */    \
-        { 0, BASE_BAUD, 0x338, 4, ACCENT_FLAGS },       /* ttyS13 */    \
-        { 0, BASE_BAUD, 0x000, 0, 0 },  /* ttyS14 (spare) */            \
-        { 0, BASE_BAUD, 0x000, 0, 0 },  /* ttyS15 (spare) */            \
-        { 0, BASE_BAUD, 0x100, 12, BOCA_FLAGS },        /* ttyS16 */    \
-        { 0, BASE_BAUD, 0x108, 12, BOCA_FLAGS },        /* ttyS17 */    \
-        { 0, BASE_BAUD, 0x110, 12, BOCA_FLAGS },        /* ttyS18 */    \
-        { 0, BASE_BAUD, 0x118, 12, BOCA_FLAGS },        /* ttyS19 */    \
-        { 0, BASE_BAUD, 0x120, 12, BOCA_FLAGS },        /* ttyS20 */    \
-        { 0, BASE_BAUD, 0x128, 12, BOCA_FLAGS },        /* ttyS21 */    \
-        { 0, BASE_BAUD, 0x130, 12, BOCA_FLAGS },        /* ttyS22 */    \
-        { 0, BASE_BAUD, 0x138, 12, BOCA_FLAGS },        /* ttyS23 */    \
-        { 0, BASE_BAUD, 0x140, 12, BOCA_FLAGS },        /* ttyS24 */    \
-        { 0, BASE_BAUD, 0x148, 12, BOCA_FLAGS },        /* ttyS25 */    \
-        { 0, BASE_BAUD, 0x150, 12, BOCA_FLAGS },        /* ttyS26 */    \
-        { 0, BASE_BAUD, 0x158, 12, BOCA_FLAGS },        /* ttyS27 */    \
-        { 0, BASE_BAUD, 0x160, 12, BOCA_FLAGS },        /* ttyS28 */    \
-        { 0, BASE_BAUD, 0x168, 12, BOCA_FLAGS },        /* ttyS29 */    \
-        { 0, BASE_BAUD, 0x170, 12, BOCA_FLAGS },        /* ttyS30 */    \
-        { 0, BASE_BAUD, 0x178, 12, BOCA_FLAGS },        /* ttyS31 */
-#else
-#define EXTRA_SERIAL_PORT_DEFNS
-#endif
-
-/* You can have up to four HUB6's in the system, but I've only
- * included two cards here for a total of twelve ports.
- */
-#if (defined(CONFIG_HUB6) && defined(CONFIG_SERIAL_MANY_PORTS))
-#define HUB6_SERIAL_PORT_DFNS           \
-        { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,0) },  /* ttyS32 */ \
-        { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,1) },  /* ttyS33 */ \
-        { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,2) },  /* ttyS34 */ \
-        { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,3) },  /* ttyS35 */ \
-        { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,4) },  /* ttyS36 */ \
-        { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,5) },  /* ttyS37 */ \
-        { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,0) },  /* ttyS38 */ \
-        { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,1) },  /* ttyS39 */ \
-        { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,2) },  /* ttyS40 */ \
-        { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,3) },  /* ttyS41 */ \
-        { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,4) },  /* ttyS42 */ \
-        { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,5) },  /* ttyS43 */
-#else
-#define HUB6_SERIAL_PORT_DFNS
-#endif
-
-#define SERIAL_PORT_DFNS                \
-        STD_SERIAL_PORT_DEFNS           \
-        EXTRA_SERIAL_PORT_DEFNS         \
-        HUB6_SERIAL_PORT_DFNS
diff --git a/include/asm-ppc/pci.h b/include/asm-ppc/pci.h
index ebd34fffc730..a13d55870e62 100644
--- a/include/asm-ppc/pci.h
+++ b/include/asm-ppc/pci.h
@@ -69,6 +69,16 @@ extern unsigned long pci_bus_to_phys(unsigned int ba, int busnr);
 #define pci_unmap_len(PTR, LEN_NAME)            (0)
 #define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)
 
+#ifdef CONFIG_PCI
+static inline void pci_dma_burst_advice(struct pci_dev *pdev,
+                                        enum pci_dma_burst_strategy *strat,
+                                        unsigned long *strategy_parameter)
+{
+        *strat = PCI_DMA_BURST_INFINITY;
+        *strategy_parameter = ~0UL;
+}
+#endif
+
 /*
  * At present there are very few 32-bit PPC machines that can have
  * memory above the 4GB point, and we don't support that.
@@ -103,6 +113,12 @@ extern pgprot_t	pci_phys_mem_access_prot(struct file *file,
                                          unsigned long size,
                                          pgprot_t prot);
 
+#define HAVE_ARCH_PCI_RESOURCE_TO_USER
+extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
+                                 const struct resource *rsrc,
+                                 u64 *start, u64 *end);
+
+
 #endif  /* __KERNEL__ */
 
 #endif /* __PPC_PCI_H */
diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
index a38606d15549..4d4b20c9de78 100644
--- a/include/asm-ppc/pgtable.h
+++ b/include/asm-ppc/pgtable.h
@@ -267,8 +267,6 @@ extern unsigned long ioremap_bot, ioremap_base;
 #define _PMD_PRESENT_MASK (PAGE_MASK)
 #define _PMD_BAD        (~PAGE_MASK)
 
-#define NUM_TLBCAMS     (16)
-
 #elif defined(CONFIG_8xx)
 /* Definitions for 8xx embedded chips. */
 #define _PAGE_PRESENT   0x0001  /* Page is valid */
diff --git a/include/asm-ppc/ppc_asm.h b/include/asm-ppc/ppc_asm.h
index 13fa8e7483c1..f76221def484 100644
--- a/include/asm-ppc/ppc_asm.h
+++ b/include/asm-ppc/ppc_asm.h
@@ -174,6 +174,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
 #define CLR_TOP32(r)
 #endif /* CONFIG_PPC64BRIDGE */
 
+#define RFCI            .long 0x4c000066        /* rfci instruction */
+#define RFDI            .long 0x4c00004e        /* rfdi instruction */
 #define RFMCI           .long 0x4c00004c        /* rfmci instruction */
 
 #ifdef CONFIG_IBM405_ERR77
diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h
index 24b991c42769..8ea624566231 100644
--- a/include/asm-ppc/ppc_sys.h
+++ b/include/asm-ppc/ppc_sys.h
@@ -27,6 +27,8 @@
 #include <asm/mpc85xx.h>
 #elif defined(CONFIG_PPC_MPC52xx)
 #include <asm/mpc52xx.h>
+#elif defined(CONFIG_MPC10X_BRIDGE)
+#include <asm/mpc10x.h>
 #else
 #error "need definition of ppc_sys_devices"
 #endif
diff --git a/include/asm-ppc/reg.h b/include/asm-ppc/reg.h
index c418aab7cd34..88b4222154d4 100644
--- a/include/asm-ppc/reg.h
+++ b/include/asm-ppc/reg.h
@@ -160,6 +160,7 @@
 #define HID0_ICFI       (1<<11)         /* Instr. Cache Flash Invalidate */
 #define HID0_DCI        (1<<10)         /* Data Cache Invalidate */
 #define HID0_SPD        (1<<9)          /* Speculative disable */
+#define HID0_DAPUEN     (1<<8)          /* Debug APU enable */
 #define HID0_SGE        (1<<7)          /* Store Gathering Enable */
 #define HID0_SIED       (1<<7)          /* Serial Instr. Execution [Disable] */
 #define HID0_DFCA       (1<<6)          /* Data Cache Flush Assist */
diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h
index 45c5e6f2b7ab..00ad9c754c78 100644
--- a/include/asm-ppc/reg_booke.h
+++ b/include/asm-ppc/reg_booke.h
@@ -165,6 +165,8 @@ do {						\
 #define SPRN_MCSRR1     0x23B   /* Machine Check Save and Restore Register 1 */
 #define SPRN_MCSR       0x23C   /* Machine Check Status Register */
 #define SPRN_MCAR       0x23D   /* Machine Check Address Register */
+#define SPRN_DSRR0      0x23E   /* Debug Save and Restore Register 0 */
+#define SPRN_DSRR1      0x23F   /* Debug Save and Restore Register 1 */
 #define SPRN_MAS0       0x270   /* MMU Assist Register 0 */
 #define SPRN_MAS1       0x271   /* MMU Assist Register 1 */
 #define SPRN_MAS2       0x272   /* MMU Assist Register 2 */
@@ -264,6 +266,17 @@ do {						\
 #define MCSR_BUS_IPERR  0x00000002UL /* Instruction parity Error */
 #define MCSR_BUS_RPERR  0x00000001UL /* Read parity Error */
 #endif
+#ifdef CONFIG_E200
+#define MCSR_MCP        0x80000000UL /* Machine Check Input Pin */
+#define MCSR_CP_PERR    0x20000000UL /* Cache Push Parity Error */
+#define MCSR_CPERR      0x10000000UL /* Cache Parity Error */
+#define MCSR_EXCP_ERR   0x08000000UL /* ISI, ITLB, or Bus Error on 1st insn
+                                        fetch for an exception handler */
+#define MCSR_BUS_IRERR  0x00000010UL /* Read Bus Error on instruction fetch*/
+#define MCSR_BUS_DRERR  0x00000008UL /* Read Bus Error on data load */
+#define MCSR_BUS_WRERR  0x00000004UL /* Write Bus Error on buffered
+                                        store or cache line push */
+#endif
 
 /* Bit definitions for the DBSR. */
 /*
@@ -311,6 +324,7 @@ do {						\
 #define ESR_ST          0x00800000      /* Store Operation */
 #define ESR_DLK         0x00200000      /* Data Cache Locking */
 #define ESR_ILK         0x00100000      /* Instr. Cache Locking */
+#define ESR_PUO         0x00040000      /* Unimplemented Operation exception */
 #define ESR_BO          0x00020000      /* Byte Ordering */
 
 /* Bit definitions related to the DBCR0. */
@@ -387,10 +401,12 @@ do {						\
 #define ICCR_CACHE      1               /* Cacheable */
 
 /* Bit definitions for L1CSR0. */
+#define L1CSR0_CLFC     0x00000100      /* Cache Lock Bits Flash Clear */
 #define L1CSR0_DCFI     0x00000002      /* Data Cache Flash Invalidate */
+#define L1CSR0_CFI      0x00000002      /* Cache Flash Invalidate */
 #define L1CSR0_DCE      0x00000001      /* Data Cache Enable */
 
-/* Bit definitions for L1CSR0. */
+/* Bit definitions for L1CSR1. */
 #define L1CSR1_ICLFR    0x00000100      /* Instr Cache Lock Bits Flash Reset */
 #define L1CSR1_ICFI     0x00000002      /* Instr Cache Flash Invalidate */
 #define L1CSR1_ICE      0x00000001      /* Instr Cache Enable */
diff --git a/include/asm-ppc/seccomp.h b/include/asm-ppc/seccomp.h
new file mode 100644
index 000000000000..666c4da96d87
--- /dev/null
+++ b/include/asm-ppc/seccomp.h
@@ -0,0 +1,10 @@
+#ifndef _ASM_SECCOMP_H
+
+#include <linux/unistd.h>
+
+#define __NR_seccomp_read __NR_read
+#define __NR_seccomp_write __NR_write
+#define __NR_seccomp_exit __NR_exit
+#define __NR_seccomp_sigreturn __NR_rt_sigreturn
+
+#endif /* _ASM_SECCOMP_H */
diff --git a/include/asm-ppc/smp.h b/include/asm-ppc/smp.h
index ebfb614f55f6..17530c232c76 100644
--- a/include/asm-ppc/smp.h
+++ b/include/asm-ppc/smp.h
@@ -44,7 +44,7 @@ extern void smp_message_recv(int, struct pt_regs *);
 #define NO_PROC_ID              0xFF            /* No processor magic marker */
 #define PROC_CHANGE_PENALTY     20
 
-#define smp_processor_id() (current_thread_info()->cpu)
+#define raw_smp_processor_id()  (current_thread_info()->cpu)
 
 extern int __cpu_up(unsigned int cpu);
 
diff --git a/include/asm-ppc/thread_info.h b/include/asm-ppc/thread_info.h
index f7f01524e8a8..27903db42efc 100644
--- a/include/asm-ppc/thread_info.h
+++ b/include/asm-ppc/thread_info.h
@@ -20,7 +20,8 @@ struct thread_info {
         unsigned long           flags;          /* low level flags */
         unsigned long           local_flags;    /* non-racy flags */
         int                     cpu;            /* cpu we're on */
-        int                     preempt_count;
+        int                     preempt_count;  /* 0 => preemptable,
+                                                   <0 => BUG */
         struct restart_block    restart_block;
 };
 
@@ -77,12 +78,19 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_POLLING_NRFLAG      4       /* true if poll_idle() is polling
                                            TIF_NEED_RESCHED */
 #define TIF_MEMDIE              5
+#define TIF_SYSCALL_AUDIT       6       /* syscall auditing active */
+#define TIF_SECCOMP             7      /* secure computing */
+
 /* as above, but as bit values */
 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
 #define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
 #define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
+#define _TIF_SYSCALL_AUDIT      (1<<TIF_SYSCALL_AUDIT)
+#define _TIF_SECCOMP            (1<<TIF_SECCOMP)
+
+#define _TIF_SYSCALL_T_OR_A     (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP)
 
 /*
  * Non racy (local) flags bit numbers
diff --git a/include/asm-ppc/unistd.h b/include/asm-ppc/unistd.h
index cc51e5c9acc2..a7894e0fbbb1 100644
--- a/include/asm-ppc/unistd.h
+++ b/include/asm-ppc/unistd.h
@@ -262,7 +262,7 @@
 #define __NR_rtas               255
 #define __NR_sys_debug_setcontext 256
 /* Number 257 is reserved for vserver */
-/* Number 258 is reserved for new sys_remap_file_pages */
+/* 258 currently unused */
 /* Number 259 is reserved for new sys_mbind */
 /* Number 260 is reserved for new sys_get_mempolicy */
 /* Number 261 is reserved for new sys_set_mempolicy */
@@ -277,8 +277,10 @@
 #define __NR_request_key        270
 #define __NR_keyctl             271
 #define __NR_waitid             272
+#define __NR_ioprio_set         273
+#define __NR_ioprio_get         274
 
-#define __NR_syscalls           273
+#define __NR_syscalls           275
 
 #define __NR(n) #n