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-rw-r--r--include/asm-ppc/dma-mapping.h237
-rw-r--r--include/asm-ppc/io.h17
2 files changed, 17 insertions, 237 deletions
diff --git a/include/asm-ppc/dma-mapping.h b/include/asm-ppc/dma-mapping.h
deleted file mode 100644
index 6e9635114433..000000000000
--- a/include/asm-ppc/dma-mapping.h
+++ /dev/null
@@ -1,237 +0,0 @@
1/*
2 * This is based on both include/asm-sh/dma-mapping.h and
3 * include/asm-ppc/pci.h
4 */
5#ifndef __ASM_PPC_DMA_MAPPING_H
6#define __ASM_PPC_DMA_MAPPING_H
7
8#include <linux/config.h>
9/* need struct page definitions */
10#include <linux/mm.h>
11#include <asm/scatterlist.h>
12#include <asm/io.h>
13
14#ifdef CONFIG_NOT_COHERENT_CACHE
15/*
16 * DMA-consistent mapping functions for PowerPCs that don't support
17 * cache snooping. These allocate/free a region of uncached mapped
18 * memory space for use with DMA devices. Alternatively, you could
19 * allocate the space "normally" and use the cache management functions
20 * to ensure it is consistent.
21 */
22extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp);
23extern void __dma_free_coherent(size_t size, void *vaddr);
24extern void __dma_sync(void *vaddr, size_t size, int direction);
25extern void __dma_sync_page(struct page *page, unsigned long offset,
26 size_t size, int direction);
27#define dma_cache_inv(_start,_size) \
28 invalidate_dcache_range(_start, (_start + _size))
29#define dma_cache_wback(_start,_size) \
30 clean_dcache_range(_start, (_start + _size))
31#define dma_cache_wback_inv(_start,_size) \
32 flush_dcache_range(_start, (_start + _size))
33
34#else /* ! CONFIG_NOT_COHERENT_CACHE */
35/*
36 * Cache coherent cores.
37 */
38
39#define dma_cache_inv(_start,_size) do { } while (0)
40#define dma_cache_wback(_start,_size) do { } while (0)
41#define dma_cache_wback_inv(_start,_size) do { } while (0)
42
43#define __dma_alloc_coherent(gfp, size, handle) NULL
44#define __dma_free_coherent(size, addr) do { } while (0)
45#define __dma_sync(addr, size, rw) do { } while (0)
46#define __dma_sync_page(pg, off, sz, rw) do { } while (0)
47
48#endif /* ! CONFIG_NOT_COHERENT_CACHE */
49
50#define dma_supported(dev, mask) (1)
51
52static inline int dma_set_mask(struct device *dev, u64 dma_mask)
53{
54 if (!dev->dma_mask || !dma_supported(dev, mask))
55 return -EIO;
56
57 *dev->dma_mask = dma_mask;
58
59 return 0;
60}
61
62static inline void *dma_alloc_coherent(struct device *dev, size_t size,
63 dma_addr_t * dma_handle,
64 gfp_t gfp)
65{
66#ifdef CONFIG_NOT_COHERENT_CACHE
67 return __dma_alloc_coherent(size, dma_handle, gfp);
68#else
69 void *ret;
70 /* ignore region specifiers */
71 gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
72
73 if (dev == NULL || dev->coherent_dma_mask < 0xffffffff)
74 gfp |= GFP_DMA;
75
76 ret = (void *)__get_free_pages(gfp, get_order(size));
77
78 if (ret != NULL) {
79 memset(ret, 0, size);
80 *dma_handle = virt_to_bus(ret);
81 }
82
83 return ret;
84#endif
85}
86
87static inline void
88dma_free_coherent(struct device *dev, size_t size, void *vaddr,
89 dma_addr_t dma_handle)
90{
91#ifdef CONFIG_NOT_COHERENT_CACHE
92 __dma_free_coherent(size, vaddr);
93#else
94 free_pages((unsigned long)vaddr, get_order(size));
95#endif
96}
97
98static inline dma_addr_t
99dma_map_single(struct device *dev, void *ptr, size_t size,
100 enum dma_data_direction direction)
101{
102 BUG_ON(direction == DMA_NONE);
103
104 __dma_sync(ptr, size, direction);
105
106 return virt_to_bus(ptr);
107}
108
109/* We do nothing. */
110#define dma_unmap_single(dev, addr, size, dir) do { } while (0)
111
112static inline dma_addr_t
113dma_map_page(struct device *dev, struct page *page,
114 unsigned long offset, size_t size,
115 enum dma_data_direction direction)
116{
117 BUG_ON(direction == DMA_NONE);
118
119 __dma_sync_page(page, offset, size, direction);
120
121 return page_to_bus(page) + offset;
122}
123
124/* We do nothing. */
125#define dma_unmap_page(dev, handle, size, dir) do { } while (0)
126
127static inline int
128dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
129 enum dma_data_direction direction)
130{
131 int i;
132
133 BUG_ON(direction == DMA_NONE);
134
135 for (i = 0; i < nents; i++, sg++) {
136 BUG_ON(!sg->page);
137 __dma_sync_page(sg->page, sg->offset, sg->length, direction);
138 sg->dma_address = page_to_bus(sg->page) + sg->offset;
139 }
140
141 return nents;
142}
143
144/* We don't do anything here. */
145#define dma_unmap_sg(dev, sg, nents, dir) do { } while (0)
146
147static inline void
148dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
149 size_t size,
150 enum dma_data_direction direction)
151{
152 BUG_ON(direction == DMA_NONE);
153
154 __dma_sync(bus_to_virt(dma_handle), size, direction);
155}
156
157static inline void
158dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
159 size_t size,
160 enum dma_data_direction direction)
161{
162 BUG_ON(direction == DMA_NONE);
163
164 __dma_sync(bus_to_virt(dma_handle), size, direction);
165}
166
167static inline void
168dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
169 enum dma_data_direction direction)
170{
171 int i;
172
173 BUG_ON(direction == DMA_NONE);
174
175 for (i = 0; i < nents; i++, sg++)
176 __dma_sync_page(sg->page, sg->offset, sg->length, direction);
177}
178
179static inline void
180dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
181 enum dma_data_direction direction)
182{
183 int i;
184
185 BUG_ON(direction == DMA_NONE);
186
187 for (i = 0; i < nents; i++, sg++)
188 __dma_sync_page(sg->page, sg->offset, sg->length, direction);
189}
190
191#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
192#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
193#ifdef CONFIG_NOT_COHERENT_CACHE
194#define dma_is_consistent(d) (0)
195#else
196#define dma_is_consistent(d) (1)
197#endif
198
199static inline int dma_get_cache_alignment(void)
200{
201 /*
202 * Each processor family will define its own L1_CACHE_SHIFT,
203 * L1_CACHE_BYTES wraps to this, so this is always safe.
204 */
205 return L1_CACHE_BYTES;
206}
207
208static inline void
209dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
210 unsigned long offset, size_t size,
211 enum dma_data_direction direction)
212{
213 /* just sync everything for now */
214 dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
215}
216
217static inline void
218dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
219 unsigned long offset, size_t size,
220 enum dma_data_direction direction)
221{
222 /* just sync everything for now */
223 dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
224}
225
226static inline void dma_cache_sync(void *vaddr, size_t size,
227 enum dma_data_direction direction)
228{
229 __dma_sync(vaddr, size, (int)direction);
230}
231
232static inline int dma_mapping_error(dma_addr_t dma_addr)
233{
234 return 0;
235}
236
237#endif /* __ASM_PPC_DMA_MAPPING_H */
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index 2bfdf9c98459..84ac6e258eef 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -545,6 +545,23 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
545#include <asm/mpc8260_pci9.h> 545#include <asm/mpc8260_pci9.h>
546#endif 546#endif
547 547
548#ifdef CONFIG_NOT_COHERENT_CACHE
549
550#define dma_cache_inv(_start,_size) \
551 invalidate_dcache_range(_start, (_start + _size))
552#define dma_cache_wback(_start,_size) \
553 clean_dcache_range(_start, (_start + _size))
554#define dma_cache_wback_inv(_start,_size) \
555 flush_dcache_range(_start, (_start + _size))
556
557#else
558
559#define dma_cache_inv(_start,_size) do { } while (0)
560#define dma_cache_wback(_start,_size) do { } while (0)
561#define dma_cache_wback_inv(_start,_size) do { } while (0)
562
563#endif
564
548/* 565/*
549 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 566 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
550 * access 567 * access
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-27 17:50:02 -0500