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-rw-r--r--include/asm-ppc/cache.h84
-rw-r--r--include/asm-ppc/cacheflush.h49
-rw-r--r--include/asm-ppc/current.h11
-rw-r--r--include/asm-ppc/signal.h153
4 files changed, 0 insertions, 297 deletions
diff --git a/include/asm-ppc/cache.h b/include/asm-ppc/cache.h
deleted file mode 100644
index 7a157d0f4b5f..000000000000
--- a/include/asm-ppc/cache.h
+++ /dev/null
@@ -1,84 +0,0 @@
1/*
2 * include/asm-ppc/cache.h
3 */
4#ifdef __KERNEL__
5#ifndef __ARCH_PPC_CACHE_H
6#define __ARCH_PPC_CACHE_H
7
8#include <linux/config.h>
9
10/* bytes per L1 cache line */
11#if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
12#define L1_CACHE_SHIFT 4
13#define MAX_COPY_PREFETCH 1
14#elif defined(CONFIG_PPC64BRIDGE)
15#define L1_CACHE_SHIFT 7
16#define MAX_COPY_PREFETCH 1
17#else
18#define L1_CACHE_SHIFT 5
19#define MAX_COPY_PREFETCH 4
20#endif
21
22#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
23
24#define SMP_CACHE_BYTES L1_CACHE_BYTES
25#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */
26
27#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
28#define L1_CACHE_PAGES 8
29
30#ifndef __ASSEMBLY__
31extern void clean_dcache_range(unsigned long start, unsigned long stop);
32extern void flush_dcache_range(unsigned long start, unsigned long stop);
33extern void invalidate_dcache_range(unsigned long start, unsigned long stop);
34extern void flush_dcache_all(void);
35#endif /* __ASSEMBLY__ */
36
37/* prep registers for L2 */
38#define CACHECRBA 0x80000823 /* Cache configuration register address */
39#define L2CACHE_MASK 0x03 /* Mask for 2 L2 Cache bits */
40#define L2CACHE_512KB 0x00 /* 512KB */
41#define L2CACHE_256KB 0x01 /* 256KB */
42#define L2CACHE_1MB 0x02 /* 1MB */
43#define L2CACHE_NONE 0x03 /* NONE */
44#define L2CACHE_PARITY 0x08 /* Mask for L2 Cache Parity Protected bit */
45
46#ifdef CONFIG_8xx
47/* Cache control on the MPC8xx is provided through some additional
48 * special purpose registers.
49 */
50#define SPRN_IC_CST 560 /* Instruction cache control/status */
51#define SPRN_IC_ADR 561 /* Address needed for some commands */
52#define SPRN_IC_DAT 562 /* Read-only data register */
53#define SPRN_DC_CST 568 /* Data cache control/status */
54#define SPRN_DC_ADR 569 /* Address needed for some commands */
55#define SPRN_DC_DAT 570 /* Read-only data register */
56
57/* Commands. Only the first few are available to the instruction cache.
58*/
59#define IDC_ENABLE 0x02000000 /* Cache enable */
60#define IDC_DISABLE 0x04000000 /* Cache disable */
61#define IDC_LDLCK 0x06000000 /* Load and lock */
62#define IDC_UNLINE 0x08000000 /* Unlock line */
63#define IDC_UNALL 0x0a000000 /* Unlock all */
64#define IDC_INVALL 0x0c000000 /* Invalidate all */
65
66#define DC_FLINE 0x0e000000 /* Flush data cache line */
67#define DC_SFWT 0x01000000 /* Set forced writethrough mode */
68#define DC_CFWT 0x03000000 /* Clear forced writethrough mode */
69#define DC_SLES 0x05000000 /* Set little endian swap mode */
70#define DC_CLES 0x07000000 /* Clear little endian swap mode */
71
72/* Status.
73*/
74#define IDC_ENABLED 0x80000000 /* Cache is enabled */
75#define IDC_CERR1 0x00200000 /* Cache error 1 */
76#define IDC_CERR2 0x00100000 /* Cache error 2 */
77#define IDC_CERR3 0x00080000 /* Cache error 3 */
78
79#define DC_DFWT 0x40000000 /* Data cache is forced write through */
80#define DC_LES 0x20000000 /* Caches are little endian mode */
81#endif /* CONFIG_8xx */
82
83#endif
84#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/cacheflush.h b/include/asm-ppc/cacheflush.h
deleted file mode 100644
index 6a243efb3317..000000000000
--- a/include/asm-ppc/cacheflush.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * include/asm-ppc/cacheflush.h
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#ifdef __KERNEL__
10#ifndef _PPC_CACHEFLUSH_H
11#define _PPC_CACHEFLUSH_H
12
13#include <linux/mm.h>
14
15/*
16 * No cache flushing is required when address mappings are
17 * changed, because the caches on PowerPCs are physically
18 * addressed. -- paulus
19 * Also, when SMP we use the coherency (M) bit of the
20 * BATs and PTEs. -- Cort
21 */
22#define flush_cache_all() do { } while (0)
23#define flush_cache_mm(mm) do { } while (0)
24#define flush_cache_range(vma, a, b) do { } while (0)
25#define flush_cache_page(vma, p, pfn) do { } while (0)
26#define flush_icache_page(vma, page) do { } while (0)
27#define flush_cache_vmap(start, end) do { } while (0)
28#define flush_cache_vunmap(start, end) do { } while (0)
29
30extern void flush_dcache_page(struct page *page);
31#define flush_dcache_mmap_lock(mapping) do { } while (0)
32#define flush_dcache_mmap_unlock(mapping) do { } while (0)
33
34extern void flush_icache_range(unsigned long, unsigned long);
35extern void flush_icache_user_range(struct vm_area_struct *vma,
36 struct page *page, unsigned long addr, int len);
37
38#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
39do { memcpy(dst, src, len); \
40 flush_icache_user_range(vma, page, vaddr, len); \
41} while (0)
42#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
43 memcpy(dst, src, len)
44
45extern void __flush_dcache_icache(void *page_va);
46extern void __flush_dcache_icache_phys(unsigned long physaddr);
47extern void flush_dcache_icache_page(struct page *page);
48#endif /* _PPC_CACHEFLUSH_H */
49#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/current.h b/include/asm-ppc/current.h
deleted file mode 100644
index 8d41501ba10d..000000000000
--- a/include/asm-ppc/current.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _PPC_CURRENT_H
3#define _PPC_CURRENT_H
4
5/*
6 * We keep `current' in r2 for speed.
7 */
8register struct task_struct *current asm ("r2");
9
10#endif /* !(_PPC_CURRENT_H) */
11#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/signal.h b/include/asm-ppc/signal.h
deleted file mode 100644
index caf6ede3710f..000000000000
--- a/include/asm-ppc/signal.h
+++ /dev/null
@@ -1,153 +0,0 @@
1#ifndef _ASMPPC_SIGNAL_H
2#define _ASMPPC_SIGNAL_H
3
4#ifdef __KERNEL__
5#include <linux/types.h>
6#endif /* __KERNEL__ */
7
8/* Avoid too many header ordering problems. */
9struct siginfo;
10
11/* Most things should be clean enough to redefine this at will, if care
12 is taken to make libc match. */
13
14#define _NSIG 64
15#define _NSIG_BPW 32
16#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
17
18typedef unsigned long old_sigset_t; /* at least 32 bits */
19
20typedef struct {
21 unsigned long sig[_NSIG_WORDS];
22} sigset_t;
23
24#define SIGHUP 1
25#define SIGINT 2
26#define SIGQUIT 3
27#define SIGILL 4
28#define SIGTRAP 5
29#define SIGABRT 6
30#define SIGIOT 6
31#define SIGBUS 7
32#define SIGFPE 8
33#define SIGKILL 9
34#define SIGUSR1 10
35#define SIGSEGV 11
36#define SIGUSR2 12
37#define SIGPIPE 13
38#define SIGALRM 14
39#define SIGTERM 15
40#define SIGSTKFLT 16
41#define SIGCHLD 17
42#define SIGCONT 18
43#define SIGSTOP 19
44#define SIGTSTP 20
45#define SIGTTIN 21
46#define SIGTTOU 22
47#define SIGURG 23
48#define SIGXCPU 24
49#define SIGXFSZ 25
50#define SIGVTALRM 26
51#define SIGPROF 27
52#define SIGWINCH 28
53#define SIGIO 29
54#define SIGPOLL SIGIO
55/*
56#define SIGLOST 29
57*/
58#define SIGPWR 30
59#define SIGSYS 31
60#define SIGUNUSED 31
61
62/* These should not be considered constants from userland. */
63#define SIGRTMIN 32
64#define SIGRTMAX _NSIG
65
66/*
67 * SA_FLAGS values:
68 *
69 * SA_ONSTACK is not currently supported, but will allow sigaltstack(2).
70 * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the
71 * SA_RESTART flag to get restarting signals (which were the default long ago)
72 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
73 * SA_RESETHAND clears the handler when the signal is delivered.
74 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
75 * SA_NODEFER prevents the current signal from being masked in the handler.
76 *
77 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
78 * Unix names RESETHAND and NODEFER respectively.
79 */
80#define SA_NOCLDSTOP 0x00000001
81#define SA_NOCLDWAIT 0x00000002
82#define SA_SIGINFO 0x00000004
83#define SA_ONSTACK 0x08000000
84#define SA_RESTART 0x10000000
85#define SA_NODEFER 0x40000000
86#define SA_RESETHAND 0x80000000
87
88#define SA_NOMASK SA_NODEFER
89#define SA_ONESHOT SA_RESETHAND
90#define SA_INTERRUPT 0x20000000 /* dummy -- ignored */
91
92#define SA_RESTORER 0x04000000
93
94/*
95 * sigaltstack controls
96 */
97#define SS_ONSTACK 1
98#define SS_DISABLE 2
99
100#define MINSIGSTKSZ 2048
101#define SIGSTKSZ 8192
102
103#include <asm-generic/signal.h>
104
105struct old_sigaction {
106 __sighandler_t sa_handler;
107 old_sigset_t sa_mask;
108 unsigned long sa_flags;
109 __sigrestore_t sa_restorer;
110};
111
112struct sigaction {
113 __sighandler_t sa_handler;
114 unsigned long sa_flags;
115 __sigrestore_t sa_restorer;
116 sigset_t sa_mask; /* mask last for extensibility */
117};
118
119struct k_sigaction {
120 struct sigaction sa;
121};
122
123typedef struct sigaltstack {
124 void __user *ss_sp;
125 int ss_flags;
126 size_t ss_size;
127} stack_t;
128
129#ifdef __KERNEL__
130#include <asm/sigcontext.h>
131#define ptrace_signal_deliver(regs, cookie) do { } while (0)
132#endif /* __KERNEL__ */
133
134/*
135 * These are parameters to dbg_sigreturn syscall. They enable or
136 * disable certain debugging things that can be done from signal
137 * handlers. The dbg_sigreturn syscall *must* be called from a
138 * SA_SIGINFO signal so the ucontext can be passed to it. It takes an
139 * array of struct sig_dbg_op, which has the debug operations to
140 * perform before returning from the signal.
141 */
142struct sig_dbg_op {
143 int dbg_type;
144 unsigned long dbg_value;
145};
146
147/* Enable or disable single-stepping. The value sets the state. */
148#define SIG_DBG_SINGLE_STEPPING 1
149
150/* Enable or disable branch tracing. The value sets the state. */
151#define SIG_DBG_BRANCH_TRACING 2
152
153#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-01 05:18:20 -0500