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-rw-r--r--include/asm-ppc/futex.h2
-rw-r--r--include/asm-ppc/io.h20
-rw-r--r--include/asm-ppc/irq.h10
-rw-r--r--include/asm-ppc/macio.h1
-rw-r--r--include/asm-ppc/mpc8xx.h16
-rw-r--r--include/asm-ppc/mv64x60.h12
-rw-r--r--include/asm-ppc/of_device.h5
-rw-r--r--include/asm-ppc/pgtable.h11
-rw-r--r--include/asm-ppc/ppc_sys.h2
-rw-r--r--include/asm-ppc/segment.h1
-rw-r--r--include/asm-ppc/tlbflush.h2
11 files changed, 54 insertions, 28 deletions
diff --git a/include/asm-ppc/futex.h b/include/asm-ppc/futex.h
index 2cac5ecd9d00..9feff4ce1424 100644
--- a/include/asm-ppc/futex.h
+++ b/include/asm-ppc/futex.h
@@ -14,7 +14,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
14 int cmp = (encoded_op >> 24) & 15; 14 int cmp = (encoded_op >> 24) & 15;
15 int oparg = (encoded_op << 8) >> 20; 15 int oparg = (encoded_op << 8) >> 20;
16 int cmparg = (encoded_op << 20) >> 20; 16 int cmparg = (encoded_op << 20) >> 20;
17 int oldval = 0, ret, tem; 17 int oldval = 0, ret;
18 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) 18 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
19 oparg = 1 << oparg; 19 oparg = 1 << oparg;
20 20
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index 7eb7cf6360bd..94d83998a759 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -56,7 +56,7 @@ extern unsigned long pci_dram_offset;
56 * is actually performed (i.e. the data has come back) before we start 56 * is actually performed (i.e. the data has come back) before we start
57 * executing any following instructions. 57 * executing any following instructions.
58 */ 58 */
59extern inline int in_8(volatile unsigned char __iomem *addr) 59extern inline int in_8(const volatile unsigned char __iomem *addr)
60{ 60{
61 int ret; 61 int ret;
62 62
@@ -72,7 +72,7 @@ extern inline void out_8(volatile unsigned char __iomem *addr, int val)
72 __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val)); 72 __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
73} 73}
74 74
75extern inline int in_le16(volatile unsigned short __iomem *addr) 75extern inline int in_le16(const volatile unsigned short __iomem *addr)
76{ 76{
77 int ret; 77 int ret;
78 78
@@ -83,7 +83,7 @@ extern inline int in_le16(volatile unsigned short __iomem *addr)
83 return ret; 83 return ret;
84} 84}
85 85
86extern inline int in_be16(volatile unsigned short __iomem *addr) 86extern inline int in_be16(const volatile unsigned short __iomem *addr)
87{ 87{
88 int ret; 88 int ret;
89 89
@@ -104,7 +104,7 @@ extern inline void out_be16(volatile unsigned short __iomem *addr, int val)
104 __asm__ __volatile__("sth%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val)); 104 __asm__ __volatile__("sth%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
105} 105}
106 106
107extern inline unsigned in_le32(volatile unsigned __iomem *addr) 107extern inline unsigned in_le32(const volatile unsigned __iomem *addr)
108{ 108{
109 unsigned ret; 109 unsigned ret;
110 110
@@ -115,7 +115,7 @@ extern inline unsigned in_le32(volatile unsigned __iomem *addr)
115 return ret; 115 return ret;
116} 116}
117 117
118extern inline unsigned in_be32(volatile unsigned __iomem *addr) 118extern inline unsigned in_be32(const volatile unsigned __iomem *addr)
119{ 119{
120 unsigned ret; 120 unsigned ret;
121 121
@@ -139,7 +139,7 @@ extern inline void out_be32(volatile unsigned __iomem *addr, int val)
139#define readb(addr) in_8((volatile u8 *)(addr)) 139#define readb(addr) in_8((volatile u8 *)(addr))
140#define writeb(b,addr) out_8((volatile u8 *)(addr), (b)) 140#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
141#else 141#else
142static inline __u8 readb(volatile void __iomem *addr) 142static inline __u8 readb(const volatile void __iomem *addr)
143{ 143{
144 return in_8(addr); 144 return in_8(addr);
145} 145}
@@ -150,11 +150,11 @@ static inline void writeb(__u8 b, volatile void __iomem *addr)
150#endif 150#endif
151 151
152#if defined(CONFIG_APUS) 152#if defined(CONFIG_APUS)
153static inline __u16 readw(volatile void __iomem *addr) 153static inline __u16 readw(const volatile void __iomem *addr)
154{ 154{
155 return *(__force volatile __u16 *)(addr); 155 return *(__force volatile __u16 *)(addr);
156} 156}
157static inline __u32 readl(volatile void __iomem *addr) 157static inline __u32 readl(const volatile void __iomem *addr)
158{ 158{
159 return *(__force volatile __u32 *)(addr); 159 return *(__force volatile __u32 *)(addr);
160} 160}
@@ -173,11 +173,11 @@ static inline void writel(__u32 b, volatile void __iomem *addr)
173#define writew(b,addr) out_le16((volatile u16 *)(addr),(b)) 173#define writew(b,addr) out_le16((volatile u16 *)(addr),(b))
174#define writel(b,addr) out_le32((volatile u32 *)(addr),(b)) 174#define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
175#else 175#else
176static inline __u16 readw(volatile void __iomem *addr) 176static inline __u16 readw(const volatile void __iomem *addr)
177{ 177{
178 return in_le16(addr); 178 return in_le16(addr);
179} 179}
180static inline __u32 readl(volatile void __iomem *addr) 180static inline __u32 readl(const volatile void __iomem *addr)
181{ 181{
182 return in_le32(addr); 182 return in_le32(addr);
183} 183}
diff --git a/include/asm-ppc/irq.h b/include/asm-ppc/irq.h
index 55752474d0d9..bd9674807f05 100644
--- a/include/asm-ppc/irq.h
+++ b/include/asm-ppc/irq.h
@@ -138,6 +138,16 @@ irq_canonicalize(int irq)
138#define SIU_IRQ7 (14) 138#define SIU_IRQ7 (14)
139#define SIU_LEVEL7 (15) 139#define SIU_LEVEL7 (15)
140 140
141#define MPC8xx_INT_FEC1 SIU_LEVEL1
142#define MPC8xx_INT_FEC2 SIU_LEVEL3
143
144#define MPC8xx_INT_SCC1 (CPM_IRQ_OFFSET + CPMVEC_SCC1)
145#define MPC8xx_INT_SCC2 (CPM_IRQ_OFFSET + CPMVEC_SCC2)
146#define MPC8xx_INT_SCC3 (CPM_IRQ_OFFSET + CPMVEC_SCC3)
147#define MPC8xx_INT_SCC4 (CPM_IRQ_OFFSET + CPMVEC_SCC4)
148#define MPC8xx_INT_SMC1 (CPM_IRQ_OFFSET + CPMVEC_SMC1)
149#define MPC8xx_INT_SMC2 (CPM_IRQ_OFFSET + CPMVEC_SMC2)
150
141/* The internal interrupts we can configure as we see fit. 151/* The internal interrupts we can configure as we see fit.
142 * My personal preference is CPM at level 2, which puts it above the 152 * My personal preference is CPM at level 2, which puts it above the
143 * MBX PCI/ISA/IDE interrupts. 153 * MBX PCI/ISA/IDE interrupts.
diff --git a/include/asm-ppc/macio.h b/include/asm-ppc/macio.h
index a481b772d154..b553dd4b139e 100644
--- a/include/asm-ppc/macio.h
+++ b/include/asm-ppc/macio.h
@@ -1,7 +1,6 @@
1#ifndef __MACIO_ASIC_H__ 1#ifndef __MACIO_ASIC_H__
2#define __MACIO_ASIC_H__ 2#define __MACIO_ASIC_H__
3 3
4#include <linux/mod_devicetable.h>
5#include <asm/of_device.h> 4#include <asm/of_device.h>
6 5
7extern struct bus_type macio_bus_type; 6extern struct bus_type macio_bus_type;
diff --git a/include/asm-ppc/mpc8xx.h b/include/asm-ppc/mpc8xx.h
index dc8e59896050..208a2e11daee 100644
--- a/include/asm-ppc/mpc8xx.h
+++ b/include/asm-ppc/mpc8xx.h
@@ -97,6 +97,22 @@ extern unsigned char __res[];
97 97
98struct pt_regs; 98struct pt_regs;
99 99
100enum ppc_sys_devices {
101 MPC8xx_CPM_FEC1,
102 MPC8xx_CPM_FEC2,
103 MPC8xx_CPM_I2C,
104 MPC8xx_CPM_SCC1,
105 MPC8xx_CPM_SCC2,
106 MPC8xx_CPM_SCC3,
107 MPC8xx_CPM_SCC4,
108 MPC8xx_CPM_SPI,
109 MPC8xx_CPM_MCC1,
110 MPC8xx_CPM_MCC2,
111 MPC8xx_CPM_SMC1,
112 MPC8xx_CPM_SMC2,
113 MPC8xx_CPM_USB,
114};
115
100#endif /* !__ASSEMBLY__ */ 116#endif /* !__ASSEMBLY__ */
101#endif /* CONFIG_8xx */ 117#endif /* CONFIG_8xx */
102#endif /* __CONFIG_8xx_DEFS */ 118#endif /* __CONFIG_8xx_DEFS */
diff --git a/include/asm-ppc/mv64x60.h b/include/asm-ppc/mv64x60.h
index 835930d6faa1..ee2f9188cc64 100644
--- a/include/asm-ppc/mv64x60.h
+++ b/include/asm-ppc/mv64x60.h
@@ -119,6 +119,14 @@ extern spinlock_t mv64x60_lock;
119 119
120#define MV64x60_64BIT_WIN_COUNT 24 120#define MV64x60_64BIT_WIN_COUNT 24
121 121
122/* Watchdog Platform Device, Driver Data */
123#define MV64x60_WDT_NAME "wdt"
124
125struct mv64x60_wdt_pdata {
126 int timeout; /* watchdog expiry in seconds, default 10 */
127 int bus_clk; /* bus clock in MHz, default 133 */
128};
129
122/* 130/*
123 * Define a structure that's used to pass in config information to the 131 * Define a structure that's used to pass in config information to the
124 * core routines. 132 * core routines.
@@ -225,7 +233,7 @@ struct mv64x60_chip_info {
225struct mv64x60_handle { 233struct mv64x60_handle {
226 u32 type; /* type of bridge */ 234 u32 type; /* type of bridge */
227 u32 rev; /* revision of bridge */ 235 u32 rev; /* revision of bridge */
228 void *v_base; /* virtual base addr of bridge regs */ 236 void __iomem *v_base;/* virtual base addr of bridge regs */
229 phys_addr_t p_base; /* physical base addr of bridge regs */ 237 phys_addr_t p_base; /* physical base addr of bridge regs */
230 238
231 u32 pci_mode_a; /* pci 0 mode: conventional pci, pci-x*/ 239 u32 pci_mode_a; /* pci 0 mode: conventional pci, pci-x*/
@@ -295,7 +303,7 @@ void mv64x60_alloc_hose(struct mv64x60_handle *bh, u32 cfg_addr,
295 u32 cfg_data, struct pci_controller **hose); 303 u32 cfg_data, struct pci_controller **hose);
296int mv64x60_get_type(struct mv64x60_handle *bh); 304int mv64x60_get_type(struct mv64x60_handle *bh);
297int mv64x60_setup_for_chip(struct mv64x60_handle *bh); 305int mv64x60_setup_for_chip(struct mv64x60_handle *bh);
298void *mv64x60_get_bridge_vbase(void); 306void __iomem *mv64x60_get_bridge_vbase(void);
299u32 mv64x60_get_bridge_type(void); 307u32 mv64x60_get_bridge_type(void);
300u32 mv64x60_get_bridge_rev(void); 308u32 mv64x60_get_bridge_rev(void);
301void mv64x60_get_mem_windows(struct mv64x60_handle *bh, 309void mv64x60_get_mem_windows(struct mv64x60_handle *bh,
diff --git a/include/asm-ppc/of_device.h b/include/asm-ppc/of_device.h
index 4b264cfd3998..575bce418f80 100644
--- a/include/asm-ppc/of_device.h
+++ b/include/asm-ppc/of_device.h
@@ -2,6 +2,7 @@
2#define __OF_DEVICE_H__ 2#define __OF_DEVICE_H__
3 3
4#include <linux/device.h> 4#include <linux/device.h>
5#include <linux/mod_devicetable.h>
5#include <asm/prom.h> 6#include <asm/prom.h>
6 7
7/* 8/*
@@ -55,7 +56,9 @@ extern int of_register_driver(struct of_platform_driver *drv);
55extern void of_unregister_driver(struct of_platform_driver *drv); 56extern void of_unregister_driver(struct of_platform_driver *drv);
56extern int of_device_register(struct of_device *ofdev); 57extern int of_device_register(struct of_device *ofdev);
57extern void of_device_unregister(struct of_device *ofdev); 58extern void of_device_unregister(struct of_device *ofdev);
58extern struct of_device *of_platform_device_create(struct device_node *np, const char *bus_id); 59extern struct of_device *of_platform_device_create(struct device_node *np,
60 const char *bus_id,
61 struct device *parent);
59extern void of_release_dev(struct device *dev); 62extern void of_release_dev(struct device *dev);
60 63
61#endif /* __OF_DEVICE_H__ */ 64#endif /* __OF_DEVICE_H__ */
diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
index 92f30b28b252..eee601bb9ada 100644
--- a/include/asm-ppc/pgtable.h
+++ b/include/asm-ppc/pgtable.h
@@ -812,15 +812,6 @@ extern void kernel_set_cachemode (unsigned long address, unsigned long size,
812#ifdef CONFIG_PHYS_64BIT 812#ifdef CONFIG_PHYS_64BIT
813extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, 813extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
814 unsigned long paddr, unsigned long size, pgprot_t prot); 814 unsigned long paddr, unsigned long size, pgprot_t prot);
815static inline int io_remap_page_range(struct vm_area_struct *vma,
816 unsigned long vaddr,
817 unsigned long paddr,
818 unsigned long size,
819 pgprot_t prot)
820{
821 phys_addr_t paddr64 = fixup_bigphys_addr(paddr, size);
822 return remap_pfn_range(vma, vaddr, paddr64 >> PAGE_SHIFT, size, prot);
823}
824 815
825static inline int io_remap_pfn_range(struct vm_area_struct *vma, 816static inline int io_remap_pfn_range(struct vm_area_struct *vma,
826 unsigned long vaddr, 817 unsigned long vaddr,
@@ -832,8 +823,6 @@ static inline int io_remap_pfn_range(struct vm_area_struct *vma,
832 return remap_pfn_range(vma, vaddr, paddr64 >> PAGE_SHIFT, size, prot); 823 return remap_pfn_range(vma, vaddr, paddr64 >> PAGE_SHIFT, size, prot);
833} 824}
834#else 825#else
835#define io_remap_page_range(vma, vaddr, paddr, size, prot) \
836 remap_pfn_range(vma, vaddr, (paddr) >> PAGE_SHIFT, size, prot)
837#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ 826#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
838 remap_pfn_range(vma, vaddr, pfn, size, prot) 827 remap_pfn_range(vma, vaddr, pfn, size, prot)
839#endif 828#endif
diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h
index 048f7c8596ee..549f44843c5e 100644
--- a/include/asm-ppc/ppc_sys.h
+++ b/include/asm-ppc/ppc_sys.h
@@ -27,6 +27,8 @@
27#include <asm/mpc83xx.h> 27#include <asm/mpc83xx.h>
28#elif defined(CONFIG_85xx) 28#elif defined(CONFIG_85xx)
29#include <asm/mpc85xx.h> 29#include <asm/mpc85xx.h>
30#elif defined(CONFIG_8xx)
31#include <asm/mpc8xx.h>
30#elif defined(CONFIG_PPC_MPC52xx) 32#elif defined(CONFIG_PPC_MPC52xx)
31#include <asm/mpc52xx.h> 33#include <asm/mpc52xx.h>
32#elif defined(CONFIG_MPC10X_BRIDGE) 34#elif defined(CONFIG_MPC10X_BRIDGE)
diff --git a/include/asm-ppc/segment.h b/include/asm-ppc/segment.h
deleted file mode 100644
index 0f2f7428d437..000000000000
--- a/include/asm-ppc/segment.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm/uaccess.h>
diff --git a/include/asm-ppc/tlbflush.h b/include/asm-ppc/tlbflush.h
index 9850f53f54b0..9afee4ffc835 100644
--- a/include/asm-ppc/tlbflush.h
+++ b/include/asm-ppc/tlbflush.h
@@ -72,7 +72,7 @@ static inline void flush_tlb_page(struct vm_area_struct *vma,
72static inline void flush_tlb_page_nohash(struct vm_area_struct *vma, 72static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
73 unsigned long vmaddr) 73 unsigned long vmaddr)
74 { _tlbie(vmaddr); } 74 { _tlbie(vmaddr); }
75static inline void flush_tlb_range(struct mm_struct *mm, 75static inline void flush_tlb_range(struct vm_area_struct *vma,
76 unsigned long start, unsigned long end) 76 unsigned long start, unsigned long end)
77 { __tlbia(); } 77 { __tlbia(); }
78static inline void flush_tlb_kernel_range(unsigned long start, 78static inline void flush_tlb_kernel_range(unsigned long start,