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-rw-r--r--include/asm-ppc64/abs_addr.h86
-rw-r--r--include/asm-ppc64/cputable.h47
-rw-r--r--include/asm-ppc64/firmware.h101
-rw-r--r--include/asm-ppc64/imalloc.h2
-rw-r--r--include/asm-ppc64/iommu.h3
-rw-r--r--include/asm-ppc64/lmb.h1
-rw-r--r--include/asm-ppc64/machdep.h3
-rw-r--r--include/asm-ppc64/mmu.h16
-rw-r--r--include/asm-ppc64/naca.h7
-rw-r--r--include/asm-ppc64/page.h55
-rw-r--r--include/asm-ppc64/pgalloc.h93
-rw-r--r--include/asm-ppc64/pgtable.h90
-rw-r--r--include/asm-ppc64/pmc.h2
-rw-r--r--include/asm-ppc64/processor.h4
-rw-r--r--include/asm-ppc64/prom.h14
-rw-r--r--include/asm-ppc64/system.h4
-rw-r--r--include/asm-ppc64/vio.h10
17 files changed, 312 insertions, 226 deletions
diff --git a/include/asm-ppc64/abs_addr.h b/include/asm-ppc64/abs_addr.h
index 6d4e8e787058..84c24d4cdb71 100644
--- a/include/asm-ppc64/abs_addr.h
+++ b/include/asm-ppc64/abs_addr.h
@@ -16,93 +16,51 @@
16#include <asm/page.h> 16#include <asm/page.h>
17#include <asm/prom.h> 17#include <asm/prom.h>
18#include <asm/lmb.h> 18#include <asm/lmb.h>
19#include <asm/firmware.h>
19 20
20typedef u32 msChunks_entry; 21struct mschunks_map {
21struct msChunks {
22 unsigned long num_chunks; 22 unsigned long num_chunks;
23 unsigned long chunk_size; 23 unsigned long chunk_size;
24 unsigned long chunk_shift; 24 unsigned long chunk_shift;
25 unsigned long chunk_mask; 25 unsigned long chunk_mask;
26 msChunks_entry *abs; 26 u32 *mapping;
27}; 27};
28 28
29extern struct msChunks msChunks; 29extern struct mschunks_map mschunks_map;
30 30
31extern unsigned long msChunks_alloc(unsigned long, unsigned long, unsigned long); 31/* Chunks are 256 KB */
32extern unsigned long reloc_offset(void); 32#define MSCHUNKS_CHUNK_SHIFT (18)
33#define MSCHUNKS_CHUNK_SIZE (1UL << MSCHUNKS_CHUNK_SHIFT)
34#define MSCHUNKS_OFFSET_MASK (MSCHUNKS_CHUNK_SIZE - 1)
33 35
34#ifdef CONFIG_MSCHUNKS 36static inline unsigned long chunk_to_addr(unsigned long chunk)
35
36static inline unsigned long
37chunk_to_addr(unsigned long chunk)
38{ 37{
39 unsigned long offset = reloc_offset(); 38 return chunk << MSCHUNKS_CHUNK_SHIFT;
40 struct msChunks *_msChunks = PTRRELOC(&msChunks);
41
42 return chunk << _msChunks->chunk_shift;
43} 39}
44 40
45static inline unsigned long 41static inline unsigned long addr_to_chunk(unsigned long addr)
46addr_to_chunk(unsigned long addr)
47{ 42{
48 unsigned long offset = reloc_offset(); 43 return addr >> MSCHUNKS_CHUNK_SHIFT;
49 struct msChunks *_msChunks = PTRRELOC(&msChunks);
50
51 return addr >> _msChunks->chunk_shift;
52} 44}
53 45
54static inline unsigned long 46static inline unsigned long phys_to_abs(unsigned long pa)
55chunk_offset(unsigned long addr)
56{ 47{
57 unsigned long offset = reloc_offset(); 48 unsigned long chunk;
58 struct msChunks *_msChunks = PTRRELOC(&msChunks);
59 49
60 return addr & _msChunks->chunk_mask; 50 /* This is a no-op on non-iSeries */
61} 51 if (!firmware_has_feature(FW_FEATURE_ISERIES))
52 return pa;
62 53
63static inline unsigned long 54 chunk = addr_to_chunk(pa);
64abs_chunk(unsigned long pchunk)
65{
66 unsigned long offset = reloc_offset();
67 struct msChunks *_msChunks = PTRRELOC(&msChunks);
68 if ( pchunk >= _msChunks->num_chunks ) {
69 return pchunk;
70 }
71 return PTRRELOC(_msChunks->abs)[pchunk];
72}
73 55
74/* A macro so it can take pointers or unsigned long. */ 56 if (chunk < mschunks_map.num_chunks)
75#define phys_to_abs(pa) \ 57 chunk = mschunks_map.mapping[chunk];
76 ({ unsigned long _pa = (unsigned long)(pa); \
77 chunk_to_addr(abs_chunk(addr_to_chunk(_pa))) + chunk_offset(_pa); \
78 })
79 58
80static inline unsigned long 59 return chunk_to_addr(chunk) + (pa & MSCHUNKS_OFFSET_MASK);
81physRpn_to_absRpn(unsigned long rpn)
82{
83 unsigned long pa = rpn << PAGE_SHIFT;
84 unsigned long aa = phys_to_abs(pa);
85 return (aa >> PAGE_SHIFT);
86} 60}
87 61
88/* A macro so it can take pointers or unsigned long. */
89#define abs_to_phys(aa) lmb_abs_to_phys((unsigned long)(aa))
90
91#else /* !CONFIG_MSCHUNKS */
92
93#define chunk_to_addr(chunk) ((unsigned long)(chunk))
94#define addr_to_chunk(addr) (addr)
95#define chunk_offset(addr) (0)
96#define abs_chunk(pchunk) (pchunk)
97
98#define phys_to_abs(pa) (pa)
99#define physRpn_to_absRpn(rpn) (rpn)
100#define abs_to_phys(aa) (aa)
101
102#endif /* !CONFIG_MSCHUNKS */
103
104/* Convenience macros */ 62/* Convenience macros */
105#define virt_to_abs(va) phys_to_abs(__pa(va)) 63#define virt_to_abs(va) phys_to_abs(__pa(va))
106#define abs_to_virt(aa) __va(abs_to_phys(aa)) 64#define abs_to_virt(aa) __va(aa)
107 65
108#endif /* _ABS_ADDR_H */ 66#endif /* _ABS_ADDR_H */
diff --git a/include/asm-ppc64/cputable.h b/include/asm-ppc64/cputable.h
index d67fa9e26079..ae6cf3830108 100644
--- a/include/asm-ppc64/cputable.h
+++ b/include/asm-ppc64/cputable.h
@@ -56,11 +56,6 @@ struct cpu_spec {
56 * BHT, SPD, etc... from head.S before branching to identify_machine 56 * BHT, SPD, etc... from head.S before branching to identify_machine
57 */ 57 */
58 cpu_setup_t cpu_setup; 58 cpu_setup_t cpu_setup;
59
60 /* This is used to identify firmware features which are available
61 * to the kernel.
62 */
63 unsigned long firmware_features;
64}; 59};
65 60
66extern struct cpu_spec cpu_specs[]; 61extern struct cpu_spec cpu_specs[];
@@ -71,39 +66,6 @@ static inline unsigned long cpu_has_feature(unsigned long feature)
71 return cur_cpu_spec->cpu_features & feature; 66 return cur_cpu_spec->cpu_features & feature;
72} 67}
73 68
74
75/* firmware feature bitmask values */
76#define FIRMWARE_MAX_FEATURES 63
77
78#define FW_FEATURE_PFT (1UL<<0)
79#define FW_FEATURE_TCE (1UL<<1)
80#define FW_FEATURE_SPRG0 (1UL<<2)
81#define FW_FEATURE_DABR (1UL<<3)
82#define FW_FEATURE_COPY (1UL<<4)
83#define FW_FEATURE_ASR (1UL<<5)
84#define FW_FEATURE_DEBUG (1UL<<6)
85#define FW_FEATURE_TERM (1UL<<7)
86#define FW_FEATURE_PERF (1UL<<8)
87#define FW_FEATURE_DUMP (1UL<<9)
88#define FW_FEATURE_INTERRUPT (1UL<<10)
89#define FW_FEATURE_MIGRATE (1UL<<11)
90#define FW_FEATURE_PERFMON (1UL<<12)
91#define FW_FEATURE_CRQ (1UL<<13)
92#define FW_FEATURE_VIO (1UL<<14)
93#define FW_FEATURE_RDMA (1UL<<15)
94#define FW_FEATURE_LLAN (1UL<<16)
95#define FW_FEATURE_BULK (1UL<<17)
96#define FW_FEATURE_XDABR (1UL<<18)
97#define FW_FEATURE_MULTITCE (1UL<<19)
98#define FW_FEATURE_SPLPAR (1UL<<20)
99
100typedef struct {
101 unsigned long val;
102 char * name;
103} firmware_feature_t;
104
105extern firmware_feature_t firmware_features_table[];
106
107#endif /* __ASSEMBLY__ */ 69#endif /* __ASSEMBLY__ */
108 70
109/* CPU kernel features */ 71/* CPU kernel features */
@@ -140,10 +102,8 @@ extern firmware_feature_t firmware_features_table[];
140#define CPU_FTR_MMCRA_SIHV ASM_CONST(0x0000080000000000) 102#define CPU_FTR_MMCRA_SIHV ASM_CONST(0x0000080000000000)
141#define CPU_FTR_CTRL ASM_CONST(0x0000100000000000) 103#define CPU_FTR_CTRL ASM_CONST(0x0000100000000000)
142 104
143/* Platform firmware features */
144#define FW_FTR_ ASM_CONST(0x0000000000000001)
145
146#ifndef __ASSEMBLY__ 105#ifndef __ASSEMBLY__
106
147#define COMMON_USER_PPC64 (PPC_FEATURE_32 | PPC_FEATURE_64 | \ 107#define COMMON_USER_PPC64 (PPC_FEATURE_32 | PPC_FEATURE_64 | \
148 PPC_FEATURE_HAS_FPU | PPC_FEATURE_HAS_MMU) 108 PPC_FEATURE_HAS_FPU | PPC_FEATURE_HAS_MMU)
149 109
@@ -156,10 +116,9 @@ extern firmware_feature_t firmware_features_table[];
156#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE) 116#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE)
157#else 117#else
158#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE | CPU_FTR_16M_PAGE) 118#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE | CPU_FTR_16M_PAGE)
159#endif 119#endif /* CONFIG_PPC_ISERIES */
160 120
161#define COMMON_PPC64_FW (0) 121#endif /* __ASSEMBLY */
162#endif
163 122
164#ifdef __ASSEMBLY__ 123#ifdef __ASSEMBLY__
165 124
diff --git a/include/asm-ppc64/firmware.h b/include/asm-ppc64/firmware.h
new file mode 100644
index 000000000000..22bb85cf60af
--- /dev/null
+++ b/include/asm-ppc64/firmware.h
@@ -0,0 +1,101 @@
1/*
2 * include/asm-ppc64/firmware.h
3 *
4 * Extracted from include/asm-ppc64/cputable.h
5 *
6 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
7 *
8 * Modifications for ppc64:
9 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16#ifndef __ASM_PPC_FIRMWARE_H
17#define __ASM_PPC_FIRMWARE_H
18
19#ifdef __KERNEL__
20
21#ifndef __ASSEMBLY__
22
23/* firmware feature bitmask values */
24#define FIRMWARE_MAX_FEATURES 63
25
26#define FW_FEATURE_PFT (1UL<<0)
27#define FW_FEATURE_TCE (1UL<<1)
28#define FW_FEATURE_SPRG0 (1UL<<2)
29#define FW_FEATURE_DABR (1UL<<3)
30#define FW_FEATURE_COPY (1UL<<4)
31#define FW_FEATURE_ASR (1UL<<5)
32#define FW_FEATURE_DEBUG (1UL<<6)
33#define FW_FEATURE_TERM (1UL<<7)
34#define FW_FEATURE_PERF (1UL<<8)
35#define FW_FEATURE_DUMP (1UL<<9)
36#define FW_FEATURE_INTERRUPT (1UL<<10)
37#define FW_FEATURE_MIGRATE (1UL<<11)
38#define FW_FEATURE_PERFMON (1UL<<12)
39#define FW_FEATURE_CRQ (1UL<<13)
40#define FW_FEATURE_VIO (1UL<<14)
41#define FW_FEATURE_RDMA (1UL<<15)
42#define FW_FEATURE_LLAN (1UL<<16)
43#define FW_FEATURE_BULK (1UL<<17)
44#define FW_FEATURE_XDABR (1UL<<18)
45#define FW_FEATURE_MULTITCE (1UL<<19)
46#define FW_FEATURE_SPLPAR (1UL<<20)
47#define FW_FEATURE_ISERIES (1UL<<21)
48
49enum {
50 FW_FEATURE_PSERIES_POSSIBLE = FW_FEATURE_PFT | FW_FEATURE_TCE |
51 FW_FEATURE_SPRG0 | FW_FEATURE_DABR | FW_FEATURE_COPY |
52 FW_FEATURE_ASR | FW_FEATURE_DEBUG | FW_FEATURE_TERM |
53 FW_FEATURE_PERF | FW_FEATURE_DUMP | FW_FEATURE_INTERRUPT |
54 FW_FEATURE_MIGRATE | FW_FEATURE_PERFMON | FW_FEATURE_CRQ |
55 FW_FEATURE_VIO | FW_FEATURE_RDMA | FW_FEATURE_LLAN |
56 FW_FEATURE_BULK | FW_FEATURE_XDABR | FW_FEATURE_MULTITCE |
57 FW_FEATURE_SPLPAR,
58 FW_FEATURE_PSERIES_ALWAYS = 0,
59 FW_FEATURE_ISERIES_POSSIBLE = FW_FEATURE_ISERIES,
60 FW_FEATURE_ISERIES_ALWAYS = FW_FEATURE_ISERIES,
61 FW_FEATURE_POSSIBLE =
62#ifdef CONFIG_PPC_PSERIES
63 FW_FEATURE_PSERIES_POSSIBLE |
64#endif
65#ifdef CONFIG_PPC_ISERIES
66 FW_FEATURE_ISERIES_POSSIBLE |
67#endif
68 0,
69 FW_FEATURE_ALWAYS =
70#ifdef CONFIG_PPC_PSERIES
71 FW_FEATURE_PSERIES_ALWAYS &
72#endif
73#ifdef CONFIG_PPC_ISERIES
74 FW_FEATURE_ISERIES_ALWAYS &
75#endif
76 FW_FEATURE_POSSIBLE,
77};
78
79/* This is used to identify firmware features which are available
80 * to the kernel.
81 */
82extern unsigned long ppc64_firmware_features;
83
84static inline unsigned long firmware_has_feature(unsigned long feature)
85{
86 return (FW_FEATURE_ALWAYS & feature) ||
87 (FW_FEATURE_POSSIBLE & ppc64_firmware_features & feature);
88}
89
90#ifdef CONFIG_PPC_PSERIES
91typedef struct {
92 unsigned long val;
93 char * name;
94} firmware_feature_t;
95
96extern firmware_feature_t firmware_features_table[];
97#endif
98
99#endif /* __ASSEMBLY__ */
100#endif /* __KERNEL__ */
101#endif /* __ASM_PPC_FIRMWARE_H */
diff --git a/include/asm-ppc64/imalloc.h b/include/asm-ppc64/imalloc.h
index e46ff68a6e41..42adf7033a81 100644
--- a/include/asm-ppc64/imalloc.h
+++ b/include/asm-ppc64/imalloc.h
@@ -6,7 +6,7 @@
6 */ 6 */
7#define PHBS_IO_BASE VMALLOC_END 7#define PHBS_IO_BASE VMALLOC_END
8#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */ 8#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */
9#define IMALLOC_END (VMALLOC_START + EADDR_MASK) 9#define IMALLOC_END (VMALLOC_START + PGTABLE_RANGE)
10 10
11 11
12/* imalloc region types */ 12/* imalloc region types */
diff --git a/include/asm-ppc64/iommu.h b/include/asm-ppc64/iommu.h
index 729de5cc21d9..72dcf8116b04 100644
--- a/include/asm-ppc64/iommu.h
+++ b/include/asm-ppc64/iommu.h
@@ -104,9 +104,6 @@ extern void iommu_devnode_init_pSeries(struct device_node *dn);
104 104
105#ifdef CONFIG_PPC_ISERIES 105#ifdef CONFIG_PPC_ISERIES
106 106
107/* Initializes tables for bio buses */
108extern void __init iommu_vio_init(void);
109
110struct iSeries_Device_Node; 107struct iSeries_Device_Node;
111/* Creates table for an individual device node */ 108/* Creates table for an individual device node */
112extern void iommu_devnode_init_iSeries(struct iSeries_Device_Node *dn); 109extern void iommu_devnode_init_iSeries(struct iSeries_Device_Node *dn);
diff --git a/include/asm-ppc64/lmb.h b/include/asm-ppc64/lmb.h
index a6cbca21ac1d..cb368bf0f264 100644
--- a/include/asm-ppc64/lmb.h
+++ b/include/asm-ppc64/lmb.h
@@ -22,7 +22,6 @@
22 22
23struct lmb_property { 23struct lmb_property {
24 unsigned long base; 24 unsigned long base;
25 unsigned long physbase;
26 unsigned long size; 25 unsigned long size;
27}; 26};
28 27
diff --git a/include/asm-ppc64/machdep.h b/include/asm-ppc64/machdep.h
index f0ef06375947..ff2c9287d3b6 100644
--- a/include/asm-ppc64/machdep.h
+++ b/include/asm-ppc64/machdep.h
@@ -140,6 +140,9 @@ struct machdep_calls {
140 140
141 /* Idle loop for this platform, leave empty for default idle loop */ 141 /* Idle loop for this platform, leave empty for default idle loop */
142 int (*idle_loop)(void); 142 int (*idle_loop)(void);
143
144 /* Function to enable pmcs for this platform, called once per cpu. */
145 void (*enable_pmcs)(void);
143}; 146};
144 147
145extern int default_idle(void); 148extern int default_idle(void);
diff --git a/include/asm-ppc64/mmu.h b/include/asm-ppc64/mmu.h
index 70348a851313..ad36bb28de29 100644
--- a/include/asm-ppc64/mmu.h
+++ b/include/asm-ppc64/mmu.h
@@ -28,9 +28,12 @@
28#define STE_VSID_SHIFT 12 28#define STE_VSID_SHIFT 12
29 29
30/* Location of cpu0's segment table */ 30/* Location of cpu0's segment table */
31#define STAB0_PAGE 0x9 31#define STAB0_PAGE 0x6
32#define STAB0_PHYS_ADDR (STAB0_PAGE<<PAGE_SHIFT) 32#define STAB0_PHYS_ADDR (STAB0_PAGE<<PAGE_SHIFT)
33#define STAB0_VIRT_ADDR (KERNELBASE+STAB0_PHYS_ADDR) 33
34#ifndef __ASSEMBLY__
35extern char initial_stab[];
36#endif /* ! __ASSEMBLY */
34 37
35/* 38/*
36 * SLB 39 * SLB
@@ -259,8 +262,10 @@ extern void stabs_alloc(void);
259#define VSID_BITS 36 262#define VSID_BITS 36
260#define VSID_MODULUS ((1UL<<VSID_BITS)-1) 263#define VSID_MODULUS ((1UL<<VSID_BITS)-1)
261 264
262#define CONTEXT_BITS 20 265#define CONTEXT_BITS 19
263#define USER_ESID_BITS 15 266#define USER_ESID_BITS 16
267
268#define USER_VSID_RANGE (1UL << (USER_ESID_BITS + SID_SHIFT))
264 269
265/* 270/*
266 * This macro generates asm code to compute the VSID scramble 271 * This macro generates asm code to compute the VSID scramble
@@ -302,8 +307,7 @@ typedef unsigned long mm_context_id_t;
302typedef struct { 307typedef struct {
303 mm_context_id_t id; 308 mm_context_id_t id;
304#ifdef CONFIG_HUGETLB_PAGE 309#ifdef CONFIG_HUGETLB_PAGE
305 pgd_t *huge_pgdir; 310 u16 low_htlb_areas, high_htlb_areas;
306 u16 htlb_segs; /* bitmask */
307#endif 311#endif
308} mm_context_t; 312} mm_context_t;
309 313
diff --git a/include/asm-ppc64/naca.h b/include/asm-ppc64/naca.h
index bfb7caa32eaf..d2afe6447597 100644
--- a/include/asm-ppc64/naca.h
+++ b/include/asm-ppc64/naca.h
@@ -12,8 +12,6 @@
12 12
13#include <asm/types.h> 13#include <asm/types.h>
14 14
15#ifndef __ASSEMBLY__
16
17struct naca_struct { 15struct naca_struct {
18 /* Kernel only data - undefined for user space */ 16 /* Kernel only data - undefined for user space */
19 void *xItVpdAreas; /* VPD Data 0x00 */ 17 void *xItVpdAreas; /* VPD Data 0x00 */
@@ -23,9 +21,4 @@ struct naca_struct {
23 21
24extern struct naca_struct naca; 22extern struct naca_struct naca;
25 23
26#endif /* __ASSEMBLY__ */
27
28#define NACA_PAGE 0x4
29#define NACA_PHYS_ADDR (NACA_PAGE<<PAGE_SHIFT)
30
31#endif /* _NACA_H */ 24#endif /* _NACA_H */
diff --git a/include/asm-ppc64/page.h b/include/asm-ppc64/page.h
index a5893a305a09..a79a08df62bd 100644
--- a/include/asm-ppc64/page.h
+++ b/include/asm-ppc64/page.h
@@ -37,39 +37,45 @@
37 37
38#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) 38#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
39 39
40/* For 64-bit processes the hugepage range is 1T-1.5T */ 40#define HTLB_AREA_SHIFT 40
41#define TASK_HPAGE_BASE ASM_CONST(0x0000010000000000) 41#define HTLB_AREA_SIZE (1UL << HTLB_AREA_SHIFT)
42#define TASK_HPAGE_END ASM_CONST(0x0000018000000000) 42#define GET_HTLB_AREA(x) ((x) >> HTLB_AREA_SHIFT)
43 43
44#define LOW_ESID_MASK(addr, len) (((1U << (GET_ESID(addr+len-1)+1)) \ 44#define LOW_ESID_MASK(addr, len) (((1U << (GET_ESID(addr+len-1)+1)) \
45 - (1U << GET_ESID(addr))) & 0xffff) 45 - (1U << GET_ESID(addr))) & 0xffff)
46#define HTLB_AREA_MASK(addr, len) (((1U << (GET_HTLB_AREA(addr+len-1)+1)) \
47 - (1U << GET_HTLB_AREA(addr))) & 0xffff)
46 48
47#define ARCH_HAS_HUGEPAGE_ONLY_RANGE 49#define ARCH_HAS_HUGEPAGE_ONLY_RANGE
48#define ARCH_HAS_PREPARE_HUGEPAGE_RANGE 50#define ARCH_HAS_PREPARE_HUGEPAGE_RANGE
51#define ARCH_HAS_SETCLEAR_HUGE_PTE
49 52
50#define touches_hugepage_low_range(mm, addr, len) \ 53#define touches_hugepage_low_range(mm, addr, len) \
51 (LOW_ESID_MASK((addr), (len)) & mm->context.htlb_segs) 54 (LOW_ESID_MASK((addr), (len)) & (mm)->context.low_htlb_areas)
52#define touches_hugepage_high_range(addr, len) \ 55#define touches_hugepage_high_range(mm, addr, len) \
53 (((addr) > (TASK_HPAGE_BASE-(len))) && ((addr) < TASK_HPAGE_END)) 56 (HTLB_AREA_MASK((addr), (len)) & (mm)->context.high_htlb_areas)
54 57
55#define __within_hugepage_low_range(addr, len, segmask) \ 58#define __within_hugepage_low_range(addr, len, segmask) \
56 ((LOW_ESID_MASK((addr), (len)) | (segmask)) == (segmask)) 59 ((LOW_ESID_MASK((addr), (len)) | (segmask)) == (segmask))
57#define within_hugepage_low_range(addr, len) \ 60#define within_hugepage_low_range(addr, len) \
58 __within_hugepage_low_range((addr), (len), \ 61 __within_hugepage_low_range((addr), (len), \
59 current->mm->context.htlb_segs) 62 current->mm->context.low_htlb_areas)
60#define within_hugepage_high_range(addr, len) (((addr) >= TASK_HPAGE_BASE) \ 63#define __within_hugepage_high_range(addr, len, zonemask) \
61 && ((addr)+(len) <= TASK_HPAGE_END) && ((addr)+(len) >= (addr))) 64 ((HTLB_AREA_MASK((addr), (len)) | (zonemask)) == (zonemask))
65#define within_hugepage_high_range(addr, len) \
66 __within_hugepage_high_range((addr), (len), \
67 current->mm->context.high_htlb_areas)
62 68
63#define is_hugepage_only_range(mm, addr, len) \ 69#define is_hugepage_only_range(mm, addr, len) \
64 (touches_hugepage_high_range((addr), (len)) || \ 70 (touches_hugepage_high_range((mm), (addr), (len)) || \
65 touches_hugepage_low_range((mm), (addr), (len))) 71 touches_hugepage_low_range((mm), (addr), (len)))
66#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA 72#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
67 73
68#define in_hugepage_area(context, addr) \ 74#define in_hugepage_area(context, addr) \
69 (cpu_has_feature(CPU_FTR_16M_PAGE) && \ 75 (cpu_has_feature(CPU_FTR_16M_PAGE) && \
70 ( (((addr) >= TASK_HPAGE_BASE) && ((addr) < TASK_HPAGE_END)) || \ 76 ( ((1 << GET_HTLB_AREA(addr)) & (context).high_htlb_areas) || \
71 ( ((addr) < 0x100000000L) && \ 77 ( ((addr) < 0x100000000L) && \
72 ((1 << GET_ESID(addr)) & (context).htlb_segs) ) ) ) 78 ((1 << GET_ESID(addr)) & (context).low_htlb_areas) ) ) )
73 79
74#else /* !CONFIG_HUGETLB_PAGE */ 80#else /* !CONFIG_HUGETLB_PAGE */
75 81
@@ -125,36 +131,42 @@ extern void copy_user_page(void *to, void *from, unsigned long vaddr, struct pag
125 * Entries in the pte table are 64b, while entries in the pgd & pmd are 32b. 131 * Entries in the pte table are 64b, while entries in the pgd & pmd are 32b.
126 */ 132 */
127typedef struct { unsigned long pte; } pte_t; 133typedef struct { unsigned long pte; } pte_t;
128typedef struct { unsigned int pmd; } pmd_t; 134typedef struct { unsigned long pmd; } pmd_t;
129typedef struct { unsigned int pgd; } pgd_t; 135typedef struct { unsigned long pud; } pud_t;
136typedef struct { unsigned long pgd; } pgd_t;
130typedef struct { unsigned long pgprot; } pgprot_t; 137typedef struct { unsigned long pgprot; } pgprot_t;
131 138
132#define pte_val(x) ((x).pte) 139#define pte_val(x) ((x).pte)
133#define pmd_val(x) ((x).pmd) 140#define pmd_val(x) ((x).pmd)
141#define pud_val(x) ((x).pud)
134#define pgd_val(x) ((x).pgd) 142#define pgd_val(x) ((x).pgd)
135#define pgprot_val(x) ((x).pgprot) 143#define pgprot_val(x) ((x).pgprot)
136 144
137#define __pte(x) ((pte_t) { (x) } ) 145#define __pte(x) ((pte_t) { (x) })
138#define __pmd(x) ((pmd_t) { (x) } ) 146#define __pmd(x) ((pmd_t) { (x) })
139#define __pgd(x) ((pgd_t) { (x) } ) 147#define __pud(x) ((pud_t) { (x) })
140#define __pgprot(x) ((pgprot_t) { (x) } ) 148#define __pgd(x) ((pgd_t) { (x) })
149#define __pgprot(x) ((pgprot_t) { (x) })
141 150
142#else 151#else
143/* 152/*
144 * .. while these make it easier on the compiler 153 * .. while these make it easier on the compiler
145 */ 154 */
146typedef unsigned long pte_t; 155typedef unsigned long pte_t;
147typedef unsigned int pmd_t; 156typedef unsigned long pmd_t;
148typedef unsigned int pgd_t; 157typedef unsigned long pud_t;
158typedef unsigned long pgd_t;
149typedef unsigned long pgprot_t; 159typedef unsigned long pgprot_t;
150 160
151#define pte_val(x) (x) 161#define pte_val(x) (x)
152#define pmd_val(x) (x) 162#define pmd_val(x) (x)
163#define pud_val(x) (x)
153#define pgd_val(x) (x) 164#define pgd_val(x) (x)
154#define pgprot_val(x) (x) 165#define pgprot_val(x) (x)
155 166
156#define __pte(x) (x) 167#define __pte(x) (x)
157#define __pmd(x) (x) 168#define __pmd(x) (x)
169#define __pud(x) (x)
158#define __pgd(x) (x) 170#define __pgd(x) (x)
159#define __pgprot(x) (x) 171#define __pgprot(x) (x)
160 172
@@ -208,9 +220,6 @@ extern u64 ppc64_pft_size; /* Log 2 of page table size */
208#define USER_REGION_ID (0UL) 220#define USER_REGION_ID (0UL)
209#define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT) 221#define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
210 222
211#define __bpn_to_ba(x) ((((unsigned long)(x)) << PAGE_SHIFT) + KERNELBASE)
212#define __ba_to_bpn(x) ((((unsigned long)(x)) & ~REGION_MASK) >> PAGE_SHIFT)
213
214#define __va(x) ((void *)((unsigned long)(x) + KERNELBASE)) 223#define __va(x) ((void *)((unsigned long)(x) + KERNELBASE))
215 224
216#ifdef CONFIG_DISCONTIGMEM 225#ifdef CONFIG_DISCONTIGMEM
diff --git a/include/asm-ppc64/pgalloc.h b/include/asm-ppc64/pgalloc.h
index 4fc4b739b380..26bc49c1108d 100644
--- a/include/asm-ppc64/pgalloc.h
+++ b/include/asm-ppc64/pgalloc.h
@@ -6,7 +6,12 @@
6#include <linux/cpumask.h> 6#include <linux/cpumask.h>
7#include <linux/percpu.h> 7#include <linux/percpu.h>
8 8
9extern kmem_cache_t *zero_cache; 9extern kmem_cache_t *pgtable_cache[];
10
11#define PTE_CACHE_NUM 0
12#define PMD_CACHE_NUM 1
13#define PUD_CACHE_NUM 1
14#define PGD_CACHE_NUM 0
10 15
11/* 16/*
12 * This program is free software; you can redistribute it and/or 17 * This program is free software; you can redistribute it and/or
@@ -15,30 +20,40 @@ extern kmem_cache_t *zero_cache;
15 * 2 of the License, or (at your option) any later version. 20 * 2 of the License, or (at your option) any later version.
16 */ 21 */
17 22
18static inline pgd_t * 23static inline pgd_t *pgd_alloc(struct mm_struct *mm)
19pgd_alloc(struct mm_struct *mm)
20{ 24{
21 return kmem_cache_alloc(zero_cache, GFP_KERNEL); 25 return kmem_cache_alloc(pgtable_cache[PGD_CACHE_NUM], GFP_KERNEL);
22} 26}
23 27
24static inline void 28static inline void pgd_free(pgd_t *pgd)
25pgd_free(pgd_t *pgd)
26{ 29{
27 kmem_cache_free(zero_cache, pgd); 30 kmem_cache_free(pgtable_cache[PGD_CACHE_NUM], pgd);
31}
32
33#define pgd_populate(MM, PGD, PUD) pgd_set(PGD, PUD)
34
35static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)
36{
37 return kmem_cache_alloc(pgtable_cache[PUD_CACHE_NUM],
38 GFP_KERNEL|__GFP_REPEAT);
39}
40
41static inline void pud_free(pud_t *pud)
42{
43 kmem_cache_free(pgtable_cache[PUD_CACHE_NUM], pud);
28} 44}
29 45
30#define pud_populate(MM, PUD, PMD) pud_set(PUD, PMD) 46#define pud_populate(MM, PUD, PMD) pud_set(PUD, PMD)
31 47
32static inline pmd_t * 48static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
33pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
34{ 49{
35 return kmem_cache_alloc(zero_cache, GFP_KERNEL|__GFP_REPEAT); 50 return kmem_cache_alloc(pgtable_cache[PMD_CACHE_NUM],
51 GFP_KERNEL|__GFP_REPEAT);
36} 52}
37 53
38static inline void 54static inline void pmd_free(pmd_t *pmd)
39pmd_free(pmd_t *pmd)
40{ 55{
41 kmem_cache_free(zero_cache, pmd); 56 kmem_cache_free(pgtable_cache[PMD_CACHE_NUM], pmd);
42} 57}
43 58
44#define pmd_populate_kernel(mm, pmd, pte) pmd_set(pmd, pte) 59#define pmd_populate_kernel(mm, pmd, pte) pmd_set(pmd, pte)
@@ -47,44 +62,58 @@ pmd_free(pmd_t *pmd)
47 62
48static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) 63static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
49{ 64{
50 return kmem_cache_alloc(zero_cache, GFP_KERNEL|__GFP_REPEAT); 65 return kmem_cache_alloc(pgtable_cache[PTE_CACHE_NUM],
66 GFP_KERNEL|__GFP_REPEAT);
51} 67}
52 68
53static inline struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address) 69static inline struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address)
54{ 70{
55 pte_t *pte = kmem_cache_alloc(zero_cache, GFP_KERNEL|__GFP_REPEAT); 71 return virt_to_page(pte_alloc_one_kernel(mm, address));
56 if (pte)
57 return virt_to_page(pte);
58 return NULL;
59} 72}
60 73
61static inline void pte_free_kernel(pte_t *pte) 74static inline void pte_free_kernel(pte_t *pte)
62{ 75{
63 kmem_cache_free(zero_cache, pte); 76 kmem_cache_free(pgtable_cache[PTE_CACHE_NUM], pte);
64} 77}
65 78
66static inline void pte_free(struct page *ptepage) 79static inline void pte_free(struct page *ptepage)
67{ 80{
68 kmem_cache_free(zero_cache, page_address(ptepage)); 81 pte_free_kernel(page_address(ptepage));
69} 82}
70 83
71struct pte_freelist_batch 84#define PGF_CACHENUM_MASK 0xf
85
86typedef struct pgtable_free {
87 unsigned long val;
88} pgtable_free_t;
89
90static inline pgtable_free_t pgtable_free_cache(void *p, int cachenum,
91 unsigned long mask)
72{ 92{
73 struct rcu_head rcu; 93 BUG_ON(cachenum > PGF_CACHENUM_MASK);
74 unsigned int index;
75 struct page * pages[0];
76};
77 94
78#define PTE_FREELIST_SIZE ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) / \ 95 return (pgtable_free_t){.val = ((unsigned long) p & ~mask) | cachenum};
79 sizeof(struct page *)) 96}
80 97
81extern void pte_free_now(struct page *ptepage); 98static inline void pgtable_free(pgtable_free_t pgf)
82extern void pte_free_submit(struct pte_freelist_batch *batch); 99{
100 void *p = (void *)(pgf.val & ~PGF_CACHENUM_MASK);
101 int cachenum = pgf.val & PGF_CACHENUM_MASK;
83 102
84DECLARE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur); 103 kmem_cache_free(pgtable_cache[cachenum], p);
104}
85 105
86void __pte_free_tlb(struct mmu_gather *tlb, struct page *ptepage); 106void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf);
87#define __pmd_free_tlb(tlb, pmd) __pte_free_tlb(tlb, virt_to_page(pmd)) 107
108#define __pte_free_tlb(tlb, ptepage) \
109 pgtable_free_tlb(tlb, pgtable_free_cache(page_address(ptepage), \
110 PTE_CACHE_NUM, PTE_TABLE_SIZE-1))
111#define __pmd_free_tlb(tlb, pmd) \
112 pgtable_free_tlb(tlb, pgtable_free_cache(pmd, \
113 PMD_CACHE_NUM, PMD_TABLE_SIZE-1))
114#define __pud_free_tlb(tlb, pmd) \
115 pgtable_free_tlb(tlb, pgtable_free_cache(pud, \
116 PUD_CACHE_NUM, PUD_TABLE_SIZE-1))
88 117
89#define check_pgt_cache() do { } while (0) 118#define check_pgt_cache() do { } while (0)
90 119
diff --git a/include/asm-ppc64/pgtable.h b/include/asm-ppc64/pgtable.h
index 46cf61c2ff69..5ea952ad7164 100644
--- a/include/asm-ppc64/pgtable.h
+++ b/include/asm-ppc64/pgtable.h
@@ -15,19 +15,24 @@
15#include <asm/tlbflush.h> 15#include <asm/tlbflush.h>
16#endif /* __ASSEMBLY__ */ 16#endif /* __ASSEMBLY__ */
17 17
18#include <asm-generic/pgtable-nopud.h>
19
20/* 18/*
21 * Entries per page directory level. The PTE level must use a 64b record 19 * Entries per page directory level. The PTE level must use a 64b record
22 * for each page table entry. The PMD and PGD level use a 32b record for 20 * for each page table entry. The PMD and PGD level use a 32b record for
23 * each entry by assuming that each entry is page aligned. 21 * each entry by assuming that each entry is page aligned.
24 */ 22 */
25#define PTE_INDEX_SIZE 9 23#define PTE_INDEX_SIZE 9
26#define PMD_INDEX_SIZE 10 24#define PMD_INDEX_SIZE 7
27#define PGD_INDEX_SIZE 10 25#define PUD_INDEX_SIZE 7
26#define PGD_INDEX_SIZE 9
27
28#define PTE_TABLE_SIZE (sizeof(pte_t) << PTE_INDEX_SIZE)
29#define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE)
30#define PUD_TABLE_SIZE (sizeof(pud_t) << PUD_INDEX_SIZE)
31#define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE)
28 32
29#define PTRS_PER_PTE (1 << PTE_INDEX_SIZE) 33#define PTRS_PER_PTE (1 << PTE_INDEX_SIZE)
30#define PTRS_PER_PMD (1 << PMD_INDEX_SIZE) 34#define PTRS_PER_PMD (1 << PMD_INDEX_SIZE)
35#define PTRS_PER_PUD (1 << PMD_INDEX_SIZE)
31#define PTRS_PER_PGD (1 << PGD_INDEX_SIZE) 36#define PTRS_PER_PGD (1 << PGD_INDEX_SIZE)
32 37
33/* PMD_SHIFT determines what a second-level page table entry can map */ 38/* PMD_SHIFT determines what a second-level page table entry can map */
@@ -35,8 +40,13 @@
35#define PMD_SIZE (1UL << PMD_SHIFT) 40#define PMD_SIZE (1UL << PMD_SHIFT)
36#define PMD_MASK (~(PMD_SIZE-1)) 41#define PMD_MASK (~(PMD_SIZE-1))
37 42
38/* PGDIR_SHIFT determines what a third-level page table entry can map */ 43/* PUD_SHIFT determines what a third-level page table entry can map */
39#define PGDIR_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE) 44#define PUD_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE)
45#define PUD_SIZE (1UL << PUD_SHIFT)
46#define PUD_MASK (~(PUD_SIZE-1))
47
48/* PGDIR_SHIFT determines what a fourth-level page table entry can map */
49#define PGDIR_SHIFT (PUD_SHIFT + PUD_INDEX_SIZE)
40#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 50#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
41#define PGDIR_MASK (~(PGDIR_SIZE-1)) 51#define PGDIR_MASK (~(PGDIR_SIZE-1))
42 52
@@ -45,15 +55,23 @@
45/* 55/*
46 * Size of EA range mapped by our pagetables. 56 * Size of EA range mapped by our pagetables.
47 */ 57 */
48#define EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \ 58#define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
49 PGD_INDEX_SIZE + PAGE_SHIFT) 59 PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
50#define EADDR_MASK ((1UL << EADDR_SIZE) - 1) 60#define PGTABLE_RANGE (1UL << PGTABLE_EADDR_SIZE)
61
62#if TASK_SIZE_USER64 > PGTABLE_RANGE
63#error TASK_SIZE_USER64 exceeds pagetable range
64#endif
65
66#if TASK_SIZE_USER64 > (1UL << (USER_ESID_BITS + SID_SHIFT))
67#error TASK_SIZE_USER64 exceeds user VSID range
68#endif
51 69
52/* 70/*
53 * Define the address range of the vmalloc VM area. 71 * Define the address range of the vmalloc VM area.
54 */ 72 */
55#define VMALLOC_START (0xD000000000000000ul) 73#define VMALLOC_START (0xD000000000000000ul)
56#define VMALLOC_SIZE (0x10000000000UL) 74#define VMALLOC_SIZE (0x80000000000UL)
57#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE) 75#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
58 76
59/* 77/*
@@ -154,8 +172,6 @@ extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
154#ifndef __ASSEMBLY__ 172#ifndef __ASSEMBLY__
155int hash_huge_page(struct mm_struct *mm, unsigned long access, 173int hash_huge_page(struct mm_struct *mm, unsigned long access,
156 unsigned long ea, unsigned long vsid, int local); 174 unsigned long ea, unsigned long vsid, int local);
157
158void hugetlb_mm_free_pgd(struct mm_struct *mm);
159#endif /* __ASSEMBLY__ */ 175#endif /* __ASSEMBLY__ */
160 176
161#define HAVE_ARCH_UNMAPPED_AREA 177#define HAVE_ARCH_UNMAPPED_AREA
@@ -163,7 +179,6 @@ void hugetlb_mm_free_pgd(struct mm_struct *mm);
163#else 179#else
164 180
165#define hash_huge_page(mm,a,ea,vsid,local) -1 181#define hash_huge_page(mm,a,ea,vsid,local) -1
166#define hugetlb_mm_free_pgd(mm) do {} while (0)
167 182
168#endif 183#endif
169 184
@@ -197,39 +212,45 @@ static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
197#define pte_pfn(x) ((unsigned long)((pte_val(x) >> PTE_SHIFT))) 212#define pte_pfn(x) ((unsigned long)((pte_val(x) >> PTE_SHIFT)))
198#define pte_page(x) pfn_to_page(pte_pfn(x)) 213#define pte_page(x) pfn_to_page(pte_pfn(x))
199 214
200#define pmd_set(pmdp, ptep) \ 215#define pmd_set(pmdp, ptep) ({BUG_ON((u64)ptep < KERNELBASE); pmd_val(*(pmdp)) = (unsigned long)(ptep);})
201 (pmd_val(*(pmdp)) = __ba_to_bpn(ptep))
202#define pmd_none(pmd) (!pmd_val(pmd)) 216#define pmd_none(pmd) (!pmd_val(pmd))
203#define pmd_bad(pmd) (pmd_val(pmd) == 0) 217#define pmd_bad(pmd) (pmd_val(pmd) == 0)
204#define pmd_present(pmd) (pmd_val(pmd) != 0) 218#define pmd_present(pmd) (pmd_val(pmd) != 0)
205#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0) 219#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0)
206#define pmd_page_kernel(pmd) (__bpn_to_ba(pmd_val(pmd))) 220#define pmd_page_kernel(pmd) (pmd_val(pmd))
207#define pmd_page(pmd) virt_to_page(pmd_page_kernel(pmd)) 221#define pmd_page(pmd) virt_to_page(pmd_page_kernel(pmd))
208 222
209#define pud_set(pudp, pmdp) (pud_val(*(pudp)) = (__ba_to_bpn(pmdp))) 223#define pud_set(pudp, pmdp) (pud_val(*(pudp)) = (unsigned long)(pmdp))
210#define pud_none(pud) (!pud_val(pud)) 224#define pud_none(pud) (!pud_val(pud))
211#define pud_bad(pud) ((pud_val(pud)) == 0UL) 225#define pud_bad(pud) ((pud_val(pud)) == 0)
212#define pud_present(pud) (pud_val(pud) != 0UL) 226#define pud_present(pud) (pud_val(pud) != 0)
213#define pud_clear(pudp) (pud_val(*(pudp)) = 0UL) 227#define pud_clear(pudp) (pud_val(*(pudp)) = 0)
214#define pud_page(pud) (__bpn_to_ba(pud_val(pud))) 228#define pud_page(pud) (pud_val(pud))
229
230#define pgd_set(pgdp, pudp) ({pgd_val(*(pgdp)) = (unsigned long)(pudp);})
231#define pgd_none(pgd) (!pgd_val(pgd))
232#define pgd_bad(pgd) (pgd_val(pgd) == 0)
233#define pgd_present(pgd) (pgd_val(pgd) != 0)
234#define pgd_clear(pgdp) (pgd_val(*(pgdp)) = 0)
235#define pgd_page(pgd) (pgd_val(pgd))
215 236
216/* 237/*
217 * Find an entry in a page-table-directory. We combine the address region 238 * Find an entry in a page-table-directory. We combine the address region
218 * (the high order N bits) and the pgd portion of the address. 239 * (the high order N bits) and the pgd portion of the address.
219 */ 240 */
220/* to avoid overflow in free_pgtables we don't use PTRS_PER_PGD here */ 241/* to avoid overflow in free_pgtables we don't use PTRS_PER_PGD here */
221#define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & 0x7ff) 242#define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & 0x1ff)
222 243
223#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) 244#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
224 245
225/* Find an entry in the second-level page table.. */ 246#define pud_offset(pgdp, addr) \
247 (((pud_t *) pgd_page(*(pgdp))) + (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1)))
248
226#define pmd_offset(pudp,addr) \ 249#define pmd_offset(pudp,addr) \
227 ((pmd_t *) pud_page(*(pudp)) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))) 250 (((pmd_t *) pud_page(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
228 251
229/* Find an entry in the third-level page table.. */
230#define pte_offset_kernel(dir,addr) \ 252#define pte_offset_kernel(dir,addr) \
231 ((pte_t *) pmd_page_kernel(*(dir)) \ 253 (((pte_t *) pmd_page_kernel(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
232 + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
233 254
234#define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr)) 255#define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
235#define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr)) 256#define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
@@ -458,23 +479,18 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long addr,
458#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0) 479#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
459 480
460#define pmd_ERROR(e) \ 481#define pmd_ERROR(e) \
461 printk("%s:%d: bad pmd %08x.\n", __FILE__, __LINE__, pmd_val(e)) 482 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
483#define pud_ERROR(e) \
484 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pud_val(e))
462#define pgd_ERROR(e) \ 485#define pgd_ERROR(e) \
463 printk("%s:%d: bad pgd %08x.\n", __FILE__, __LINE__, pgd_val(e)) 486 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
464 487
465extern pgd_t swapper_pg_dir[]; 488extern pgd_t swapper_pg_dir[];
466 489
467extern void paging_init(void); 490extern void paging_init(void);
468 491
469/*
470 * Because the huge pgtables are only 2 level, they can take
471 * at most around 4M, much less than one hugepage which the
472 * process is presumably entitled to use. So we don't bother
473 * freeing up the pagetables on unmap, and wait until
474 * destroy_context() to clean up the lot.
475 */
476#define hugetlb_free_pgd_range(tlb, addr, end, floor, ceiling) \ 492#define hugetlb_free_pgd_range(tlb, addr, end, floor, ceiling) \
477 do { } while (0) 493 free_pgd_range(tlb, addr, end, floor, ceiling)
478 494
479/* 495/*
480 * This gets called at the end of handling a page fault, when 496 * This gets called at the end of handling a page fault, when
diff --git a/include/asm-ppc64/pmc.h b/include/asm-ppc64/pmc.h
index c924748c0bea..d1d297dbccfe 100644
--- a/include/asm-ppc64/pmc.h
+++ b/include/asm-ppc64/pmc.h
@@ -26,4 +26,6 @@ typedef void (*perf_irq_t)(struct pt_regs *);
26int reserve_pmc_hardware(perf_irq_t new_perf_irq); 26int reserve_pmc_hardware(perf_irq_t new_perf_irq);
27void release_pmc_hardware(void); 27void release_pmc_hardware(void);
28 28
29void power4_enable_pmcs(void);
30
29#endif /* _PPC64_PMC_H */ 31#endif /* _PPC64_PMC_H */
diff --git a/include/asm-ppc64/processor.h b/include/asm-ppc64/processor.h
index 352306cfb579..50b14c0ddb87 100644
--- a/include/asm-ppc64/processor.h
+++ b/include/asm-ppc64/processor.h
@@ -382,8 +382,8 @@ extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
382extern struct task_struct *last_task_used_math; 382extern struct task_struct *last_task_used_math;
383extern struct task_struct *last_task_used_altivec; 383extern struct task_struct *last_task_used_altivec;
384 384
385/* 64-bit user address space is 41-bits (2TBs user VM) */ 385/* 64-bit user address space is 44-bits (16TB user VM) */
386#define TASK_SIZE_USER64 (0x0000020000000000UL) 386#define TASK_SIZE_USER64 (0x0000100000000000UL)
387 387
388/* 388/*
389 * 32-bit user address space is 4GB - 1 page 389 * 32-bit user address space is 4GB - 1 page
diff --git a/include/asm-ppc64/prom.h b/include/asm-ppc64/prom.h
index 04b1a84f7ca3..dc5330b39509 100644
--- a/include/asm-ppc64/prom.h
+++ b/include/asm-ppc64/prom.h
@@ -22,13 +22,15 @@
22#define RELOC(x) (*PTRRELOC(&(x))) 22#define RELOC(x) (*PTRRELOC(&(x)))
23 23
24/* Definitions used by the flattened device tree */ 24/* Definitions used by the flattened device tree */
25#define OF_DT_HEADER 0xd00dfeed /* 4: version, 4: total size */ 25#define OF_DT_HEADER 0xd00dfeed /* marker */
26#define OF_DT_BEGIN_NODE 0x1 /* Start node: full name */ 26#define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */
27#define OF_DT_END_NODE 0x2 /* End node */ 27#define OF_DT_END_NODE 0x2 /* End node */
28#define OF_DT_PROP 0x3 /* Property: name off, size, content */ 28#define OF_DT_PROP 0x3 /* Property: name off, size,
29 * content */
30#define OF_DT_NOP 0x4 /* nop */
29#define OF_DT_END 0x9 31#define OF_DT_END 0x9
30 32
31#define OF_DT_VERSION 1 33#define OF_DT_VERSION 0x10
32 34
33/* 35/*
34 * This is what gets passed to the kernel by prom_init or kexec 36 * This is what gets passed to the kernel by prom_init or kexec
@@ -54,7 +56,9 @@ struct boot_param_header
54 u32 version; /* format version */ 56 u32 version; /* format version */
55 u32 last_comp_version; /* last compatible version */ 57 u32 last_comp_version; /* last compatible version */
56 /* version 2 fields below */ 58 /* version 2 fields below */
57 u32 boot_cpuid_phys; /* Which physical CPU id we're booting on */ 59 u32 boot_cpuid_phys; /* Physical CPU id we're booting on */
60 /* version 3 fields below */
61 u32 dt_strings_size; /* size of the DT strings block */
58}; 62};
59 63
60 64
diff --git a/include/asm-ppc64/system.h b/include/asm-ppc64/system.h
index 98d120ca8a91..b9e1835351e9 100644
--- a/include/asm-ppc64/system.h
+++ b/include/asm-ppc64/system.h
@@ -88,7 +88,7 @@ DEBUGGER_BOILERPLATE(debugger_dabr_match)
88DEBUGGER_BOILERPLATE(debugger_fault_handler) 88DEBUGGER_BOILERPLATE(debugger_fault_handler)
89 89
90#ifdef CONFIG_XMON 90#ifdef CONFIG_XMON
91extern void xmon_init(void); 91extern void xmon_init(int enable);
92#endif 92#endif
93 93
94#else 94#else
@@ -302,5 +302,7 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
302 302
303#define arch_align_stack(x) (x) 303#define arch_align_stack(x) (x)
304 304
305extern unsigned long reloc_offset(void);
306
305#endif /* __KERNEL__ */ 307#endif /* __KERNEL__ */
306#endif 308#endif
diff --git a/include/asm-ppc64/vio.h b/include/asm-ppc64/vio.h
index 20cd98ee6337..a82e87c1c5fa 100644
--- a/include/asm-ppc64/vio.h
+++ b/include/asm-ppc64/vio.h
@@ -56,6 +56,9 @@ const void * vio_get_attribute(struct vio_dev *vdev, void* which, int* length);
56int vio_get_irq(struct vio_dev *dev); 56int vio_get_irq(struct vio_dev *dev);
57int vio_enable_interrupts(struct vio_dev *dev); 57int vio_enable_interrupts(struct vio_dev *dev);
58int vio_disable_interrupts(struct vio_dev *dev); 58int vio_disable_interrupts(struct vio_dev *dev);
59extern struct vio_dev * __devinit vio_register_device_common(
60 struct vio_dev *viodev, char *name, char *type,
61 uint32_t unit_address, struct iommu_table *iommu_table);
59 62
60extern struct dma_mapping_ops vio_dma_ops; 63extern struct dma_mapping_ops vio_dma_ops;
61 64
@@ -95,9 +98,16 @@ struct vio_dev {
95 struct device dev; 98 struct device dev;
96}; 99};
97 100
101extern struct vio_dev vio_bus_device;
102
98static inline struct vio_dev *to_vio_dev(struct device *dev) 103static inline struct vio_dev *to_vio_dev(struct device *dev)
99{ 104{
100 return container_of(dev, struct vio_dev, dev); 105 return container_of(dev, struct vio_dev, dev);
101} 106}
102 107
108extern int vio_bus_init(int (*is_match)(const struct vio_device_id *id,
109 const struct vio_dev *dev),
110 void (*)(struct vio_dev *),
111 void (*)(struct device *));
112
103#endif /* _ASM_VIO_H */ 113#endif /* _ASM_VIO_H */