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-rw-r--r--include/asm-ppc64/cache.h36
-rw-r--r--include/asm-ppc64/cacheflush.h48
2 files changed, 0 insertions, 84 deletions
diff --git a/include/asm-ppc64/cache.h b/include/asm-ppc64/cache.h
deleted file mode 100644
index 92140a7efbd1..000000000000
--- a/include/asm-ppc64/cache.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License
4 * as published by the Free Software Foundation; either version
5 * 2 of the License, or (at your option) any later version.
6 */
7#ifndef __ARCH_PPC64_CACHE_H
8#define __ARCH_PPC64_CACHE_H
9
10#include <asm/types.h>
11
12/* bytes per L1 cache line */
13#define L1_CACHE_SHIFT 7
14#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
15
16#define SMP_CACHE_BYTES L1_CACHE_BYTES
17#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */
18
19#ifndef __ASSEMBLY__
20
21struct ppc64_caches {
22 u32 dsize; /* L1 d-cache size */
23 u32 dline_size; /* L1 d-cache line size */
24 u32 log_dline_size;
25 u32 dlines_per_page;
26 u32 isize; /* L1 i-cache size */
27 u32 iline_size; /* L1 i-cache line size */
28 u32 log_iline_size;
29 u32 ilines_per_page;
30};
31
32extern struct ppc64_caches ppc64_caches;
33
34#endif
35
36#endif
diff --git a/include/asm-ppc64/cacheflush.h b/include/asm-ppc64/cacheflush.h
deleted file mode 100644
index ffbc08be8e52..000000000000
--- a/include/asm-ppc64/cacheflush.h
+++ /dev/null
@@ -1,48 +0,0 @@
1#ifndef _PPC64_CACHEFLUSH_H
2#define _PPC64_CACHEFLUSH_H
3
4#include <linux/mm.h>
5#include <asm/cputable.h>
6
7/*
8 * No cache flushing is required when address mappings are
9 * changed, because the caches on PowerPCs are physically
10 * addressed.
11 */
12#define flush_cache_all() do { } while (0)
13#define flush_cache_mm(mm) do { } while (0)
14#define flush_cache_range(vma, start, end) do { } while (0)
15#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
16#define flush_icache_page(vma, page) do { } while (0)
17#define flush_cache_vmap(start, end) do { } while (0)
18#define flush_cache_vunmap(start, end) do { } while (0)
19
20extern void flush_dcache_page(struct page *page);
21#define flush_dcache_mmap_lock(mapping) do { } while (0)
22#define flush_dcache_mmap_unlock(mapping) do { } while (0)
23
24extern void __flush_icache_range(unsigned long, unsigned long);
25extern void flush_icache_user_range(struct vm_area_struct *vma,
26 struct page *page, unsigned long addr,
27 int len);
28
29extern void flush_dcache_range(unsigned long start, unsigned long stop);
30extern void flush_dcache_phys_range(unsigned long start, unsigned long stop);
31extern void flush_inval_dcache_range(unsigned long start, unsigned long stop);
32
33#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
34do { memcpy(dst, src, len); \
35 flush_icache_user_range(vma, page, vaddr, len); \
36} while (0)
37#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
38 memcpy(dst, src, len)
39
40extern void __flush_dcache_icache(void *page_va);
41
42static inline void flush_icache_range(unsigned long start, unsigned long stop)
43{
44 if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
45 __flush_icache_range(start, stop);
46}
47
48#endif /* _PPC64_CACHEFLUSH_H */