diff options
Diffstat (limited to 'include/asm-ppc64/spinlock.h')
-rw-r--r-- | include/asm-ppc64/spinlock.h | 191 |
1 files changed, 86 insertions, 105 deletions
diff --git a/include/asm-ppc64/spinlock.h b/include/asm-ppc64/spinlock.h index acd11564dd75..14cb895bb607 100644 --- a/include/asm-ppc64/spinlock.h +++ b/include/asm-ppc64/spinlock.h | |||
@@ -15,36 +15,42 @@ | |||
15 | * modify it under the terms of the GNU General Public License | 15 | * modify it under the terms of the GNU General Public License |
16 | * as published by the Free Software Foundation; either version | 16 | * as published by the Free Software Foundation; either version |
17 | * 2 of the License, or (at your option) any later version. | 17 | * 2 of the License, or (at your option) any later version. |
18 | * | ||
19 | * (the type definitions are in asm/spinlock_types.h) | ||
18 | */ | 20 | */ |
19 | #include <linux/config.h> | 21 | #include <linux/config.h> |
20 | #include <asm/paca.h> | 22 | #include <asm/paca.h> |
21 | #include <asm/hvcall.h> | 23 | #include <asm/hvcall.h> |
22 | #include <asm/iSeries/HvCall.h> | 24 | #include <asm/iSeries/HvCall.h> |
23 | 25 | ||
24 | typedef struct { | 26 | #define __raw_spin_is_locked(x) ((x)->slock != 0) |
25 | volatile unsigned int lock; | ||
26 | #ifdef CONFIG_PREEMPT | ||
27 | unsigned int break_lock; | ||
28 | #endif | ||
29 | } spinlock_t; | ||
30 | 27 | ||
31 | typedef struct { | 28 | /* |
32 | volatile signed int lock; | 29 | * This returns the old value in the lock, so we succeeded |
33 | #ifdef CONFIG_PREEMPT | 30 | * in getting the lock if the return value is 0. |
34 | unsigned int break_lock; | 31 | */ |
35 | #endif | 32 | static __inline__ unsigned long __spin_trylock(raw_spinlock_t *lock) |
36 | } rwlock_t; | 33 | { |
34 | unsigned long tmp, tmp2; | ||
37 | 35 | ||
38 | #ifdef __KERNEL__ | 36 | __asm__ __volatile__( |
39 | #define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 } | 37 | " lwz %1,%3(13) # __spin_trylock\n\ |
38 | 1: lwarx %0,0,%2\n\ | ||
39 | cmpwi 0,%0,0\n\ | ||
40 | bne- 2f\n\ | ||
41 | stwcx. %1,0,%2\n\ | ||
42 | bne- 1b\n\ | ||
43 | isync\n\ | ||
44 | 2:" : "=&r" (tmp), "=&r" (tmp2) | ||
45 | : "r" (&lock->slock), "i" (offsetof(struct paca_struct, lock_token)) | ||
46 | : "cr0", "memory"); | ||
40 | 47 | ||
41 | #define spin_is_locked(x) ((x)->lock != 0) | 48 | return tmp; |
42 | #define spin_lock_init(x) do { *(x) = SPIN_LOCK_UNLOCKED; } while(0) | 49 | } |
43 | 50 | ||
44 | static __inline__ void _raw_spin_unlock(spinlock_t *lock) | 51 | static int __inline__ __raw_spin_trylock(raw_spinlock_t *lock) |
45 | { | 52 | { |
46 | __asm__ __volatile__("lwsync # spin_unlock": : :"memory"); | 53 | return __spin_trylock(lock) == 0; |
47 | lock->lock = 0; | ||
48 | } | 54 | } |
49 | 55 | ||
50 | /* | 56 | /* |
@@ -64,44 +70,15 @@ static __inline__ void _raw_spin_unlock(spinlock_t *lock) | |||
64 | #if defined(CONFIG_PPC_SPLPAR) || defined(CONFIG_PPC_ISERIES) | 70 | #if defined(CONFIG_PPC_SPLPAR) || defined(CONFIG_PPC_ISERIES) |
65 | /* We only yield to the hypervisor if we are in shared processor mode */ | 71 | /* We only yield to the hypervisor if we are in shared processor mode */ |
66 | #define SHARED_PROCESSOR (get_paca()->lppaca.shared_proc) | 72 | #define SHARED_PROCESSOR (get_paca()->lppaca.shared_proc) |
67 | extern void __spin_yield(spinlock_t *lock); | 73 | extern void __spin_yield(raw_spinlock_t *lock); |
68 | extern void __rw_yield(rwlock_t *lock); | 74 | extern void __rw_yield(raw_rwlock_t *lock); |
69 | #else /* SPLPAR || ISERIES */ | 75 | #else /* SPLPAR || ISERIES */ |
70 | #define __spin_yield(x) barrier() | 76 | #define __spin_yield(x) barrier() |
71 | #define __rw_yield(x) barrier() | 77 | #define __rw_yield(x) barrier() |
72 | #define SHARED_PROCESSOR 0 | 78 | #define SHARED_PROCESSOR 0 |
73 | #endif | 79 | #endif |
74 | extern void spin_unlock_wait(spinlock_t *lock); | ||
75 | |||
76 | /* | ||
77 | * This returns the old value in the lock, so we succeeded | ||
78 | * in getting the lock if the return value is 0. | ||
79 | */ | ||
80 | static __inline__ unsigned long __spin_trylock(spinlock_t *lock) | ||
81 | { | ||
82 | unsigned long tmp, tmp2; | ||
83 | |||
84 | __asm__ __volatile__( | ||
85 | " lwz %1,%3(13) # __spin_trylock\n\ | ||
86 | 1: lwarx %0,0,%2\n\ | ||
87 | cmpwi 0,%0,0\n\ | ||
88 | bne- 2f\n\ | ||
89 | stwcx. %1,0,%2\n\ | ||
90 | bne- 1b\n\ | ||
91 | isync\n\ | ||
92 | 2:" : "=&r" (tmp), "=&r" (tmp2) | ||
93 | : "r" (&lock->lock), "i" (offsetof(struct paca_struct, lock_token)) | ||
94 | : "cr0", "memory"); | ||
95 | |||
96 | return tmp; | ||
97 | } | ||
98 | |||
99 | static int __inline__ _raw_spin_trylock(spinlock_t *lock) | ||
100 | { | ||
101 | return __spin_trylock(lock) == 0; | ||
102 | } | ||
103 | 80 | ||
104 | static void __inline__ _raw_spin_lock(spinlock_t *lock) | 81 | static void __inline__ __raw_spin_lock(raw_spinlock_t *lock) |
105 | { | 82 | { |
106 | while (1) { | 83 | while (1) { |
107 | if (likely(__spin_trylock(lock) == 0)) | 84 | if (likely(__spin_trylock(lock) == 0)) |
@@ -110,12 +87,12 @@ static void __inline__ _raw_spin_lock(spinlock_t *lock) | |||
110 | HMT_low(); | 87 | HMT_low(); |
111 | if (SHARED_PROCESSOR) | 88 | if (SHARED_PROCESSOR) |
112 | __spin_yield(lock); | 89 | __spin_yield(lock); |
113 | } while (unlikely(lock->lock != 0)); | 90 | } while (unlikely(lock->slock != 0)); |
114 | HMT_medium(); | 91 | HMT_medium(); |
115 | } | 92 | } |
116 | } | 93 | } |
117 | 94 | ||
118 | static void __inline__ _raw_spin_lock_flags(spinlock_t *lock, unsigned long flags) | 95 | static void __inline__ __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags) |
119 | { | 96 | { |
120 | unsigned long flags_dis; | 97 | unsigned long flags_dis; |
121 | 98 | ||
@@ -128,12 +105,20 @@ static void __inline__ _raw_spin_lock_flags(spinlock_t *lock, unsigned long flag | |||
128 | HMT_low(); | 105 | HMT_low(); |
129 | if (SHARED_PROCESSOR) | 106 | if (SHARED_PROCESSOR) |
130 | __spin_yield(lock); | 107 | __spin_yield(lock); |
131 | } while (unlikely(lock->lock != 0)); | 108 | } while (unlikely(lock->slock != 0)); |
132 | HMT_medium(); | 109 | HMT_medium(); |
133 | local_irq_restore(flags_dis); | 110 | local_irq_restore(flags_dis); |
134 | } | 111 | } |
135 | } | 112 | } |
136 | 113 | ||
114 | static __inline__ void __raw_spin_unlock(raw_spinlock_t *lock) | ||
115 | { | ||
116 | __asm__ __volatile__("lwsync # __raw_spin_unlock": : :"memory"); | ||
117 | lock->slock = 0; | ||
118 | } | ||
119 | |||
120 | extern void __raw_spin_unlock_wait(raw_spinlock_t *lock); | ||
121 | |||
137 | /* | 122 | /* |
138 | * Read-write spinlocks, allowing multiple readers | 123 | * Read-write spinlocks, allowing multiple readers |
139 | * but only one writer. | 124 | * but only one writer. |
@@ -144,24 +129,15 @@ static void __inline__ _raw_spin_lock_flags(spinlock_t *lock, unsigned long flag | |||
144 | * irq-safe write-lock, but readers can get non-irqsafe | 129 | * irq-safe write-lock, but readers can get non-irqsafe |
145 | * read-locks. | 130 | * read-locks. |
146 | */ | 131 | */ |
147 | #define RW_LOCK_UNLOCKED (rwlock_t) { 0 } | ||
148 | 132 | ||
149 | #define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while(0) | 133 | #define __raw_read_can_lock(rw) ((rw)->lock >= 0) |
150 | 134 | #define __raw_write_can_lock(rw) (!(rw)->lock) | |
151 | #define read_can_lock(rw) ((rw)->lock >= 0) | ||
152 | #define write_can_lock(rw) (!(rw)->lock) | ||
153 | |||
154 | static __inline__ void _raw_write_unlock(rwlock_t *rw) | ||
155 | { | ||
156 | __asm__ __volatile__("lwsync # write_unlock": : :"memory"); | ||
157 | rw->lock = 0; | ||
158 | } | ||
159 | 135 | ||
160 | /* | 136 | /* |
161 | * This returns the old value in the lock + 1, | 137 | * This returns the old value in the lock + 1, |
162 | * so we got a read lock if the return value is > 0. | 138 | * so we got a read lock if the return value is > 0. |
163 | */ | 139 | */ |
164 | static long __inline__ __read_trylock(rwlock_t *rw) | 140 | static long __inline__ __read_trylock(raw_rwlock_t *rw) |
165 | { | 141 | { |
166 | long tmp; | 142 | long tmp; |
167 | 143 | ||
@@ -180,45 +156,11 @@ static long __inline__ __read_trylock(rwlock_t *rw) | |||
180 | return tmp; | 156 | return tmp; |
181 | } | 157 | } |
182 | 158 | ||
183 | static int __inline__ _raw_read_trylock(rwlock_t *rw) | ||
184 | { | ||
185 | return __read_trylock(rw) > 0; | ||
186 | } | ||
187 | |||
188 | static void __inline__ _raw_read_lock(rwlock_t *rw) | ||
189 | { | ||
190 | while (1) { | ||
191 | if (likely(__read_trylock(rw) > 0)) | ||
192 | break; | ||
193 | do { | ||
194 | HMT_low(); | ||
195 | if (SHARED_PROCESSOR) | ||
196 | __rw_yield(rw); | ||
197 | } while (unlikely(rw->lock < 0)); | ||
198 | HMT_medium(); | ||
199 | } | ||
200 | } | ||
201 | |||
202 | static void __inline__ _raw_read_unlock(rwlock_t *rw) | ||
203 | { | ||
204 | long tmp; | ||
205 | |||
206 | __asm__ __volatile__( | ||
207 | "eieio # read_unlock\n\ | ||
208 | 1: lwarx %0,0,%1\n\ | ||
209 | addic %0,%0,-1\n\ | ||
210 | stwcx. %0,0,%1\n\ | ||
211 | bne- 1b" | ||
212 | : "=&r"(tmp) | ||
213 | : "r"(&rw->lock) | ||
214 | : "cr0", "memory"); | ||
215 | } | ||
216 | |||
217 | /* | 159 | /* |
218 | * This returns the old value in the lock, | 160 | * This returns the old value in the lock, |
219 | * so we got the write lock if the return value is 0. | 161 | * so we got the write lock if the return value is 0. |
220 | */ | 162 | */ |
221 | static __inline__ long __write_trylock(rwlock_t *rw) | 163 | static __inline__ long __write_trylock(raw_rwlock_t *rw) |
222 | { | 164 | { |
223 | long tmp, tmp2; | 165 | long tmp, tmp2; |
224 | 166 | ||
@@ -237,12 +179,21 @@ static __inline__ long __write_trylock(rwlock_t *rw) | |||
237 | return tmp; | 179 | return tmp; |
238 | } | 180 | } |
239 | 181 | ||
240 | static int __inline__ _raw_write_trylock(rwlock_t *rw) | 182 | static void __inline__ __raw_read_lock(raw_rwlock_t *rw) |
241 | { | 183 | { |
242 | return __write_trylock(rw) == 0; | 184 | while (1) { |
185 | if (likely(__read_trylock(rw) > 0)) | ||
186 | break; | ||
187 | do { | ||
188 | HMT_low(); | ||
189 | if (SHARED_PROCESSOR) | ||
190 | __rw_yield(rw); | ||
191 | } while (unlikely(rw->lock < 0)); | ||
192 | HMT_medium(); | ||
193 | } | ||
243 | } | 194 | } |
244 | 195 | ||
245 | static void __inline__ _raw_write_lock(rwlock_t *rw) | 196 | static void __inline__ __raw_write_lock(raw_rwlock_t *rw) |
246 | { | 197 | { |
247 | while (1) { | 198 | while (1) { |
248 | if (likely(__write_trylock(rw) == 0)) | 199 | if (likely(__write_trylock(rw) == 0)) |
@@ -256,5 +207,35 @@ static void __inline__ _raw_write_lock(rwlock_t *rw) | |||
256 | } | 207 | } |
257 | } | 208 | } |
258 | 209 | ||
259 | #endif /* __KERNEL__ */ | 210 | static int __inline__ __raw_read_trylock(raw_rwlock_t *rw) |
211 | { | ||
212 | return __read_trylock(rw) > 0; | ||
213 | } | ||
214 | |||
215 | static int __inline__ __raw_write_trylock(raw_rwlock_t *rw) | ||
216 | { | ||
217 | return __write_trylock(rw) == 0; | ||
218 | } | ||
219 | |||
220 | static void __inline__ __raw_read_unlock(raw_rwlock_t *rw) | ||
221 | { | ||
222 | long tmp; | ||
223 | |||
224 | __asm__ __volatile__( | ||
225 | "eieio # read_unlock\n\ | ||
226 | 1: lwarx %0,0,%1\n\ | ||
227 | addic %0,%0,-1\n\ | ||
228 | stwcx. %0,0,%1\n\ | ||
229 | bne- 1b" | ||
230 | : "=&r"(tmp) | ||
231 | : "r"(&rw->lock) | ||
232 | : "cr0", "memory"); | ||
233 | } | ||
234 | |||
235 | static __inline__ void __raw_write_unlock(raw_rwlock_t *rw) | ||
236 | { | ||
237 | __asm__ __volatile__("lwsync # write_unlock": : :"memory"); | ||
238 | rw->lock = 0; | ||
239 | } | ||
240 | |||
260 | #endif /* __ASM_SPINLOCK_H */ | 241 | #endif /* __ASM_SPINLOCK_H */ |