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-rw-r--r--include/asm-ppc64/ptrace-common.h92
1 files changed, 92 insertions, 0 deletions
diff --git a/include/asm-ppc64/ptrace-common.h b/include/asm-ppc64/ptrace-common.h
index af03547f9c7e..b1babb729673 100644
--- a/include/asm-ppc64/ptrace-common.h
+++ b/include/asm-ppc64/ptrace-common.h
@@ -11,6 +11,10 @@
11 11
12#ifndef _PPC64_PTRACE_COMMON_H 12#ifndef _PPC64_PTRACE_COMMON_H
13#define _PPC64_PTRACE_COMMON_H 13#define _PPC64_PTRACE_COMMON_H
14
15#include <linux/config.h>
16#include <asm/system.h>
17
14/* 18/*
15 * Set of msr bits that gdb can change on behalf of a process. 19 * Set of msr bits that gdb can change on behalf of a process.
16 */ 20 */
@@ -69,4 +73,92 @@ static inline void clear_single_step(struct task_struct *task)
69 clear_ti_thread_flag(task->thread_info, TIF_SINGLESTEP); 73 clear_ti_thread_flag(task->thread_info, TIF_SINGLESTEP);
70} 74}
71 75
76#ifdef CONFIG_ALTIVEC
77/*
78 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
79 * The transfer totals 34 quadword. Quadwords 0-31 contain the
80 * corresponding vector registers. Quadword 32 contains the vscr as the
81 * last word (offset 12) within that quadword. Quadword 33 contains the
82 * vrsave as the first word (offset 0) within the quadword.
83 *
84 * This definition of the VMX state is compatible with the current PPC32
85 * ptrace interface. This allows signal handling and ptrace to use the
86 * same structures. This also simplifies the implementation of a bi-arch
87 * (combined (32- and 64-bit) gdb.
88 */
89
90/*
91 * Get contents of AltiVec register state in task TASK
92 */
93static inline int get_vrregs(unsigned long __user *data,
94 struct task_struct *task)
95{
96 unsigned long regsize;
97
98 /* copy AltiVec registers VR[0] .. VR[31] */
99 regsize = 32 * sizeof(vector128);
100 if (copy_to_user(data, task->thread.vr, regsize))
101 return -EFAULT;
102 data += (regsize / sizeof(unsigned long));
103
104 /* copy VSCR */
105 regsize = 1 * sizeof(vector128);
106 if (copy_to_user(data, &task->thread.vscr, regsize))
107 return -EFAULT;
108 data += (regsize / sizeof(unsigned long));
109
110 /* copy VRSAVE */
111 if (put_user(task->thread.vrsave, (u32 __user *)data))
112 return -EFAULT;
113
114 return 0;
115}
116
117/*
118 * Write contents of AltiVec register state into task TASK.
119 */
120static inline int set_vrregs(struct task_struct *task,
121 unsigned long __user *data)
122{
123 unsigned long regsize;
124
125 /* copy AltiVec registers VR[0] .. VR[31] */
126 regsize = 32 * sizeof(vector128);
127 if (copy_from_user(task->thread.vr, data, regsize))
128 return -EFAULT;
129 data += (regsize / sizeof(unsigned long));
130
131 /* copy VSCR */
132 regsize = 1 * sizeof(vector128);
133 if (copy_from_user(&task->thread.vscr, data, regsize))
134 return -EFAULT;
135 data += (regsize / sizeof(unsigned long));
136
137 /* copy VRSAVE */
138 if (get_user(task->thread.vrsave, (u32 __user *)data))
139 return -EFAULT;
140
141 return 0;
142}
143#endif
144
145static inline int ptrace_set_debugreg(struct task_struct *task,
146 unsigned long addr, unsigned long data)
147{
148 /* We only support one DABR and no IABRS at the moment */
149 if (addr > 0)
150 return -EINVAL;
151
152 /* The bottom 3 bits are flags */
153 if ((data & ~0x7UL) >= TASK_SIZE)
154 return -EIO;
155
156 /* Ensure translation is on */
157 if (data && !(data & DABR_TRANSLATION))
158 return -EIO;
159
160 task->thread.dabr = data;
161 return 0;
162}
163
72#endif /* _PPC64_PTRACE_COMMON_H */ 164#endif /* _PPC64_PTRACE_COMMON_H */