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-rw-r--r--include/asm-ppc64/processor.h26
1 files changed, 20 insertions, 6 deletions
diff --git a/include/asm-ppc64/processor.h b/include/asm-ppc64/processor.h
index af28aa55d8c1..352306cfb579 100644
--- a/include/asm-ppc64/processor.h
+++ b/include/asm-ppc64/processor.h
@@ -20,6 +20,7 @@
20#include <asm/ptrace.h> 20#include <asm/ptrace.h>
21#include <asm/types.h> 21#include <asm/types.h>
22#include <asm/systemcfg.h> 22#include <asm/systemcfg.h>
23#include <asm/cputable.h>
23 24
24/* Machine State Register (MSR) Fields */ 25/* Machine State Register (MSR) Fields */
25#define MSR_SF_LG 63 /* Enable 64 bit mode */ 26#define MSR_SF_LG 63 /* Enable 64 bit mode */
@@ -501,24 +502,37 @@ static inline void ppc64_runlatch_on(void)
501{ 502{
502 unsigned long ctrl; 503 unsigned long ctrl;
503 504
504 ctrl = mfspr(SPRN_CTRLF); 505 if (cpu_has_feature(CPU_FTR_CTRL)) {
505 ctrl |= CTRL_RUNLATCH; 506 ctrl = mfspr(SPRN_CTRLF);
506 mtspr(SPRN_CTRLT, ctrl); 507 ctrl |= CTRL_RUNLATCH;
508 mtspr(SPRN_CTRLT, ctrl);
509 }
507} 510}
508 511
509static inline void ppc64_runlatch_off(void) 512static inline void ppc64_runlatch_off(void)
510{ 513{
511 unsigned long ctrl; 514 unsigned long ctrl;
512 515
513 ctrl = mfspr(SPRN_CTRLF); 516 if (cpu_has_feature(CPU_FTR_CTRL)) {
514 ctrl &= ~CTRL_RUNLATCH; 517 ctrl = mfspr(SPRN_CTRLF);
515 mtspr(SPRN_CTRLT, ctrl); 518 ctrl &= ~CTRL_RUNLATCH;
519 mtspr(SPRN_CTRLT, ctrl);
520 }
516} 521}
517 522
518#endif /* __KERNEL__ */ 523#endif /* __KERNEL__ */
519 524
520#endif /* __ASSEMBLY__ */ 525#endif /* __ASSEMBLY__ */
521 526
527#ifdef __KERNEL__
528#define RUNLATCH_ON(REG) \
529BEGIN_FTR_SECTION \
530 mfspr (REG),SPRN_CTRLF; \
531 ori (REG),(REG),CTRL_RUNLATCH; \
532 mtspr SPRN_CTRLT,(REG); \
533END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
534#endif
535
522/* 536/*
523 * Number of entries in the SLB. If this ever changes we should handle 537 * Number of entries in the SLB. If this ever changes we should handle
524 * it with a use a cpu feature fixup. 538 * it with a use a cpu feature fixup.