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-rw-r--r--include/asm-ppc64/processor.h15
1 files changed, 13 insertions, 2 deletions
diff --git a/include/asm-ppc64/processor.h b/include/asm-ppc64/processor.h
index 3084099086a8..af28aa55d8c1 100644
--- a/include/asm-ppc64/processor.h
+++ b/include/asm-ppc64/processor.h
@@ -138,8 +138,16 @@
138#define SPRN_NIADORM 0x3F3 /* Hardware Implementation Register 2 */ 138#define SPRN_NIADORM 0x3F3 /* Hardware Implementation Register 2 */
139#define SPRN_HID4 0x3F4 /* 970 HID4 */ 139#define SPRN_HID4 0x3F4 /* 970 HID4 */
140#define SPRN_HID5 0x3F6 /* 970 HID5 */ 140#define SPRN_HID5 0x3F6 /* 970 HID5 */
141#define SPRN_TSC 0x3FD /* Thread switch control */ 141#define SPRN_HID6 0x3F9 /* BE HID 6 */
142#define SPRN_TST 0x3FC /* Thread switch timeout */ 142#define HID6_LB (0x0F<<12) /* Concurrent Large Page Modes */
143#define HID6_DLP (1<<20) /* Disable all large page modes (4K only) */
144#define SPRN_TSCR 0x399 /* Thread switch control on BE */
145#define SPRN_TTR 0x39A /* Thread switch timeout on BE */
146#define TSCR_DEC_ENABLE 0x200000 /* Decrementer Interrupt */
147#define TSCR_EE_ENABLE 0x100000 /* External Interrupt */
148#define TSCR_EE_BOOST 0x080000 /* External Interrupt Boost */
149#define SPRN_TSC 0x3FD /* Thread switch control on others */
150#define SPRN_TST 0x3FC /* Thread switch timeout on others */
143#define SPRN_L2CR 0x3F9 /* Level 2 Cache Control Regsiter */ 151#define SPRN_L2CR 0x3F9 /* Level 2 Cache Control Regsiter */
144#define SPRN_LR 0x008 /* Link Register */ 152#define SPRN_LR 0x008 /* Link Register */
145#define SPRN_PIR 0x3FF /* Processor Identification Register */ 153#define SPRN_PIR 0x3FF /* Processor Identification Register */
@@ -259,6 +267,7 @@
259#define PV_970FX 0x003C 267#define PV_970FX 0x003C
260#define PV_630 0x0040 268#define PV_630 0x0040
261#define PV_630p 0x0041 269#define PV_630p 0x0041
270#define PV_BE 0x0070
262 271
263/* Platforms supported by PPC64 */ 272/* Platforms supported by PPC64 */
264#define PLATFORM_PSERIES 0x0100 273#define PLATFORM_PSERIES 0x0100
@@ -267,6 +276,7 @@
267#define PLATFORM_LPAR 0x0001 276#define PLATFORM_LPAR 0x0001
268#define PLATFORM_POWERMAC 0x0400 277#define PLATFORM_POWERMAC 0x0400
269#define PLATFORM_MAPLE 0x0500 278#define PLATFORM_MAPLE 0x0500
279#define PLATFORM_BPA 0x1000
270 280
271/* Compatibility with drivers coming from PPC32 world */ 281/* Compatibility with drivers coming from PPC32 world */
272#define _machine (systemcfg->platform) 282#define _machine (systemcfg->platform)
@@ -278,6 +288,7 @@
278#define IC_INVALID 0 288#define IC_INVALID 0
279#define IC_OPEN_PIC 1 289#define IC_OPEN_PIC 1
280#define IC_PPC_XIC 2 290#define IC_PPC_XIC 2
291#define IC_BPA_IIC 3
281 292
282#define XGLUE(a,b) a##b 293#define XGLUE(a,b) a##b
283#define GLUE(a,b) XGLUE(a,b) 294#define GLUE(a,b) XGLUE(a,b)