diff options
Diffstat (limited to 'include/asm-ppc64/iommu.h')
-rw-r--r-- | include/asm-ppc64/iommu.h | 36 |
1 files changed, 1 insertions, 35 deletions
diff --git a/include/asm-ppc64/iommu.h b/include/asm-ppc64/iommu.h index 72dcf8116b04..a6a173d49506 100644 --- a/include/asm-ppc64/iommu.h +++ b/include/asm-ppc64/iommu.h | |||
@@ -1,5 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | * iommu.h | ||
3 | * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation | 2 | * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation |
4 | * Rewrite, cleanup: | 3 | * Rewrite, cleanup: |
5 | * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation | 4 | * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation |
@@ -29,44 +28,11 @@ | |||
29 | 28 | ||
30 | /* | 29 | /* |
31 | * IOMAP_MAX_ORDER defines the largest contiguous block | 30 | * IOMAP_MAX_ORDER defines the largest contiguous block |
32 | * of dma (tce) space we can get. IOMAP_MAX_ORDER = 13 | 31 | * of dma space we can get. IOMAP_MAX_ORDER = 13 |
33 | * allows up to 2**12 pages (4096 * 4096) = 16 MB | 32 | * allows up to 2**12 pages (4096 * 4096) = 16 MB |
34 | */ | 33 | */ |
35 | #define IOMAP_MAX_ORDER 13 | 34 | #define IOMAP_MAX_ORDER 13 |
36 | 35 | ||
37 | /* | ||
38 | * Tces come in two formats, one for the virtual bus and a different | ||
39 | * format for PCI | ||
40 | */ | ||
41 | #define TCE_VB 0 | ||
42 | #define TCE_PCI 1 | ||
43 | |||
44 | /* tce_entry | ||
45 | * Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's | ||
46 | * abstracted so layout is irrelevant. | ||
47 | */ | ||
48 | union tce_entry { | ||
49 | unsigned long te_word; | ||
50 | struct { | ||
51 | unsigned int tb_cacheBits :6; /* Cache hash bits - not used */ | ||
52 | unsigned int tb_rsvd :6; | ||
53 | unsigned long tb_rpn :40; /* Real page number */ | ||
54 | unsigned int tb_valid :1; /* Tce is valid (vb only) */ | ||
55 | unsigned int tb_allio :1; /* Tce is valid for all lps (vb only) */ | ||
56 | unsigned int tb_lpindex :8; /* LpIndex for user of TCE (vb only) */ | ||
57 | unsigned int tb_pciwr :1; /* Write allowed (pci only) */ | ||
58 | unsigned int tb_rdwr :1; /* Read allowed (pci), Write allowed (vb) */ | ||
59 | } te_bits; | ||
60 | #define te_cacheBits te_bits.tb_cacheBits | ||
61 | #define te_rpn te_bits.tb_rpn | ||
62 | #define te_valid te_bits.tb_valid | ||
63 | #define te_allio te_bits.tb_allio | ||
64 | #define te_lpindex te_bits.tb_lpindex | ||
65 | #define te_pciwr te_bits.tb_pciwr | ||
66 | #define te_rdwr te_bits.tb_rdwr | ||
67 | }; | ||
68 | |||
69 | |||
70 | struct iommu_table { | 36 | struct iommu_table { |
71 | unsigned long it_busno; /* Bus number this table belongs to */ | 37 | unsigned long it_busno; /* Bus number this table belongs to */ |
72 | unsigned long it_size; /* Size of iommu table in entries */ | 38 | unsigned long it_size; /* Size of iommu table in entries */ |