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-rw-r--r--include/asm-ppc64/iSeries/ItLpNaca.h42
1 files changed, 15 insertions, 27 deletions
diff --git a/include/asm-ppc64/iSeries/ItLpNaca.h b/include/asm-ppc64/iSeries/ItLpNaca.h
index 5baffddfae1b..942b07d91408 100644
--- a/include/asm-ppc64/iSeries/ItLpNaca.h
+++ b/include/asm-ppc64/iSeries/ItLpNaca.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * ItLpNaca.h 2 * ItLpNaca.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,18 +19,13 @@
19#ifndef _ITLPNACA_H 19#ifndef _ITLPNACA_H
20#define _ITLPNACA_H 20#define _ITLPNACA_H
21 21
22//============================================================================= 22/*
23// 23 * This control block contains the data that is shared between the
24// This control block contains the data that is shared between the 24 * hypervisor (PLIC) and the OS.
25// hypervisor (PLIC) and the OS. 25 */
26//
27//=============================================================================
28 26
29struct ItLpNaca 27struct ItLpNaca {
30{
31//=============================================================================
32// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data 28// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data
33//=============================================================================
34 u32 xDesc; // Eye catcher x00-x03 29 u32 xDesc; // Eye catcher x00-x03
35 u16 xSize; // Size of this class x04-x05 30 u16 xSize; // Size of this class x04-x05
36 u16 xIntHdlrOffset; // Offset to IntHdlr array x06-x07 31 u16 xIntHdlrOffset; // Offset to IntHdlr array x06-x07
@@ -59,30 +54,23 @@ struct ItLpNaca
59 u64 xLoadAreaAddr; // ER address of load area x28-x2F 54 u64 xLoadAreaAddr; // ER address of load area x28-x2F
60 u32 xLoadAreaChunks; // Chunks for the load area x30-x33 55 u32 xLoadAreaChunks; // Chunks for the load area x30-x33
61 u32 xPaseSysCallCRMask; // Mask used to test CR before x34-x37 56 u32 xPaseSysCallCRMask; // Mask used to test CR before x34-x37
62 // doing an ASR switch on PASE 57 // doing an ASR switch on PASE
63 // system call. 58 // system call.
64 u64 xSlicSegmentTablePtr; // Pointer to Slic seg table. x38-x3f 59 u64 xSlicSegmentTablePtr; // Pointer to Slic seg table. x38-x3f
65 u8 xRsvd1_4[64]; // x40-x7F 60 u8 xRsvd1_4[64]; // x40-x7F
66 61
67//=============================================================================
68// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data 62// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data
69//=============================================================================
70 u8 xRsvd2_0[128]; // Reserved x00-x7F 63 u8 xRsvd2_0[128]; // Reserved x00-x7F
71 64
72//=============================================================================
73// CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators 65// CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators
74// NB: Padding required to keep xInterrruptHdlr at x300 which is required 66// NB: Padding required to keep xInterrruptHdlr at x300 which is required
75// for v4r4 PLIC. 67// for v4r4 PLIC.
76//=============================================================================
77 u8 xOldLpQueue[128]; // LP Queue needed for v4r4 100-17F 68 u8 xOldLpQueue[128]; // LP Queue needed for v4r4 100-17F
78 u8 xRsvd3_0[384]; // Reserved 180-2FF 69 u8 xRsvd3_0[384]; // Reserved 180-2FF
79//============================================================================= 70
80// CACHE_LINE_7-8 0x0300 - 0x03FF Contains the address of the OS interrupt 71// CACHE_LINE_7-8 0x0300 - 0x03FF Contains the address of the OS interrupt
81// handlers 72// handlers
82//=============================================================================
83 u64 xInterruptHdlr[32]; // Interrupt handlers 300-x3FF 73 u64 xInterruptHdlr[32]; // Interrupt handlers 300-x3FF
84}; 74};
85 75
86//=============================================================================
87
88#endif /* _ITLPNACA_H */ 76#endif /* _ITLPNACA_H */