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Diffstat (limited to 'include/asm-ppc64/iSeries/HvCallPci.h')
-rw-r--r-- | include/asm-ppc64/iSeries/HvCallPci.h | 673 |
1 files changed, 673 insertions, 0 deletions
diff --git a/include/asm-ppc64/iSeries/HvCallPci.h b/include/asm-ppc64/iSeries/HvCallPci.h new file mode 100644 index 000000000000..6887b619288e --- /dev/null +++ b/include/asm-ppc64/iSeries/HvCallPci.h | |||
@@ -0,0 +1,673 @@ | |||
1 | /************************************************************************/ | ||
2 | /* Provides the Hypervisor PCI calls for iSeries Linux Parition. */ | ||
3 | /* Copyright (C) 2001 <Wayne G Holm> <IBM Corporation> */ | ||
4 | /* */ | ||
5 | /* This program is free software; you can redistribute it and/or modify */ | ||
6 | /* it under the terms of the GNU General Public License as published by */ | ||
7 | /* the Free Software Foundation; either version 2 of the License, or */ | ||
8 | /* (at your option) any later version. */ | ||
9 | /* */ | ||
10 | /* This program is distributed in the hope that it will be useful, */ | ||
11 | /* but WITHOUT ANY WARRANTY; without even the implied warranty of */ | ||
12 | /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ | ||
13 | /* GNU General Public License for more details. */ | ||
14 | /* */ | ||
15 | /* You should have received a copy of the GNU General Public License */ | ||
16 | /* along with this program; if not, write to the: */ | ||
17 | /* Free Software Foundation, Inc., */ | ||
18 | /* 59 Temple Place, Suite 330, */ | ||
19 | /* Boston, MA 02111-1307 USA */ | ||
20 | /************************************************************************/ | ||
21 | /* Change Activity: */ | ||
22 | /* Created, Jan 9, 2001 */ | ||
23 | /************************************************************************/ | ||
24 | |||
25 | #ifndef _HVCALLPCI_H | ||
26 | #define _HVCALLPCI_H | ||
27 | |||
28 | #include <asm/iSeries/HvCallSc.h> | ||
29 | #include <asm/iSeries/HvTypes.h> | ||
30 | |||
31 | /* | ||
32 | * DSA == Direct Select Address | ||
33 | * this struct must be 64 bits in total | ||
34 | */ | ||
35 | struct HvCallPci_DsaAddr { | ||
36 | u16 busNumber; /* PHB index? */ | ||
37 | u8 subBusNumber; /* PCI bus number? */ | ||
38 | u8 deviceId; /* device and function? */ | ||
39 | u8 barNumber; | ||
40 | u8 reserved[3]; | ||
41 | }; | ||
42 | |||
43 | union HvDsaMap { | ||
44 | u64 DsaAddr; | ||
45 | struct HvCallPci_DsaAddr Dsa; | ||
46 | }; | ||
47 | |||
48 | struct HvCallPci_LoadReturn { | ||
49 | u64 rc; | ||
50 | u64 value; | ||
51 | }; | ||
52 | |||
53 | enum HvCallPci_DeviceType { | ||
54 | HvCallPci_NodeDevice = 1, | ||
55 | HvCallPci_SpDevice = 2, | ||
56 | HvCallPci_IopDevice = 3, | ||
57 | HvCallPci_BridgeDevice = 4, | ||
58 | HvCallPci_MultiFunctionDevice = 5, | ||
59 | HvCallPci_IoaDevice = 6 | ||
60 | }; | ||
61 | |||
62 | |||
63 | struct HvCallPci_DeviceInfo { | ||
64 | u32 deviceType; // See DeviceType enum for values | ||
65 | }; | ||
66 | |||
67 | struct HvCallPci_BusUnitInfo { | ||
68 | u32 sizeReturned; // length of data returned | ||
69 | u32 deviceType; // see DeviceType enum for values | ||
70 | }; | ||
71 | |||
72 | struct HvCallPci_BridgeInfo { | ||
73 | struct HvCallPci_BusUnitInfo busUnitInfo; // Generic bus unit info | ||
74 | u8 subBusNumber; // Bus number of secondary bus | ||
75 | u8 maxAgents; // Max idsels on secondary bus | ||
76 | u8 maxSubBusNumber; // Max Sub Bus | ||
77 | u8 logicalSlotNumber; // Logical Slot Number for IOA | ||
78 | }; | ||
79 | |||
80 | |||
81 | // Maximum BusUnitInfo buffer size. Provided for clients so they can allocate | ||
82 | // a buffer big enough for any type of bus unit. Increase as needed. | ||
83 | enum {HvCallPci_MaxBusUnitInfoSize = 128}; | ||
84 | |||
85 | struct HvCallPci_BarParms { | ||
86 | u64 vaddr; | ||
87 | u64 raddr; | ||
88 | u64 size; | ||
89 | u64 protectStart; | ||
90 | u64 protectEnd; | ||
91 | u64 relocationOffset; | ||
92 | u64 pciAddress; | ||
93 | u64 reserved[3]; | ||
94 | }; | ||
95 | |||
96 | enum HvCallPci_VpdType { | ||
97 | HvCallPci_BusVpd = 1, | ||
98 | HvCallPci_BusAdapterVpd = 2 | ||
99 | }; | ||
100 | |||
101 | #define HvCallPciConfigLoad8 HvCallPci + 0 | ||
102 | #define HvCallPciConfigLoad16 HvCallPci + 1 | ||
103 | #define HvCallPciConfigLoad32 HvCallPci + 2 | ||
104 | #define HvCallPciConfigStore8 HvCallPci + 3 | ||
105 | #define HvCallPciConfigStore16 HvCallPci + 4 | ||
106 | #define HvCallPciConfigStore32 HvCallPci + 5 | ||
107 | #define HvCallPciEoi HvCallPci + 16 | ||
108 | #define HvCallPciGetBarParms HvCallPci + 18 | ||
109 | #define HvCallPciMaskFisr HvCallPci + 20 | ||
110 | #define HvCallPciUnmaskFisr HvCallPci + 21 | ||
111 | #define HvCallPciSetSlotReset HvCallPci + 25 | ||
112 | #define HvCallPciGetDeviceInfo HvCallPci + 27 | ||
113 | #define HvCallPciGetCardVpd HvCallPci + 28 | ||
114 | #define HvCallPciBarLoad8 HvCallPci + 40 | ||
115 | #define HvCallPciBarLoad16 HvCallPci + 41 | ||
116 | #define HvCallPciBarLoad32 HvCallPci + 42 | ||
117 | #define HvCallPciBarLoad64 HvCallPci + 43 | ||
118 | #define HvCallPciBarStore8 HvCallPci + 44 | ||
119 | #define HvCallPciBarStore16 HvCallPci + 45 | ||
120 | #define HvCallPciBarStore32 HvCallPci + 46 | ||
121 | #define HvCallPciBarStore64 HvCallPci + 47 | ||
122 | #define HvCallPciMaskInterrupts HvCallPci + 48 | ||
123 | #define HvCallPciUnmaskInterrupts HvCallPci + 49 | ||
124 | #define HvCallPciGetBusUnitInfo HvCallPci + 50 | ||
125 | |||
126 | //============================================================================ | ||
127 | static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber, | ||
128 | u8 deviceId, u32 offset, | ||
129 | u8 *value) | ||
130 | { | ||
131 | struct HvCallPci_DsaAddr dsa; | ||
132 | struct HvCallPci_LoadReturn retVal; | ||
133 | |||
134 | *((u64*)&dsa) = 0; | ||
135 | |||
136 | dsa.busNumber = busNumber; | ||
137 | dsa.subBusNumber = subBusNumber; | ||
138 | dsa.deviceId = deviceId; | ||
139 | |||
140 | HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0); | ||
141 | |||
142 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
143 | |||
144 | *value = retVal.value; | ||
145 | |||
146 | return retVal.rc; | ||
147 | } | ||
148 | //============================================================================ | ||
149 | static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber, | ||
150 | u8 deviceId, u32 offset, | ||
151 | u16 *value) | ||
152 | { | ||
153 | struct HvCallPci_DsaAddr dsa; | ||
154 | struct HvCallPci_LoadReturn retVal; | ||
155 | |||
156 | *((u64*)&dsa) = 0; | ||
157 | |||
158 | dsa.busNumber = busNumber; | ||
159 | dsa.subBusNumber = subBusNumber; | ||
160 | dsa.deviceId = deviceId; | ||
161 | |||
162 | HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0); | ||
163 | |||
164 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
165 | |||
166 | *value = retVal.value; | ||
167 | |||
168 | return retVal.rc; | ||
169 | } | ||
170 | //============================================================================ | ||
171 | static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber, | ||
172 | u8 deviceId, u32 offset, | ||
173 | u32 *value) | ||
174 | { | ||
175 | struct HvCallPci_DsaAddr dsa; | ||
176 | struct HvCallPci_LoadReturn retVal; | ||
177 | |||
178 | *((u64*)&dsa) = 0; | ||
179 | |||
180 | dsa.busNumber = busNumber; | ||
181 | dsa.subBusNumber = subBusNumber; | ||
182 | dsa.deviceId = deviceId; | ||
183 | |||
184 | HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0); | ||
185 | |||
186 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
187 | |||
188 | *value = retVal.value; | ||
189 | |||
190 | return retVal.rc; | ||
191 | } | ||
192 | //============================================================================ | ||
193 | static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber, | ||
194 | u8 deviceId, u32 offset, | ||
195 | u8 value) | ||
196 | { | ||
197 | struct HvCallPci_DsaAddr dsa; | ||
198 | u64 retVal; | ||
199 | |||
200 | *((u64*)&dsa) = 0; | ||
201 | |||
202 | dsa.busNumber = busNumber; | ||
203 | dsa.subBusNumber = subBusNumber; | ||
204 | dsa.deviceId = deviceId; | ||
205 | |||
206 | retVal = HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0); | ||
207 | |||
208 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
209 | |||
210 | return retVal; | ||
211 | } | ||
212 | //============================================================================ | ||
213 | static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber, | ||
214 | u8 deviceId, u32 offset, | ||
215 | u16 value) | ||
216 | { | ||
217 | struct HvCallPci_DsaAddr dsa; | ||
218 | u64 retVal; | ||
219 | |||
220 | *((u64*)&dsa) = 0; | ||
221 | |||
222 | dsa.busNumber = busNumber; | ||
223 | dsa.subBusNumber = subBusNumber; | ||
224 | dsa.deviceId = deviceId; | ||
225 | |||
226 | retVal = HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0); | ||
227 | |||
228 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
229 | |||
230 | return retVal; | ||
231 | } | ||
232 | //============================================================================ | ||
233 | static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber, | ||
234 | u8 deviceId, u32 offset, | ||
235 | u32 value) | ||
236 | { | ||
237 | struct HvCallPci_DsaAddr dsa; | ||
238 | u64 retVal; | ||
239 | |||
240 | *((u64*)&dsa) = 0; | ||
241 | |||
242 | dsa.busNumber = busNumber; | ||
243 | dsa.subBusNumber = subBusNumber; | ||
244 | dsa.deviceId = deviceId; | ||
245 | |||
246 | retVal = HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0); | ||
247 | |||
248 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
249 | |||
250 | return retVal; | ||
251 | } | ||
252 | //============================================================================ | ||
253 | static inline u64 HvCallPci_barLoad8(u16 busNumberParm, | ||
254 | u8 subBusParm, | ||
255 | u8 deviceIdParm, | ||
256 | u8 barNumberParm, | ||
257 | u64 offsetParm, | ||
258 | u8* valueParm) | ||
259 | { | ||
260 | struct HvCallPci_DsaAddr dsa; | ||
261 | struct HvCallPci_LoadReturn retVal; | ||
262 | |||
263 | *((u64*)&dsa) = 0; | ||
264 | |||
265 | dsa.busNumber = busNumberParm; | ||
266 | dsa.subBusNumber = subBusParm; | ||
267 | dsa.deviceId = deviceIdParm; | ||
268 | dsa.barNumber = barNumberParm; | ||
269 | |||
270 | HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0); | ||
271 | |||
272 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
273 | |||
274 | *valueParm = retVal.value; | ||
275 | |||
276 | return retVal.rc; | ||
277 | } | ||
278 | //============================================================================ | ||
279 | static inline u64 HvCallPci_barLoad16(u16 busNumberParm, | ||
280 | u8 subBusParm, | ||
281 | u8 deviceIdParm, | ||
282 | u8 barNumberParm, | ||
283 | u64 offsetParm, | ||
284 | u16* valueParm) | ||
285 | { | ||
286 | struct HvCallPci_DsaAddr dsa; | ||
287 | struct HvCallPci_LoadReturn retVal; | ||
288 | |||
289 | *((u64*)&dsa) = 0; | ||
290 | |||
291 | dsa.busNumber = busNumberParm; | ||
292 | dsa.subBusNumber = subBusParm; | ||
293 | dsa.deviceId = deviceIdParm; | ||
294 | dsa.barNumber = barNumberParm; | ||
295 | |||
296 | HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0); | ||
297 | |||
298 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
299 | |||
300 | *valueParm = retVal.value; | ||
301 | |||
302 | return retVal.rc; | ||
303 | } | ||
304 | //============================================================================ | ||
305 | static inline u64 HvCallPci_barLoad32(u16 busNumberParm, | ||
306 | u8 subBusParm, | ||
307 | u8 deviceIdParm, | ||
308 | u8 barNumberParm, | ||
309 | u64 offsetParm, | ||
310 | u32* valueParm) | ||
311 | { | ||
312 | struct HvCallPci_DsaAddr dsa; | ||
313 | struct HvCallPci_LoadReturn retVal; | ||
314 | |||
315 | *((u64*)&dsa) = 0; | ||
316 | |||
317 | dsa.busNumber = busNumberParm; | ||
318 | dsa.subBusNumber = subBusParm; | ||
319 | dsa.deviceId = deviceIdParm; | ||
320 | dsa.barNumber = barNumberParm; | ||
321 | |||
322 | HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0); | ||
323 | |||
324 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
325 | |||
326 | *valueParm = retVal.value; | ||
327 | |||
328 | return retVal.rc; | ||
329 | } | ||
330 | //============================================================================ | ||
331 | static inline u64 HvCallPci_barLoad64(u16 busNumberParm, | ||
332 | u8 subBusParm, | ||
333 | u8 deviceIdParm, | ||
334 | u8 barNumberParm, | ||
335 | u64 offsetParm, | ||
336 | u64* valueParm) | ||
337 | { | ||
338 | struct HvCallPci_DsaAddr dsa; | ||
339 | struct HvCallPci_LoadReturn retVal; | ||
340 | |||
341 | *((u64*)&dsa) = 0; | ||
342 | |||
343 | dsa.busNumber = busNumberParm; | ||
344 | dsa.subBusNumber = subBusParm; | ||
345 | dsa.deviceId = deviceIdParm; | ||
346 | dsa.barNumber = barNumberParm; | ||
347 | |||
348 | HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0); | ||
349 | |||
350 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
351 | |||
352 | *valueParm = retVal.value; | ||
353 | |||
354 | return retVal.rc; | ||
355 | } | ||
356 | //============================================================================ | ||
357 | static inline u64 HvCallPci_barStore8(u16 busNumberParm, | ||
358 | u8 subBusParm, | ||
359 | u8 deviceIdParm, | ||
360 | u8 barNumberParm, | ||
361 | u64 offsetParm, | ||
362 | u8 valueParm) | ||
363 | { | ||
364 | struct HvCallPci_DsaAddr dsa; | ||
365 | u64 retVal; | ||
366 | |||
367 | *((u64*)&dsa) = 0; | ||
368 | |||
369 | dsa.busNumber = busNumberParm; | ||
370 | dsa.subBusNumber = subBusParm; | ||
371 | dsa.deviceId = deviceIdParm; | ||
372 | dsa.barNumber = barNumberParm; | ||
373 | |||
374 | retVal = HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm, valueParm, 0); | ||
375 | |||
376 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
377 | |||
378 | return retVal; | ||
379 | } | ||
380 | //============================================================================ | ||
381 | static inline u64 HvCallPci_barStore16(u16 busNumberParm, | ||
382 | u8 subBusParm, | ||
383 | u8 deviceIdParm, | ||
384 | u8 barNumberParm, | ||
385 | u64 offsetParm, | ||
386 | u16 valueParm) | ||
387 | { | ||
388 | struct HvCallPci_DsaAddr dsa; | ||
389 | u64 retVal; | ||
390 | |||
391 | *((u64*)&dsa) = 0; | ||
392 | |||
393 | dsa.busNumber = busNumberParm; | ||
394 | dsa.subBusNumber = subBusParm; | ||
395 | dsa.deviceId = deviceIdParm; | ||
396 | dsa.barNumber = barNumberParm; | ||
397 | |||
398 | retVal = HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm, valueParm, 0); | ||
399 | |||
400 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
401 | |||
402 | return retVal; | ||
403 | } | ||
404 | //============================================================================ | ||
405 | static inline u64 HvCallPci_barStore32(u16 busNumberParm, | ||
406 | u8 subBusParm, | ||
407 | u8 deviceIdParm, | ||
408 | u8 barNumberParm, | ||
409 | u64 offsetParm, | ||
410 | u32 valueParm) | ||
411 | { | ||
412 | struct HvCallPci_DsaAddr dsa; | ||
413 | u64 retVal; | ||
414 | |||
415 | *((u64*)&dsa) = 0; | ||
416 | |||
417 | dsa.busNumber = busNumberParm; | ||
418 | dsa.subBusNumber = subBusParm; | ||
419 | dsa.deviceId = deviceIdParm; | ||
420 | dsa.barNumber = barNumberParm; | ||
421 | |||
422 | retVal = HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm, valueParm, 0); | ||
423 | |||
424 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
425 | |||
426 | return retVal; | ||
427 | } | ||
428 | //============================================================================ | ||
429 | static inline u64 HvCallPci_barStore64(u16 busNumberParm, | ||
430 | u8 subBusParm, | ||
431 | u8 deviceIdParm, | ||
432 | u8 barNumberParm, | ||
433 | u64 offsetParm, | ||
434 | u64 valueParm) | ||
435 | { | ||
436 | struct HvCallPci_DsaAddr dsa; | ||
437 | u64 retVal; | ||
438 | |||
439 | *((u64*)&dsa) = 0; | ||
440 | |||
441 | dsa.busNumber = busNumberParm; | ||
442 | dsa.subBusNumber = subBusParm; | ||
443 | dsa.deviceId = deviceIdParm; | ||
444 | dsa.barNumber = barNumberParm; | ||
445 | |||
446 | retVal = HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm, valueParm, 0); | ||
447 | |||
448 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
449 | |||
450 | return retVal; | ||
451 | } | ||
452 | //============================================================================ | ||
453 | static inline u64 HvCallPci_eoi(u16 busNumberParm, | ||
454 | u8 subBusParm, | ||
455 | u8 deviceIdParm) | ||
456 | { | ||
457 | struct HvCallPci_DsaAddr dsa; | ||
458 | struct HvCallPci_LoadReturn retVal; | ||
459 | |||
460 | *((u64*)&dsa) = 0; | ||
461 | |||
462 | dsa.busNumber = busNumberParm; | ||
463 | dsa.subBusNumber = subBusParm; | ||
464 | dsa.deviceId = deviceIdParm; | ||
465 | |||
466 | HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa); | ||
467 | |||
468 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
469 | |||
470 | return retVal.rc; | ||
471 | } | ||
472 | //============================================================================ | ||
473 | static inline u64 HvCallPci_getBarParms(u16 busNumberParm, | ||
474 | u8 subBusParm, | ||
475 | u8 deviceIdParm, | ||
476 | u8 barNumberParm, | ||
477 | u64 parms, | ||
478 | u32 sizeofParms) | ||
479 | { | ||
480 | struct HvCallPci_DsaAddr dsa; | ||
481 | u64 retVal; | ||
482 | |||
483 | *((u64*)&dsa) = 0; | ||
484 | |||
485 | dsa.busNumber = busNumberParm; | ||
486 | dsa.subBusNumber = subBusParm; | ||
487 | dsa.deviceId = deviceIdParm; | ||
488 | dsa.barNumber = barNumberParm; | ||
489 | |||
490 | retVal = HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms); | ||
491 | |||
492 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
493 | |||
494 | return retVal; | ||
495 | } | ||
496 | //============================================================================ | ||
497 | static inline u64 HvCallPci_maskFisr(u16 busNumberParm, | ||
498 | u8 subBusParm, | ||
499 | u8 deviceIdParm, | ||
500 | u64 fisrMask) | ||
501 | { | ||
502 | struct HvCallPci_DsaAddr dsa; | ||
503 | u64 retVal; | ||
504 | |||
505 | *((u64*)&dsa) = 0; | ||
506 | |||
507 | dsa.busNumber = busNumberParm; | ||
508 | dsa.subBusNumber = subBusParm; | ||
509 | dsa.deviceId = deviceIdParm; | ||
510 | |||
511 | retVal = HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask); | ||
512 | |||
513 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
514 | |||
515 | return retVal; | ||
516 | } | ||
517 | //============================================================================ | ||
518 | static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, | ||
519 | u8 subBusParm, | ||
520 | u8 deviceIdParm, | ||
521 | u64 fisrMask) | ||
522 | { | ||
523 | struct HvCallPci_DsaAddr dsa; | ||
524 | u64 retVal; | ||
525 | |||
526 | *((u64*)&dsa) = 0; | ||
527 | |||
528 | dsa.busNumber = busNumberParm; | ||
529 | dsa.subBusNumber = subBusParm; | ||
530 | dsa.deviceId = deviceIdParm; | ||
531 | |||
532 | retVal = HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask); | ||
533 | |||
534 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
535 | |||
536 | return retVal; | ||
537 | } | ||
538 | //============================================================================ | ||
539 | static inline u64 HvCallPci_setSlotReset(u16 busNumberParm, | ||
540 | u8 subBusParm, | ||
541 | u8 deviceIdParm, | ||
542 | u64 onNotOff) | ||
543 | { | ||
544 | struct HvCallPci_DsaAddr dsa; | ||
545 | u64 retVal; | ||
546 | |||
547 | *((u64*)&dsa) = 0; | ||
548 | |||
549 | dsa.busNumber = busNumberParm; | ||
550 | dsa.subBusNumber = subBusParm; | ||
551 | dsa.deviceId = deviceIdParm; | ||
552 | |||
553 | retVal = HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff); | ||
554 | |||
555 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
556 | |||
557 | return retVal; | ||
558 | } | ||
559 | //============================================================================ | ||
560 | static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, | ||
561 | u8 subBusParm, | ||
562 | u8 deviceNumberParm, | ||
563 | u64 parms, | ||
564 | u32 sizeofParms) | ||
565 | { | ||
566 | struct HvCallPci_DsaAddr dsa; | ||
567 | u64 retVal; | ||
568 | |||
569 | *((u64*)&dsa) = 0; | ||
570 | |||
571 | dsa.busNumber = busNumberParm; | ||
572 | dsa.subBusNumber = subBusParm; | ||
573 | dsa.deviceId = deviceNumberParm << 4; | ||
574 | |||
575 | retVal = HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms); | ||
576 | |||
577 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
578 | |||
579 | return retVal; | ||
580 | } | ||
581 | //============================================================================ | ||
582 | static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, | ||
583 | u8 subBusParm, | ||
584 | u8 deviceIdParm, | ||
585 | u64 interruptMask) | ||
586 | { | ||
587 | struct HvCallPci_DsaAddr dsa; | ||
588 | u64 retVal; | ||
589 | |||
590 | *((u64*)&dsa) = 0; | ||
591 | |||
592 | dsa.busNumber = busNumberParm; | ||
593 | dsa.subBusNumber = subBusParm; | ||
594 | dsa.deviceId = deviceIdParm; | ||
595 | |||
596 | retVal = HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask); | ||
597 | |||
598 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
599 | |||
600 | return retVal; | ||
601 | } | ||
602 | //============================================================================ | ||
603 | static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, | ||
604 | u8 subBusParm, | ||
605 | u8 deviceIdParm, | ||
606 | u64 interruptMask) | ||
607 | { | ||
608 | struct HvCallPci_DsaAddr dsa; | ||
609 | u64 retVal; | ||
610 | |||
611 | *((u64*)&dsa) = 0; | ||
612 | |||
613 | dsa.busNumber = busNumberParm; | ||
614 | dsa.subBusNumber = subBusParm; | ||
615 | dsa.deviceId = deviceIdParm; | ||
616 | |||
617 | retVal = HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask); | ||
618 | |||
619 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
620 | |||
621 | return retVal; | ||
622 | } | ||
623 | //============================================================================ | ||
624 | |||
625 | static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, | ||
626 | u8 subBusParm, | ||
627 | u8 deviceIdParm, | ||
628 | u64 parms, | ||
629 | u32 sizeofParms) | ||
630 | { | ||
631 | struct HvCallPci_DsaAddr dsa; | ||
632 | u64 retVal; | ||
633 | |||
634 | *((u64*)&dsa) = 0; | ||
635 | |||
636 | dsa.busNumber = busNumberParm; | ||
637 | dsa.subBusNumber = subBusParm; | ||
638 | dsa.deviceId = deviceIdParm; | ||
639 | |||
640 | retVal = HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms, sizeofParms); | ||
641 | |||
642 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
643 | |||
644 | return retVal; | ||
645 | } | ||
646 | //============================================================================ | ||
647 | |||
648 | static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm, u16 sizeParm) | ||
649 | { | ||
650 | int xRetSize; | ||
651 | u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusVpd); | ||
652 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
653 | if (xRc == -1) | ||
654 | xRetSize = -1; | ||
655 | else | ||
656 | xRetSize = xRc & 0xFFFF; | ||
657 | return xRetSize; | ||
658 | } | ||
659 | //============================================================================ | ||
660 | |||
661 | static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm, u16 sizeParm) | ||
662 | { | ||
663 | int xRetSize; | ||
664 | u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusAdapterVpd); | ||
665 | // getPaca()->adjustHmtForNoOfSpinLocksHeld(); | ||
666 | if (xRc == -1) | ||
667 | xRetSize = -1; | ||
668 | else | ||
669 | xRetSize = xRc & 0xFFFF; | ||
670 | return xRetSize; | ||
671 | } | ||
672 | //============================================================================ | ||
673 | #endif /* _HVCALLPCI_H */ | ||