diff options
Diffstat (limited to 'include/asm-ppc64/cputable.h')
-rw-r--r-- | include/asm-ppc64/cputable.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/include/asm-ppc64/cputable.h b/include/asm-ppc64/cputable.h index ae6cf3830108..acc9b4d6c168 100644 --- a/include/asm-ppc64/cputable.h +++ b/include/asm-ppc64/cputable.h | |||
@@ -36,6 +36,7 @@ | |||
36 | * via the mkdefs mechanism. | 36 | * via the mkdefs mechanism. |
37 | */ | 37 | */ |
38 | struct cpu_spec; | 38 | struct cpu_spec; |
39 | struct op_ppc64_model; | ||
39 | 40 | ||
40 | typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec); | 41 | typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec); |
41 | 42 | ||
@@ -52,10 +53,19 @@ struct cpu_spec { | |||
52 | unsigned int icache_bsize; | 53 | unsigned int icache_bsize; |
53 | unsigned int dcache_bsize; | 54 | unsigned int dcache_bsize; |
54 | 55 | ||
56 | /* number of performance monitor counters */ | ||
57 | unsigned int num_pmcs; | ||
58 | |||
55 | /* this is called to initialize various CPU bits like L1 cache, | 59 | /* this is called to initialize various CPU bits like L1 cache, |
56 | * BHT, SPD, etc... from head.S before branching to identify_machine | 60 | * BHT, SPD, etc... from head.S before branching to identify_machine |
57 | */ | 61 | */ |
58 | cpu_setup_t cpu_setup; | 62 | cpu_setup_t cpu_setup; |
63 | |||
64 | /* Used by oprofile userspace to select the right counters */ | ||
65 | char *oprofile_cpu_type; | ||
66 | |||
67 | /* Processor specific oprofile operations */ | ||
68 | struct op_ppc64_model *oprofile_model; | ||
59 | }; | 69 | }; |
60 | 70 | ||
61 | extern struct cpu_spec cpu_specs[]; | 71 | extern struct cpu_spec cpu_specs[]; |
@@ -95,7 +105,7 @@ static inline unsigned long cpu_has_feature(unsigned long feature) | |||
95 | #define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000001000000000) | 105 | #define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000001000000000) |
96 | #define CPU_FTR_IABR ASM_CONST(0x0000002000000000) | 106 | #define CPU_FTR_IABR ASM_CONST(0x0000002000000000) |
97 | #define CPU_FTR_MMCRA ASM_CONST(0x0000004000000000) | 107 | #define CPU_FTR_MMCRA ASM_CONST(0x0000004000000000) |
98 | #define CPU_FTR_PMC8 ASM_CONST(0x0000008000000000) | 108 | /* unused ASM_CONST(0x0000008000000000) */ |
99 | #define CPU_FTR_SMT ASM_CONST(0x0000010000000000) | 109 | #define CPU_FTR_SMT ASM_CONST(0x0000010000000000) |
100 | #define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0000020000000000) | 110 | #define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0000020000000000) |
101 | #define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0000040000000000) | 111 | #define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0000040000000000) |