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-rw-r--r--include/asm-ppc/reg_booke.h26
1 files changed, 0 insertions, 26 deletions
diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h
index 2f1a2afcfc28..91e96af88bd8 100644
--- a/include/asm-ppc/reg_booke.h
+++ b/include/asm-ppc/reg_booke.h
@@ -218,32 +218,6 @@
218#define MCSR_DCFP 0x01000000 /* D-Cache Flush Parity Error */ 218#define MCSR_DCFP 0x01000000 /* D-Cache Flush Parity Error */
219#define MCSR_IMPE 0x00800000 /* Imprecise Machine Check Exception */ 219#define MCSR_IMPE 0x00800000 /* Imprecise Machine Check Exception */
220#endif 220#endif
221#ifdef CONFIG_E500
222#define MCSR_MCP 0x80000000UL /* Machine Check Input Pin */
223#define MCSR_ICPERR 0x40000000UL /* I-Cache Parity Error */
224#define MCSR_DCP_PERR 0x20000000UL /* D-Cache Push Parity Error */
225#define MCSR_DCPERR 0x10000000UL /* D-Cache Parity Error */
226#define MCSR_GL_CI 0x00010000UL /* Guarded Load or Cache-Inhibited stwcx. */
227#define MCSR_BUS_IAERR 0x00000080UL /* Instruction Address Error */
228#define MCSR_BUS_RAERR 0x00000040UL /* Read Address Error */
229#define MCSR_BUS_WAERR 0x00000020UL /* Write Address Error */
230#define MCSR_BUS_IBERR 0x00000010UL /* Instruction Data Error */
231#define MCSR_BUS_RBERR 0x00000008UL /* Read Data Bus Error */
232#define MCSR_BUS_WBERR 0x00000004UL /* Write Data Bus Error */
233#define MCSR_BUS_IPERR 0x00000002UL /* Instruction parity Error */
234#define MCSR_BUS_RPERR 0x00000001UL /* Read parity Error */
235#endif
236#ifdef CONFIG_E200
237#define MCSR_MCP 0x80000000UL /* Machine Check Input Pin */
238#define MCSR_CP_PERR 0x20000000UL /* Cache Push Parity Error */
239#define MCSR_CPERR 0x10000000UL /* Cache Parity Error */
240#define MCSR_EXCP_ERR 0x08000000UL /* ISI, ITLB, or Bus Error on 1st insn
241 fetch for an exception handler */
242#define MCSR_BUS_IRERR 0x00000010UL /* Read Bus Error on instruction fetch*/
243#define MCSR_BUS_DRERR 0x00000008UL /* Read Bus Error on data load */
244#define MCSR_BUS_WRERR 0x00000004UL /* Write Bus Error on buffered
245 store or cache line push */
246#endif
247 221
248/* Bit definitions for the DBSR. */ 222/* Bit definitions for the DBSR. */
249/* 223/*