aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-ppc/ptrace.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/asm-ppc/ptrace.h')
-rw-r--r--include/asm-ppc/ptrace.h152
1 files changed, 0 insertions, 152 deletions
diff --git a/include/asm-ppc/ptrace.h b/include/asm-ppc/ptrace.h
deleted file mode 100644
index c34fb4e37a97..000000000000
--- a/include/asm-ppc/ptrace.h
+++ /dev/null
@@ -1,152 +0,0 @@
1#ifndef _PPC_PTRACE_H
2#define _PPC_PTRACE_H
3
4/*
5 * This struct defines the way the registers are stored on the
6 * kernel stack during a system call or other kernel entry.
7 *
8 * this should only contain volatile regs
9 * since we can keep non-volatile in the thread_struct
10 * should set this up when only volatiles are saved
11 * by intr code.
12 *
13 * Since this is going on the stack, *CARE MUST BE TAKEN* to insure
14 * that the overall structure is a multiple of 16 bytes in length.
15 *
16 * Note that the offsets of the fields in this struct correspond with
17 * the PT_* values below. This simplifies arch/ppc/kernel/ptrace.c.
18 */
19
20#ifndef __ASSEMBLY__
21struct pt_regs {
22 unsigned long gpr[32];
23 unsigned long nip;
24 unsigned long msr;
25 unsigned long orig_gpr3; /* Used for restarting system calls */
26 unsigned long ctr;
27 unsigned long link;
28 unsigned long xer;
29 unsigned long ccr;
30 unsigned long mq; /* 601 only (not used at present) */
31 /* Used on APUS to hold IPL value. */
32 unsigned long trap; /* Reason for being here */
33 /* N.B. for critical exceptions on 4xx, the dar and dsisr
34 fields are overloaded to hold srr0 and srr1. */
35 unsigned long dar; /* Fault registers */
36 unsigned long dsisr; /* on 4xx/Book-E used for ESR */
37 unsigned long result; /* Result of a system call */
38};
39
40#endif /* __ASSEMBLY__ */
41
42#ifdef __KERNEL__
43#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */
44
45/* Size of stack frame allocated when calling signal handler. */
46#define __SIGNAL_FRAMESIZE 64
47
48#ifndef __ASSEMBLY__
49#define instruction_pointer(regs) ((regs)->nip)
50#ifdef CONFIG_SMP
51extern unsigned long profile_pc(struct pt_regs *regs);
52#else
53#define profile_pc(regs) instruction_pointer(regs)
54#endif
55
56#define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
57
58#define force_successful_syscall_return() \
59 do { \
60 current_thread_info()->syscall_noerror = 1; \
61 } while(0)
62
63/*
64 * We use the least-significant bit of the trap field to indicate
65 * whether we have saved the full set of registers, or only a
66 * partial set. A 1 there means the partial set.
67 * On 4xx we use the next bit to indicate whether the exception
68 * is a critical exception (1 means it is).
69 */
70#define FULL_REGS(regs) (((regs)->trap & 1) == 0)
71#define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) == 0)
72#define TRAP(regs) ((regs)->trap & ~0xF)
73
74#define CHECK_FULL_REGS(regs) \
75do { \
76 if ((regs)->trap & 1) \
77 printk(KERN_CRIT "%s: partial register set\n", __FUNCTION__); \
78} while (0)
79#endif /* __ASSEMBLY__ */
80
81#endif /* __KERNEL__ */
82
83/*
84 * Offsets used by 'ptrace' system call interface.
85 * These can't be changed without breaking binary compatibility
86 * with MkLinux, etc.
87 */
88#define PT_R0 0
89#define PT_R1 1
90#define PT_R2 2
91#define PT_R3 3
92#define PT_R4 4
93#define PT_R5 5
94#define PT_R6 6
95#define PT_R7 7
96#define PT_R8 8
97#define PT_R9 9
98#define PT_R10 10
99#define PT_R11 11
100#define PT_R12 12
101#define PT_R13 13
102#define PT_R14 14
103#define PT_R15 15
104#define PT_R16 16
105#define PT_R17 17
106#define PT_R18 18
107#define PT_R19 19
108#define PT_R20 20
109#define PT_R21 21
110#define PT_R22 22
111#define PT_R23 23
112#define PT_R24 24
113#define PT_R25 25
114#define PT_R26 26
115#define PT_R27 27
116#define PT_R28 28
117#define PT_R29 29
118#define PT_R30 30
119#define PT_R31 31
120
121#define PT_NIP 32
122#define PT_MSR 33
123#ifdef __KERNEL__
124#define PT_ORIG_R3 34
125#endif
126#define PT_CTR 35
127#define PT_LNK 36
128#define PT_XER 37
129#define PT_CCR 38
130#define PT_MQ 39
131
132#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
133#define PT_FPR31 (PT_FPR0 + 2*31)
134#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
135
136/* Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go */
137#define PTRACE_GETVRREGS 18
138#define PTRACE_SETVRREGS 19
139
140/* Get/set all the upper 32-bits of the SPE registers, accumulator, and
141 * spefscr, in one go */
142#define PTRACE_GETEVRREGS 20
143#define PTRACE_SETEVRREGS 21
144
145/*
146 * Get or set a debug register. The first 16 are DABR registers and the
147 * second 16 are IABR registers.
148 */
149#define PTRACE_GET_DEBUGREG 25
150#define PTRACE_SET_DEBUGREG 26
151
152#endif