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-rw-r--r--include/asm-ppc/pci-bridge.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h
index 0dee56b839a4..c09fbf02ef24 100644
--- a/include/asm-ppc/pci-bridge.h
+++ b/include/asm-ppc/pci-bridge.h
@@ -73,9 +73,14 @@ struct pci_controller {
73 * Used for variants of PCI indirect handling and possible quirks: 73 * Used for variants of PCI indirect handling and possible quirks:
74 * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 74 * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
75 * EXT_REG - provides access to PCI-e extended registers 75 * EXT_REG - provides access to PCI-e extended registers
76 * SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS
77 * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
78 * to determine which bus number to match on when generating type0
79 * config cycles
76 */ 80 */
77#define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001) 81#define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001)
78#define PPC_INDIRECT_TYPE_EXT_REG (0x00000002) 82#define PPC_INDIRECT_TYPE_EXT_REG (0x00000002)
83#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS (0x00000004)
79 u32 indirect_type; 84 u32 indirect_type;
80 85
81 /* Currently, we limit ourselves to 1 IO range and 3 mem 86 /* Currently, we limit ourselves to 1 IO range and 3 mem