diff options
Diffstat (limited to 'include/asm-ppc/irq.h')
| -rw-r--r-- | include/asm-ppc/irq.h | 34 |
1 files changed, 20 insertions, 14 deletions
diff --git a/include/asm-ppc/irq.h b/include/asm-ppc/irq.h index 06b86be61ed1..a9b33324f562 100644 --- a/include/asm-ppc/irq.h +++ b/include/asm-ppc/irq.h | |||
| @@ -176,7 +176,7 @@ static __inline__ int irq_canonicalize(int irq) | |||
| 176 | */ | 176 | */ |
| 177 | #include <asm/mpc85xx.h> | 177 | #include <asm/mpc85xx.h> |
| 178 | 178 | ||
| 179 | /* The MPC8560 openpic has 32 internal interrupts and 12 external | 179 | /* The MPC8548 openpic has 48 internal interrupts and 12 external |
| 180 | * interrupts. | 180 | * interrupts. |
| 181 | * | 181 | * |
| 182 | * We are "flattening" the interrupt vectors of the cascaded CPM | 182 | * We are "flattening" the interrupt vectors of the cascaded CPM |
| @@ -184,7 +184,7 @@ static __inline__ int irq_canonicalize(int irq) | |||
| 184 | * single integer. | 184 | * single integer. |
| 185 | */ | 185 | */ |
| 186 | #define NR_CPM_INTS 64 | 186 | #define NR_CPM_INTS 64 |
| 187 | #define NR_EPIC_INTS 44 | 187 | #define NR_EPIC_INTS 60 |
| 188 | #ifndef NR_8259_INTS | 188 | #ifndef NR_8259_INTS |
| 189 | #define NR_8259_INTS 0 | 189 | #define NR_8259_INTS 0 |
| 190 | #endif | 190 | #endif |
| @@ -223,9 +223,15 @@ static __inline__ int irq_canonicalize(int irq) | |||
| 223 | #define MPC85xx_IRQ_RIO_RX (12 + MPC85xx_OPENPIC_IRQ_OFFSET) | 223 | #define MPC85xx_IRQ_RIO_RX (12 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 224 | #define MPC85xx_IRQ_TSEC1_TX (13 + MPC85xx_OPENPIC_IRQ_OFFSET) | 224 | #define MPC85xx_IRQ_TSEC1_TX (13 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 225 | #define MPC85xx_IRQ_TSEC1_RX (14 + MPC85xx_OPENPIC_IRQ_OFFSET) | 225 | #define MPC85xx_IRQ_TSEC1_RX (14 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 226 | #define MPC85xx_IRQ_TSEC3_TX (15 + MPC85xx_OPENPIC_IRQ_OFFSET) | ||
| 227 | #define MPC85xx_IRQ_TSEC3_RX (16 + MPC85xx_OPENPIC_IRQ_OFFSET) | ||
| 228 | #define MPC85xx_IRQ_TSEC3_ERROR (17 + MPC85xx_OPENPIC_IRQ_OFFSET) | ||
| 226 | #define MPC85xx_IRQ_TSEC1_ERROR (18 + MPC85xx_OPENPIC_IRQ_OFFSET) | 229 | #define MPC85xx_IRQ_TSEC1_ERROR (18 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 227 | #define MPC85xx_IRQ_TSEC2_TX (19 + MPC85xx_OPENPIC_IRQ_OFFSET) | 230 | #define MPC85xx_IRQ_TSEC2_TX (19 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 228 | #define MPC85xx_IRQ_TSEC2_RX (20 + MPC85xx_OPENPIC_IRQ_OFFSET) | 231 | #define MPC85xx_IRQ_TSEC2_RX (20 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 232 | #define MPC85xx_IRQ_TSEC4_TX (21 + MPC85xx_OPENPIC_IRQ_OFFSET) | ||
| 233 | #define MPC85xx_IRQ_TSEC4_RX (22 + MPC85xx_OPENPIC_IRQ_OFFSET) | ||
| 234 | #define MPC85xx_IRQ_TSEC4_ERROR (23 + MPC85xx_OPENPIC_IRQ_OFFSET) | ||
| 229 | #define MPC85xx_IRQ_TSEC2_ERROR (24 + MPC85xx_OPENPIC_IRQ_OFFSET) | 235 | #define MPC85xx_IRQ_TSEC2_ERROR (24 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 230 | #define MPC85xx_IRQ_FEC (25 + MPC85xx_OPENPIC_IRQ_OFFSET) | 236 | #define MPC85xx_IRQ_FEC (25 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 231 | #define MPC85xx_IRQ_DUART (26 + MPC85xx_OPENPIC_IRQ_OFFSET) | 237 | #define MPC85xx_IRQ_DUART (26 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| @@ -235,18 +241,18 @@ static __inline__ int irq_canonicalize(int irq) | |||
| 235 | #define MPC85xx_IRQ_CPM (30 + MPC85xx_OPENPIC_IRQ_OFFSET) | 241 | #define MPC85xx_IRQ_CPM (30 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 236 | 242 | ||
| 237 | /* The 12 external interrupt lines */ | 243 | /* The 12 external interrupt lines */ |
| 238 | #define MPC85xx_IRQ_EXT0 (32 + MPC85xx_OPENPIC_IRQ_OFFSET) | 244 | #define MPC85xx_IRQ_EXT0 (48 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 239 | #define MPC85xx_IRQ_EXT1 (33 + MPC85xx_OPENPIC_IRQ_OFFSET) | 245 | #define MPC85xx_IRQ_EXT1 (49 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 240 | #define MPC85xx_IRQ_EXT2 (34 + MPC85xx_OPENPIC_IRQ_OFFSET) | 246 | #define MPC85xx_IRQ_EXT2 (50 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 241 | #define MPC85xx_IRQ_EXT3 (35 + MPC85xx_OPENPIC_IRQ_OFFSET) | 247 | #define MPC85xx_IRQ_EXT3 (51 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 242 | #define MPC85xx_IRQ_EXT4 (36 + MPC85xx_OPENPIC_IRQ_OFFSET) | 248 | #define MPC85xx_IRQ_EXT4 (52 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 243 | #define MPC85xx_IRQ_EXT5 (37 + MPC85xx_OPENPIC_IRQ_OFFSET) | 249 | #define MPC85xx_IRQ_EXT5 (53 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 244 | #define MPC85xx_IRQ_EXT6 (38 + MPC85xx_OPENPIC_IRQ_OFFSET) | 250 | #define MPC85xx_IRQ_EXT6 (54 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 245 | #define MPC85xx_IRQ_EXT7 (39 + MPC85xx_OPENPIC_IRQ_OFFSET) | 251 | #define MPC85xx_IRQ_EXT7 (55 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 246 | #define MPC85xx_IRQ_EXT8 (40 + MPC85xx_OPENPIC_IRQ_OFFSET) | 252 | #define MPC85xx_IRQ_EXT8 (56 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 247 | #define MPC85xx_IRQ_EXT9 (41 + MPC85xx_OPENPIC_IRQ_OFFSET) | 253 | #define MPC85xx_IRQ_EXT9 (57 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 248 | #define MPC85xx_IRQ_EXT10 (42 + MPC85xx_OPENPIC_IRQ_OFFSET) | 254 | #define MPC85xx_IRQ_EXT10 (58 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 249 | #define MPC85xx_IRQ_EXT11 (43 + MPC85xx_OPENPIC_IRQ_OFFSET) | 255 | #define MPC85xx_IRQ_EXT11 (59 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 250 | 256 | ||
| 251 | /* CPM related interrupts */ | 257 | /* CPM related interrupts */ |
| 252 | #define SIU_INT_ERROR ((uint)0x00+CPM_IRQ_OFFSET) | 258 | #define SIU_INT_ERROR ((uint)0x00+CPM_IRQ_OFFSET) |