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-rw-r--r--include/asm-powerpc/Kbuild1
-rw-r--r--include/asm-powerpc/asm-compat.h10
-rw-r--r--include/asm-powerpc/atomic.h40
-rw-r--r--include/asm-powerpc/cacheflush.h6
-rw-r--r--include/asm-powerpc/cell-pmu.h20
-rw-r--r--include/asm-powerpc/cputable.h24
-rw-r--r--include/asm-powerpc/current.h1
-rw-r--r--include/asm-powerpc/dcr-native.h4
-rw-r--r--include/asm-powerpc/dcr.h1
-rw-r--r--include/asm-powerpc/dma-mapping.h12
-rw-r--r--include/asm-powerpc/edac.h40
-rw-r--r--include/asm-powerpc/eeh_event.h6
-rw-r--r--include/asm-powerpc/elf.h2
-rw-r--r--include/asm-powerpc/firmware.h10
-rw-r--r--include/asm-powerpc/floppy.h135
-rw-r--r--include/asm-powerpc/fs_pd.h49
-rw-r--r--include/asm-powerpc/hvcall.h15
-rw-r--r--include/asm-powerpc/ibmebus.h44
-rw-r--r--include/asm-powerpc/immap_86xx.h75
-rw-r--r--include/asm-powerpc/immap_qe.h3
-rw-r--r--include/asm-powerpc/io.h13
-rw-r--r--include/asm-powerpc/iommu.h1
-rw-r--r--include/asm-powerpc/ipic.h2
-rw-r--r--include/asm-powerpc/irq.h3
-rw-r--r--include/asm-powerpc/kprobes.h12
-rw-r--r--include/asm-powerpc/machdep.h3
-rw-r--r--include/asm-powerpc/mmu-hash64.h400
-rw-r--r--include/asm-powerpc/mmu.h404
-rw-r--r--include/asm-powerpc/mpc52xx.h2
-rw-r--r--include/asm-powerpc/mpc8260.h24
-rw-r--r--include/asm-powerpc/mpc8xx.h28
-rw-r--r--include/asm-powerpc/mpic.h36
-rw-r--r--include/asm-powerpc/of_device.h3
-rw-r--r--include/asm-powerpc/oprofile_impl.h89
-rw-r--r--include/asm-powerpc/paca.h4
-rw-r--r--include/asm-powerpc/parport.h6
-rw-r--r--include/asm-powerpc/pci-bridge.h2
-rw-r--r--include/asm-powerpc/pci.h14
-rw-r--r--include/asm-powerpc/pgtable-4k.h3
-rw-r--r--include/asm-powerpc/pgtable-64k.h5
-rw-r--r--include/asm-powerpc/pgtable.h60
-rw-r--r--include/asm-powerpc/pmc.h1
-rw-r--r--include/asm-powerpc/pmi.h67
-rw-r--r--include/asm-powerpc/ppc-pci.h12
-rw-r--r--include/asm-powerpc/processor.h1
-rw-r--r--include/asm-powerpc/prom.h36
-rw-r--r--include/asm-powerpc/ps3.h221
-rw-r--r--include/asm-powerpc/ps3av.h738
-rw-r--r--include/asm-powerpc/ps3fb.h56
-rw-r--r--include/asm-powerpc/reg.h70
-rw-r--r--include/asm-powerpc/smp.h1
-rw-r--r--include/asm-powerpc/socket.h2
-rw-r--r--include/asm-powerpc/sockios.h3
-rw-r--r--include/asm-powerpc/spu.h21
-rw-r--r--include/asm-powerpc/spu_csa.h5
-rw-r--r--include/asm-powerpc/spu_priv1.h2
-rw-r--r--include/asm-powerpc/sstep.h1
-rw-r--r--include/asm-powerpc/string.h2
-rw-r--r--include/asm-powerpc/systbl.h6
-rw-r--r--include/asm-powerpc/system.h1
-rw-r--r--include/asm-powerpc/termios.h18
-rw-r--r--include/asm-powerpc/time.h2
-rw-r--r--include/asm-powerpc/tlb.h1
-rw-r--r--include/asm-powerpc/tlbflush.h172
-rw-r--r--include/asm-powerpc/topology.h1
-rw-r--r--include/asm-powerpc/uaccess.h28
-rw-r--r--include/asm-powerpc/ucc_fast.h3
-rw-r--r--include/asm-powerpc/ucc_slow.h8
-rw-r--r--include/asm-powerpc/udbg.h3
-rw-r--r--include/asm-powerpc/uic.h23
-rw-r--r--include/asm-powerpc/unistd.h4
-rw-r--r--include/asm-powerpc/vdso.h5
72 files changed, 2132 insertions, 994 deletions
diff --git a/include/asm-powerpc/Kbuild b/include/asm-powerpc/Kbuild
index 703970fb0ec0..4869513b872f 100644
--- a/include/asm-powerpc/Kbuild
+++ b/include/asm-powerpc/Kbuild
@@ -23,6 +23,7 @@ header-y += linkage.h
23header-y += resource.h 23header-y += resource.h
24header-y += sigcontext.h 24header-y += sigcontext.h
25header-y += statfs.h 25header-y += statfs.h
26header-y += ps3fb.h
26 27
27unifdef-y += a.out.h 28unifdef-y += a.out.h
28unifdef-y += asm-compat.h 29unifdef-y += asm-compat.h
diff --git a/include/asm-powerpc/asm-compat.h b/include/asm-powerpc/asm-compat.h
index c89bd58ee283..c19e7367fce6 100644
--- a/include/asm-powerpc/asm-compat.h
+++ b/include/asm-powerpc/asm-compat.h
@@ -78,6 +78,15 @@
78#define PPC_STLCX stringify_in_c(stdcx.) 78#define PPC_STLCX stringify_in_c(stdcx.)
79#define PPC_CNTLZL stringify_in_c(cntlzd) 79#define PPC_CNTLZL stringify_in_c(cntlzd)
80 80
81/* Move to CR, single-entry optimized version. Only available
82 * on POWER4 and later.
83 */
84#ifdef CONFIG_POWER4_ONLY
85#define PPC_MTOCRF stringify_in_c(mtocrf)
86#else
87#define PPC_MTOCRF stringify_in_c(mtcrf)
88#endif
89
81#else /* 32-bit */ 90#else /* 32-bit */
82 91
83/* operations for longs and pointers */ 92/* operations for longs and pointers */
@@ -89,6 +98,7 @@
89#define PPC_LLARX stringify_in_c(lwarx) 98#define PPC_LLARX stringify_in_c(lwarx)
90#define PPC_STLCX stringify_in_c(stwcx.) 99#define PPC_STLCX stringify_in_c(stwcx.)
91#define PPC_CNTLZL stringify_in_c(cntlzw) 100#define PPC_CNTLZL stringify_in_c(cntlzw)
101#define PPC_MTOCRF stringify_in_c(mtcrf)
92 102
93#endif 103#endif
94 104
diff --git a/include/asm-powerpc/atomic.h b/include/asm-powerpc/atomic.h
index f038e33e6d48..2ce4b6b7b348 100644
--- a/include/asm-powerpc/atomic.h
+++ b/include/asm-powerpc/atomic.h
@@ -165,7 +165,8 @@ static __inline__ int atomic_dec_return(atomic_t *v)
165 return t; 165 return t;
166} 166}
167 167
168#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) 168#define atomic_cmpxchg(v, o, n) \
169 ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
169#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) 170#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
170 171
171/** 172/**
@@ -413,6 +414,43 @@ static __inline__ long atomic64_dec_if_positive(atomic64_t *v)
413 return t; 414 return t;
414} 415}
415 416
417#define atomic64_cmpxchg(v, o, n) \
418 ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
419#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
420
421/**
422 * atomic64_add_unless - add unless the number is a given value
423 * @v: pointer of type atomic64_t
424 * @a: the amount to add to v...
425 * @u: ...unless v is equal to u.
426 *
427 * Atomically adds @a to @v, so long as it was not @u.
428 * Returns non-zero if @v was not @u, and zero otherwise.
429 */
430static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
431{
432 long t;
433
434 __asm__ __volatile__ (
435 LWSYNC_ON_SMP
436"1: ldarx %0,0,%1 # atomic_add_unless\n\
437 cmpd 0,%0,%3 \n\
438 beq- 2f \n\
439 add %0,%2,%0 \n"
440" stdcx. %0,0,%1 \n\
441 bne- 1b \n"
442 ISYNC_ON_SMP
443" subf %0,%2,%0 \n\
4442:"
445 : "=&r" (t)
446 : "r" (&v->counter), "r" (a), "r" (u)
447 : "cc", "memory");
448
449 return t != u;
450}
451
452#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
453
416#endif /* __powerpc64__ */ 454#endif /* __powerpc64__ */
417 455
418#include <asm-generic/atomic.h> 456#include <asm-generic/atomic.h>
diff --git a/include/asm-powerpc/cacheflush.h b/include/asm-powerpc/cacheflush.h
index 08e93e789219..ba667a383b8c 100644
--- a/include/asm-powerpc/cacheflush.h
+++ b/include/asm-powerpc/cacheflush.h
@@ -64,6 +64,12 @@ extern void flush_dcache_phys_range(unsigned long start, unsigned long stop);
64 memcpy(dst, src, len) 64 memcpy(dst, src, len)
65 65
66 66
67
68#ifdef CONFIG_DEBUG_PAGEALLOC
69/* internal debugging function */
70void kernel_map_pages(struct page *page, int numpages, int enable);
71#endif
72
67#endif /* __KERNEL__ */ 73#endif /* __KERNEL__ */
68 74
69#endif /* _ASM_POWERPC_CACHEFLUSH_H */ 75#endif /* _ASM_POWERPC_CACHEFLUSH_H */
diff --git a/include/asm-powerpc/cell-pmu.h b/include/asm-powerpc/cell-pmu.h
index e8c2ebd3ddda..8066eede3a0c 100644
--- a/include/asm-powerpc/cell-pmu.h
+++ b/include/asm-powerpc/cell-pmu.h
@@ -53,6 +53,11 @@
53#define CBE_PM_CTR_POLARITY 0x01000000 53#define CBE_PM_CTR_POLARITY 0x01000000
54#define CBE_PM_CTR_COUNT_CYCLES 0x00800000 54#define CBE_PM_CTR_COUNT_CYCLES 0x00800000
55#define CBE_PM_CTR_ENABLE 0x00400000 55#define CBE_PM_CTR_ENABLE 0x00400000
56#define PM07_CTR_INPUT_MUX(x) (((x) & 0x3F) << 26)
57#define PM07_CTR_INPUT_CONTROL(x) (((x) & 1) << 25)
58#define PM07_CTR_POLARITY(x) (((x) & 1) << 24)
59#define PM07_CTR_COUNT_CYCLES(x) (((x) & 1) << 23)
60#define PM07_CTR_ENABLE(x) (((x) & 1) << 22)
56 61
57/* Macros for the pm_status register. */ 62/* Macros for the pm_status register. */
58#define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7))) 63#define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7)))
@@ -89,25 +94,12 @@ extern void cbe_read_trace_buffer(u32 cpu, u64 *buf);
89 94
90extern void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask); 95extern void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask);
91extern void cbe_disable_pm_interrupts(u32 cpu); 96extern void cbe_disable_pm_interrupts(u32 cpu);
92extern u32 cbe_query_pm_interrupts(u32 cpu); 97extern u32 cbe_get_and_clear_pm_interrupts(u32 cpu);
93extern u32 cbe_clear_pm_interrupts(u32 cpu);
94extern void cbe_sync_irq(int node); 98extern void cbe_sync_irq(int node);
95 99
96/* Utility functions, macros */
97extern u32 cbe_get_hw_thread_id(int cpu);
98
99#define cbe_cpu_to_node(cpu) ((cpu) >> 1)
100
101#define CBE_COUNT_SUPERVISOR_MODE 0 100#define CBE_COUNT_SUPERVISOR_MODE 0
102#define CBE_COUNT_HYPERVISOR_MODE 1 101#define CBE_COUNT_HYPERVISOR_MODE 1
103#define CBE_COUNT_PROBLEM_MODE 2 102#define CBE_COUNT_PROBLEM_MODE 2
104#define CBE_COUNT_ALL_MODES 3 103#define CBE_COUNT_ALL_MODES 3
105 104
106/* Macros for the pm07_control registers. */
107#define PM07_CTR_INPUT_MUX(x) (((x) & 0x3F) << 26)
108#define PM07_CTR_INPUT_CONTROL(x) (((x) & 1) << 25)
109#define PM07_CTR_POLARITY(x) (((x) & 1) << 24)
110#define PM07_CTR_COUNT_CYCLES(x) (((x) & 1) << 23)
111#define PM07_CTR_ENABLE(x) (((x) & 1) << 22)
112
113#endif /* __ASM_CELL_PMU_H__ */ 105#endif /* __ASM_CELL_PMU_H__ */
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 7384b8086b75..434524931ef3 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -48,6 +48,13 @@ enum powerpc_oprofile_type {
48 PPC_OPROFILE_G4 = 3, 48 PPC_OPROFILE_G4 = 3,
49 PPC_OPROFILE_BOOKE = 4, 49 PPC_OPROFILE_BOOKE = 4,
50 PPC_OPROFILE_CELL = 5, 50 PPC_OPROFILE_CELL = 5,
51 PPC_OPROFILE_PA6T = 6,
52};
53
54enum powerpc_pmc_type {
55 PPC_PMC_DEFAULT = 0,
56 PPC_PMC_IBM = 1,
57 PPC_PMC_PA6T = 2,
51}; 58};
52 59
53struct cpu_spec { 60struct cpu_spec {
@@ -65,6 +72,7 @@ struct cpu_spec {
65 72
66 /* number of performance monitor counters */ 73 /* number of performance monitor counters */
67 unsigned int num_pmcs; 74 unsigned int num_pmcs;
75 enum powerpc_pmc_type pmc_type;
68 76
69 /* this is called to initialize various CPU bits like L1 cache, 77 /* this is called to initialize various CPU bits like L1 cache,
70 * BHT, SPD, etc... from head.S before branching to identify_machine 78 * BHT, SPD, etc... from head.S before branching to identify_machine
@@ -216,6 +224,10 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
216 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ 224 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
217 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ 225 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
218 CPU_FTR_PPC_LE) 226 CPU_FTR_PPC_LE)
227#define CPU_FTRS_750CL (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
228 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
229 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
230 CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE)
219#define CPU_FTRS_750FX1 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ 231#define CPU_FTRS_750FX1 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
220 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ 232 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
221 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ 233 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
@@ -228,9 +240,9 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
228 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ 240 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
229 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ 241 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
230 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) 242 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE)
231#define CPU_FTRS_750GX (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | \ 243#define CPU_FTRS_750GX (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
232 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | \ 244 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
233 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ 245 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
234 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) 246 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE)
235#define CPU_FTRS_7400_NOTAU (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ 247#define CPU_FTRS_7400_NOTAU (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
236 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ 248 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
@@ -337,12 +349,6 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
337 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ 349 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
338 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ 350 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
339 CPU_FTR_DSCR) 351 CPU_FTR_DSCR)
340#define CPU_FTRS_POWER6X (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
341 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
342 CPU_FTR_MMCRA | CPU_FTR_SMT | \
343 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
344 CPU_FTR_PURR | CPU_FTR_CI_LARGE_PAGE | \
345 CPU_FTR_SPURR | CPU_FTR_REAL_LE | CPU_FTR_DSCR)
346#define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ 352#define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
347 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 353 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
348 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ 354 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
diff --git a/include/asm-powerpc/current.h b/include/asm-powerpc/current.h
index b8708aedf925..e2c7f06931e7 100644
--- a/include/asm-powerpc/current.h
+++ b/include/asm-powerpc/current.h
@@ -12,6 +12,7 @@
12struct task_struct; 12struct task_struct;
13 13
14#ifdef __powerpc64__ 14#ifdef __powerpc64__
15#include <linux/stddef.h>
15#include <asm/paca.h> 16#include <asm/paca.h>
16 17
17static inline struct task_struct *get_current(void) 18static inline struct task_struct *get_current(void)
diff --git a/include/asm-powerpc/dcr-native.h b/include/asm-powerpc/dcr-native.h
index d7a1bc1551c6..05af081222f6 100644
--- a/include/asm-powerpc/dcr-native.h
+++ b/include/asm-powerpc/dcr-native.h
@@ -26,8 +26,8 @@ typedef struct {} dcr_host_t;
26 26
27#define DCR_MAP_OK(host) (1) 27#define DCR_MAP_OK(host) (1)
28 28
29#define dcr_map(dev, dcr_n, dcr_c) {} 29#define dcr_map(dev, dcr_n, dcr_c) ((dcr_host_t){})
30#define dcr_unmap(host, dcr_n, dcr_c) {} 30#define dcr_unmap(host, dcr_n, dcr_c) do {} while (0)
31#define dcr_read(host, dcr_n) mfdcr(dcr_n) 31#define dcr_read(host, dcr_n) mfdcr(dcr_n)
32#define dcr_write(host, dcr_n, value) mtdcr(dcr_n, value) 32#define dcr_write(host, dcr_n, value) mtdcr(dcr_n, value)
33 33
diff --git a/include/asm-powerpc/dcr.h b/include/asm-powerpc/dcr.h
index b66c5e6941f0..9338d50538f1 100644
--- a/include/asm-powerpc/dcr.h
+++ b/include/asm-powerpc/dcr.h
@@ -33,6 +33,7 @@
33 * base from the device-tree 33 * base from the device-tree
34 */ 34 */
35#ifdef CONFIG_PPC_MERGE 35#ifdef CONFIG_PPC_MERGE
36struct device_node;
36extern unsigned int dcr_resource_start(struct device_node *np, 37extern unsigned int dcr_resource_start(struct device_node *np,
37 unsigned int index); 38 unsigned int index);
38extern unsigned int dcr_resource_len(struct device_node *np, 39extern unsigned int dcr_resource_len(struct device_node *np,
diff --git a/include/asm-powerpc/dma-mapping.h b/include/asm-powerpc/dma-mapping.h
index 7c7de87bd8ae..a19a6f1a1cf1 100644
--- a/include/asm-powerpc/dma-mapping.h
+++ b/include/asm-powerpc/dma-mapping.h
@@ -37,9 +37,9 @@ extern void __dma_sync_page(struct page *page, unsigned long offset,
37 */ 37 */
38 38
39#define __dma_alloc_coherent(gfp, size, handle) NULL 39#define __dma_alloc_coherent(gfp, size, handle) NULL
40#define __dma_free_coherent(size, addr) do { } while (0) 40#define __dma_free_coherent(size, addr) ((void)0)
41#define __dma_sync(addr, size, rw) do { } while (0) 41#define __dma_sync(addr, size, rw) ((void)0)
42#define __dma_sync_page(pg, off, sz, rw) do { } while (0) 42#define __dma_sync_page(pg, off, sz, rw) ((void)0)
43 43
44#endif /* ! CONFIG_NOT_COHERENT_CACHE */ 44#endif /* ! CONFIG_NOT_COHERENT_CACHE */
45 45
@@ -251,7 +251,7 @@ dma_map_single(struct device *dev, void *ptr, size_t size,
251} 251}
252 252
253/* We do nothing. */ 253/* We do nothing. */
254#define dma_unmap_single(dev, addr, size, dir) do { } while (0) 254#define dma_unmap_single(dev, addr, size, dir) ((void)0)
255 255
256static inline dma_addr_t 256static inline dma_addr_t
257dma_map_page(struct device *dev, struct page *page, 257dma_map_page(struct device *dev, struct page *page,
@@ -266,7 +266,7 @@ dma_map_page(struct device *dev, struct page *page,
266} 266}
267 267
268/* We do nothing. */ 268/* We do nothing. */
269#define dma_unmap_page(dev, handle, size, dir) do { } while (0) 269#define dma_unmap_page(dev, handle, size, dir) ((void)0)
270 270
271static inline int 271static inline int
272dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, 272dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
@@ -286,7 +286,7 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
286} 286}
287 287
288/* We don't do anything here. */ 288/* We don't do anything here. */
289#define dma_unmap_sg(dev, sg, nents, dir) do { } while (0) 289#define dma_unmap_sg(dev, sg, nents, dir) ((void)0)
290 290
291#endif /* CONFIG_PPC64 */ 291#endif /* CONFIG_PPC64 */
292 292
diff --git a/include/asm-powerpc/edac.h b/include/asm-powerpc/edac.h
new file mode 100644
index 000000000000..6ead88bbfbb8
--- /dev/null
+++ b/include/asm-powerpc/edac.h
@@ -0,0 +1,40 @@
1/*
2 * PPC EDAC common defs
3 *
4 * Author: Dave Jiang <djiang@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef ASM_EDAC_H
12#define ASM_EDAC_H
13/*
14 * ECC atomic, DMA, SMP and interrupt safe scrub function.
15 * Implements the per arch atomic_scrub() that EDAC use for software
16 * ECC scrubbing. It reads memory and then writes back the original
17 * value, allowing the hardware to detect and correct memory errors.
18 */
19static __inline__ void atomic_scrub(void *va, u32 size)
20{
21 unsigned int *virt_addr = va;
22 unsigned int temp;
23 unsigned int i;
24
25 for (i = 0; i < size / sizeof(*virt_addr); i++, virt_addr++) {
26 /* Very carefully read and write to memory atomically
27 * so we are interrupt, DMA and SMP safe.
28 */
29 __asm__ __volatile__ ("\n\
30 1: lwarx %0,0,%1\n\
31 stwcx. %0,0,%1\n\
32 bne- 1b\n\
33 isync"
34 : "=&r"(temp)
35 : "r"(virt_addr)
36 : "cr0", "memory");
37 }
38}
39
40#endif
diff --git a/include/asm-powerpc/eeh_event.h b/include/asm-powerpc/eeh_event.h
index dc6bf0ffb796..cc3cb04539ac 100644
--- a/include/asm-powerpc/eeh_event.h
+++ b/include/asm-powerpc/eeh_event.h
@@ -30,8 +30,6 @@ struct eeh_event {
30 struct list_head list; 30 struct list_head list;
31 struct device_node *dn; /* struct device node */ 31 struct device_node *dn; /* struct device node */
32 struct pci_dev *dev; /* affected device */ 32 struct pci_dev *dev; /* affected device */
33 enum pci_channel_state state; /* PCI bus state for the affected device */
34 int time_unavail; /* milliseconds until device might be available */
35}; 33};
36 34
37/** 35/**
@@ -46,9 +44,7 @@ struct eeh_event {
46 * (from a workqueue). 44 * (from a workqueue).
47 */ 45 */
48int eeh_send_failure_event (struct device_node *dn, 46int eeh_send_failure_event (struct device_node *dn,
49 struct pci_dev *dev, 47 struct pci_dev *dev);
50 enum pci_channel_state state,
51 int time_unavail);
52 48
53/* Main recovery function */ 49/* Main recovery function */
54struct pci_dn * handle_eeh_events (struct eeh_event *); 50struct pci_dn * handle_eeh_events (struct eeh_event *);
diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h
index d36426c01b6b..de507995c7b1 100644
--- a/include/asm-powerpc/elf.h
+++ b/include/asm-powerpc/elf.h
@@ -173,7 +173,7 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
173 the loader. We need to make sure that it is out of the way of the program 173 the loader. We need to make sure that it is out of the way of the program
174 that it will "exec", and that there is sufficient room for the brk. */ 174 that it will "exec", and that there is sufficient room for the brk. */
175 175
176#define ELF_ET_DYN_BASE (0x08000000) 176#define ELF_ET_DYN_BASE (0x20000000)
177 177
178/* Common routine for both 32-bit and 64-bit processes */ 178/* Common routine for both 32-bit and 64-bit processes */
179static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs, 179static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,
diff --git a/include/asm-powerpc/firmware.h b/include/asm-powerpc/firmware.h
index 98f7b62422c9..3671c128f271 100644
--- a/include/asm-powerpc/firmware.h
+++ b/include/asm-powerpc/firmware.h
@@ -43,6 +43,8 @@
43#define FW_FEATURE_ISERIES ASM_CONST(0x0000000000200000) 43#define FW_FEATURE_ISERIES ASM_CONST(0x0000000000200000)
44#define FW_FEATURE_LPAR ASM_CONST(0x0000000000400000) 44#define FW_FEATURE_LPAR ASM_CONST(0x0000000000400000)
45#define FW_FEATURE_PS3_LV1 ASM_CONST(0x0000000000800000) 45#define FW_FEATURE_PS3_LV1 ASM_CONST(0x0000000000800000)
46#define FW_FEATURE_BEAT ASM_CONST(0x0000000001000000)
47#define FW_FEATURE_BULK_REMOVE ASM_CONST(0x0000000002000000)
46 48
47#ifndef __ASSEMBLY__ 49#ifndef __ASSEMBLY__
48 50
@@ -61,6 +63,8 @@ enum {
61 FW_FEATURE_ISERIES_ALWAYS = FW_FEATURE_ISERIES | FW_FEATURE_LPAR, 63 FW_FEATURE_ISERIES_ALWAYS = FW_FEATURE_ISERIES | FW_FEATURE_LPAR,
62 FW_FEATURE_PS3_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1, 64 FW_FEATURE_PS3_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,
63 FW_FEATURE_PS3_ALWAYS = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1, 65 FW_FEATURE_PS3_ALWAYS = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,
66 FW_FEATURE_CELLEB_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_BEAT,
67 FW_FEATURE_CELLEB_ALWAYS = FW_FEATURE_LPAR | FW_FEATURE_BEAT,
64 FW_FEATURE_NATIVE_POSSIBLE = 0, 68 FW_FEATURE_NATIVE_POSSIBLE = 0,
65 FW_FEATURE_NATIVE_ALWAYS = 0, 69 FW_FEATURE_NATIVE_ALWAYS = 0,
66 FW_FEATURE_POSSIBLE = 70 FW_FEATURE_POSSIBLE =
@@ -73,6 +77,9 @@ enum {
73#ifdef CONFIG_PPC_PS3 77#ifdef CONFIG_PPC_PS3
74 FW_FEATURE_PS3_POSSIBLE | 78 FW_FEATURE_PS3_POSSIBLE |
75#endif 79#endif
80#ifdef CONFIG_PPC_CELLEB
81 FW_FEATURE_CELLEB_POSSIBLE |
82#endif
76#ifdef CONFIG_PPC_NATIVE 83#ifdef CONFIG_PPC_NATIVE
77 FW_FEATURE_NATIVE_ALWAYS | 84 FW_FEATURE_NATIVE_ALWAYS |
78#endif 85#endif
@@ -87,6 +94,9 @@ enum {
87#ifdef CONFIG_PPC_PS3 94#ifdef CONFIG_PPC_PS3
88 FW_FEATURE_PS3_ALWAYS & 95 FW_FEATURE_PS3_ALWAYS &
89#endif 96#endif
97#ifdef CONFIG_PPC_CELLEB
98 FW_FEATURE_CELLEB_ALWAYS &
99#endif
90#ifdef CONFIG_PPC_NATIVE 100#ifdef CONFIG_PPC_NATIVE
91 FW_FEATURE_NATIVE_ALWAYS & 101 FW_FEATURE_NATIVE_ALWAYS &
92#endif 102#endif
diff --git a/include/asm-powerpc/floppy.h b/include/asm-powerpc/floppy.h
index fd242a22331c..afa700ded877 100644
--- a/include/asm-powerpc/floppy.h
+++ b/include/asm-powerpc/floppy.h
@@ -17,28 +17,115 @@
17#define fd_outb(value,port) outb_p(value,port) 17#define fd_outb(value,port) outb_p(value,port)
18 18
19#define fd_enable_dma() enable_dma(FLOPPY_DMA) 19#define fd_enable_dma() enable_dma(FLOPPY_DMA)
20#define fd_disable_dma() disable_dma(FLOPPY_DMA) 20#define fd_disable_dma() fd_ops->_disable_dma(FLOPPY_DMA)
21#define fd_request_dma() request_dma(FLOPPY_DMA, "floppy") 21#define fd_free_dma() fd_ops->_free_dma(FLOPPY_DMA)
22#define fd_free_dma() free_dma(FLOPPY_DMA)
23#define fd_clear_dma_ff() clear_dma_ff(FLOPPY_DMA) 22#define fd_clear_dma_ff() clear_dma_ff(FLOPPY_DMA)
24#define fd_set_dma_mode(mode) set_dma_mode(FLOPPY_DMA, mode) 23#define fd_set_dma_mode(mode) set_dma_mode(FLOPPY_DMA, mode)
25#define fd_set_dma_count(count) set_dma_count(FLOPPY_DMA, count) 24#define fd_set_dma_count(count) set_dma_count(FLOPPY_DMA, count)
25#define fd_get_dma_residue() fd_ops->_get_dma_residue(FLOPPY_DMA)
26#define fd_enable_irq() enable_irq(FLOPPY_IRQ) 26#define fd_enable_irq() enable_irq(FLOPPY_IRQ)
27#define fd_disable_irq() disable_irq(FLOPPY_IRQ) 27#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
28#define fd_cacheflush(addr,size) /* nothing */ 28#define fd_cacheflush(addr,size) /* nothing */
29#define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt, \
30 IRQF_DISABLED, "floppy", NULL)
31#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL); 29#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL);
32 30
33#ifdef CONFIG_PCI
34
35#include <linux/pci.h> 31#include <linux/pci.h>
36#include <asm/ppc-pci.h> /* for ppc64_isabridge_dev */ 32#include <asm/ppc-pci.h> /* for ppc64_isabridge_dev */
37 33
38#define fd_dma_setup(addr,size,mode,io) powerpc_fd_dma_setup(addr,size,mode,io) 34#define fd_dma_setup(addr,size,mode,io) fd_ops->_dma_setup(addr,size,mode,io)
35
36static int fd_request_dma(void);
37
38struct fd_dma_ops {
39 void (*_disable_dma)(unsigned int dmanr);
40 void (*_free_dma)(unsigned int dmanr);
41 int (*_get_dma_residue)(unsigned int dummy);
42 int (*_dma_setup)(char *addr, unsigned long size, int mode, int io);
43};
44
45static int virtual_dma_count;
46static int virtual_dma_residue;
47static char *virtual_dma_addr;
48static int virtual_dma_mode;
49static int doing_vdma;
50static struct fd_dma_ops *fd_ops;
51
52static irqreturn_t floppy_hardint(int irq, void *dev_id)
53{
54 unsigned char st;
55 int lcount;
56 char *lptr;
57
58 if (!doing_vdma)
59 return floppy_interrupt(irq, dev_id);
60
61
62 st = 1;
63 for (lcount=virtual_dma_count, lptr=virtual_dma_addr;
64 lcount; lcount--, lptr++) {
65 st=inb(virtual_dma_port+4) & 0xa0 ;
66 if (st != 0xa0)
67 break;
68 if (virtual_dma_mode)
69 outb_p(*lptr, virtual_dma_port+5);
70 else
71 *lptr = inb_p(virtual_dma_port+5);
72 }
73 virtual_dma_count = lcount;
74 virtual_dma_addr = lptr;
75 st = inb(virtual_dma_port+4);
76
77 if (st == 0x20)
78 return IRQ_HANDLED;
79 if (!(st & 0x20)) {
80 virtual_dma_residue += virtual_dma_count;
81 virtual_dma_count=0;
82 doing_vdma = 0;
83 floppy_interrupt(irq, dev_id);
84 return IRQ_HANDLED;
85 }
86 return IRQ_HANDLED;
87}
39 88
40static __inline__ int powerpc_fd_dma_setup(char *addr, unsigned long size, 89static void vdma_disable_dma(unsigned int dummy)
41 int mode, int io) 90{
91 doing_vdma = 0;
92 virtual_dma_residue += virtual_dma_count;
93 virtual_dma_count=0;
94}
95
96static void vdma_nop(unsigned int dummy)
97{
98}
99
100
101static int vdma_get_dma_residue(unsigned int dummy)
102{
103 return virtual_dma_count + virtual_dma_residue;
104}
105
106
107static int fd_request_irq(void)
108{
109 if (can_use_virtual_dma)
110 return request_irq(FLOPPY_IRQ, floppy_hardint,
111 IRQF_DISABLED, "floppy", NULL);
112 else
113 return request_irq(FLOPPY_IRQ, floppy_interrupt,
114 IRQF_DISABLED, "floppy", NULL);
115}
116
117static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
118{
119 doing_vdma = 1;
120 virtual_dma_port = io;
121 virtual_dma_mode = (mode == DMA_MODE_WRITE);
122 virtual_dma_addr = addr;
123 virtual_dma_count = size;
124 virtual_dma_residue = 0;
125 return 0;
126}
127
128static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
42{ 129{
43 static unsigned long prev_size; 130 static unsigned long prev_size;
44 static dma_addr_t bus_addr = 0; 131 static dma_addr_t bus_addr = 0;
@@ -46,6 +133,7 @@ static __inline__ int powerpc_fd_dma_setup(char *addr, unsigned long size,
46 static int prev_dir; 133 static int prev_dir;
47 int dir; 134 int dir;
48 135
136 doing_vdma = 0;
49 dir = (mode == DMA_MODE_READ) ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE; 137 dir = (mode == DMA_MODE_READ) ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE;
50 138
51 if (bus_addr 139 if (bus_addr
@@ -74,11 +162,32 @@ static __inline__ int powerpc_fd_dma_setup(char *addr, unsigned long size,
74 return 0; 162 return 0;
75} 163}
76 164
77#endif /* CONFIG_PCI */ 165static struct fd_dma_ops real_dma_ops =
166{
167 ._disable_dma = disable_dma,
168 ._free_dma = free_dma,
169 ._get_dma_residue = get_dma_residue,
170 ._dma_setup = hard_dma_setup
171};
172
173static struct fd_dma_ops virt_dma_ops =
174{
175 ._disable_dma = vdma_disable_dma,
176 ._free_dma = vdma_nop,
177 ._get_dma_residue = vdma_get_dma_residue,
178 ._dma_setup = vdma_dma_setup
179};
78 180
79__inline__ void virtual_dma_init(void) 181static int fd_request_dma(void)
80{ 182{
81 /* Nothing to do on PowerPC */ 183 if (can_use_virtual_dma & 1) {
184 fd_ops = &virt_dma_ops;
185 return 0;
186 }
187 else {
188 fd_ops = &real_dma_ops;
189 return request_dma(FLOPPY_DMA, "floppy");
190 }
82} 191}
83 192
84static int FDC1 = 0x3f0; 193static int FDC1 = 0x3f0;
diff --git a/include/asm-powerpc/fs_pd.h b/include/asm-powerpc/fs_pd.h
index 3d0e819d37f1..c624915b757e 100644
--- a/include/asm-powerpc/fs_pd.h
+++ b/include/asm-powerpc/fs_pd.h
@@ -11,19 +11,17 @@
11 11
12#ifndef FS_PD_H 12#ifndef FS_PD_H
13#define FS_PD_H 13#define FS_PD_H
14#include <asm/cpm2.h>
15#include <sysdev/fsl_soc.h> 14#include <sysdev/fsl_soc.h>
16#include <asm/time.h> 15#include <asm/time.h>
17 16
18static inline int uart_baudrate(void) 17#ifdef CONFIG_CPM2
19{ 18#include <asm/cpm2.h>
20 return get_baudrate();
21}
22 19
23static inline int uart_clock(void) 20#if defined(CONFIG_8260)
24{ 21#include <asm/mpc8260.h>
25 return ppc_proc_freq; 22#elif defined(CONFIG_85xx)
26} 23#include <asm/mpc85xx.h>
24#endif
27 25
28#define cpm2_map(member) \ 26#define cpm2_map(member) \
29({ \ 27({ \
@@ -41,5 +39,38 @@ static inline int uart_clock(void)
41}) 39})
42 40
43#define cpm2_unmap(addr) iounmap(addr) 41#define cpm2_unmap(addr) iounmap(addr)
42#endif
43
44#ifdef CONFIG_8xx
45#include <asm/8xx_immap.h>
46#include <asm/mpc8xx.h>
47
48#define immr_map(member) \
49({ \
50 u32 offset = offsetof(immap_t, member); \
51 void *addr = ioremap (IMAP_ADDR + offset, \
52 sizeof( ((immap_t*)0)->member)); \
53 addr; \
54})
55
56#define immr_map_size(member, size) \
57({ \
58 u32 offset = offsetof(immap_t, member); \
59 void *addr = ioremap (IMAP_ADDR + offset, size); \
60 addr; \
61})
62
63#define immr_unmap(addr) iounmap(addr)
64#endif
65
66static inline int uart_baudrate(void)
67{
68 return get_baudrate();
69}
70
71static inline int uart_clock(void)
72{
73 return ppc_proc_freq;
74}
44 75
45#endif 76#endif
diff --git a/include/asm-powerpc/hvcall.h b/include/asm-powerpc/hvcall.h
index 7a500732b671..62efd9d7a43d 100644
--- a/include/asm-powerpc/hvcall.h
+++ b/include/asm-powerpc/hvcall.h
@@ -168,6 +168,7 @@
168#define H_FREE_LOGICAL_LAN 0x118 168#define H_FREE_LOGICAL_LAN 0x118
169#define H_ADD_LOGICAL_LAN_BUFFER 0x11C 169#define H_ADD_LOGICAL_LAN_BUFFER 0x11C
170#define H_SEND_LOGICAL_LAN 0x120 170#define H_SEND_LOGICAL_LAN 0x120
171#define H_BULK_REMOVE 0x124
171#define H_MULTICAST_CTRL 0x130 172#define H_MULTICAST_CTRL 0x130
172#define H_SET_XDABR 0x134 173#define H_SET_XDABR 0x134
173#define H_STUFF_TCE 0x138 174#define H_STUFF_TCE 0x138
@@ -236,6 +237,20 @@ long plpar_hcall_norets(unsigned long opcode, ...);
236long plpar_hcall(unsigned long opcode, unsigned long *retbuf, ...); 237long plpar_hcall(unsigned long opcode, unsigned long *retbuf, ...);
237 238
238/** 239/**
240 * plpar_hcall_raw: - Make a hypervisor call without calculating hcall stats
241 * @opcode: The hypervisor call to make.
242 * @retbuf: Buffer to store up to 4 return arguments in.
243 *
244 * This call supports up to 6 arguments and 4 return arguments. Use
245 * PLPAR_HCALL_BUFSIZE to size the return argument buffer.
246 *
247 * Used when phyp interface needs to be called in real mode. Similar to
248 * plpar_hcall, but plpar_hcall_raw works in real mode and does not
249 * calculate hypervisor call statistics.
250 */
251long plpar_hcall_raw(unsigned long opcode, unsigned long *retbuf, ...);
252
253/**
239 * plpar_hcall9: - Make a pseries hypervisor call with up to 9 return arguments 254 * plpar_hcall9: - Make a pseries hypervisor call with up to 9 return arguments
240 * @opcode: The hypervisor call to make. 255 * @opcode: The hypervisor call to make.
241 * @retbuf: Buffer to store up to 9 return arguments in. 256 * @retbuf: Buffer to store up to 9 return arguments in.
diff --git a/include/asm-powerpc/ibmebus.h b/include/asm-powerpc/ibmebus.h
index 66112114b8c5..87d396e28db2 100644
--- a/include/asm-powerpc/ibmebus.h
+++ b/include/asm-powerpc/ibmebus.h
@@ -2,36 +2,37 @@
2 * IBM PowerPC eBus Infrastructure Support. 2 * IBM PowerPC eBus Infrastructure Support.
3 * 3 *
4 * Copyright (c) 2005 IBM Corporation 4 * Copyright (c) 2005 IBM Corporation
5 * Joachim Fenkes <fenkes@de.ibm.com>
5 * Heiko J Schick <schickhj@de.ibm.com> 6 * Heiko J Schick <schickhj@de.ibm.com>
6 * 7 *
7 * All rights reserved. 8 * All rights reserved.
8 * 9 *
9 * This source code is distributed under a dual license of GPL v2.0 and OpenIB 10 * This source code is distributed under a dual license of GPL v2.0 and OpenIB
10 * BSD. 11 * BSD.
11 * 12 *
12 * OpenIB BSD License 13 * OpenIB BSD License
13 * 14 *
14 * Redistribution and use in source and binary forms, with or without 15 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are met: 16 * modification, are permitted provided that the following conditions are met:
16 * 17 *
17 * Redistributions of source code must retain the above copyright notice, this 18 * Redistributions of source code must retain the above copyright notice, this
18 * list of conditions and the following disclaimer. 19 * list of conditions and the following disclaimer.
19 * 20 *
20 * Redistributions in binary form must reproduce the above copyright notice, 21 * Redistributions in binary form must reproduce the above copyright notice,
21 * this list of conditions and the following disclaimer in the documentation 22 * this list of conditions and the following disclaimer in the documentation
22 * and/or other materials 23 * and/or other materials
23 * provided with the distribution. 24 * provided with the distribution.
24 * 25 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
32 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 33 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
33 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE. 36 * POSSIBILITY OF SUCH DAMAGE.
36 */ 37 */
37 38
@@ -46,12 +47,11 @@
46 47
47extern struct bus_type ibmebus_bus_type; 48extern struct bus_type ibmebus_bus_type;
48 49
49struct ibmebus_dev { 50struct ibmebus_dev {
50 const char *name;
51 struct of_device ofdev; 51 struct of_device ofdev;
52}; 52};
53 53
54struct ibmebus_driver { 54struct ibmebus_driver {
55 char *name; 55 char *name;
56 struct of_device_id *id_table; 56 struct of_device_id *id_table;
57 int (*probe) (struct ibmebus_dev *dev, const struct of_device_id *id); 57 int (*probe) (struct ibmebus_dev *dev, const struct of_device_id *id);
@@ -63,7 +63,7 @@ int ibmebus_register_driver(struct ibmebus_driver *drv);
63void ibmebus_unregister_driver(struct ibmebus_driver *drv); 63void ibmebus_unregister_driver(struct ibmebus_driver *drv);
64 64
65int ibmebus_request_irq(struct ibmebus_dev *dev, 65int ibmebus_request_irq(struct ibmebus_dev *dev,
66 u32 ist, 66 u32 ist,
67 irq_handler_t handler, 67 irq_handler_t handler,
68 unsigned long irq_flags, const char * devname, 68 unsigned long irq_flags, const char * devname,
69 void *dev_id); 69 void *dev_id);
diff --git a/include/asm-powerpc/immap_86xx.h b/include/asm-powerpc/immap_86xx.h
index d905b6622268..59b9e07b8e99 100644
--- a/include/asm-powerpc/immap_86xx.h
+++ b/include/asm-powerpc/immap_86xx.h
@@ -85,81 +85,6 @@ typedef struct ccsr_pci {
85 char res19[472]; 85 char res19[472];
86} ccsr_pci_t; 86} ccsr_pci_t;
87 87
88/* PCI Express Registers */
89typedef struct ccsr_pex {
90 uint pex_config_addr; /* 0x.000 - PCI Express Configuration Address Register */
91 uint pex_config_data; /* 0x.004 - PCI Express Configuration Data Register */
92 char res1[4];
93 uint pex_otb_cpl_tor; /* 0x.00c - PCI Express Outbound completion timeout register */
94 uint pex_conf_tor; /* 0x.010 - PCI Express configuration timeout register */
95 char res2[12];
96 uint pex_pme_mes_dr; /* 0x.020 - PCI Express PME and message detect register */
97 uint pex_pme_mes_disr; /* 0x.024 - PCI Express PME and message disable register */
98 uint pex_pme_mes_ier; /* 0x.028 - PCI Express PME and message interrupt enable register */
99 uint pex_pmcr; /* 0x.02c - PCI Express power management command register */
100 char res3[3024];
101 uint pexotar0; /* 0x.c00 - PCI Express outbound translation address register 0 */
102 uint pexotear0; /* 0x.c04 - PCI Express outbound translation extended address register 0*/
103 char res4[8];
104 uint pexowar0; /* 0x.c10 - PCI Express outbound window attributes register 0*/
105 char res5[12];
106 uint pexotar1; /* 0x.c20 - PCI Express outbound translation address register 1 */
107 uint pexotear1; /* 0x.c24 - PCI Express outbound translation extended address register 1*/
108 uint pexowbar1; /* 0x.c28 - PCI Express outbound window base address register 1*/
109 char res6[4];
110 uint pexowar1; /* 0x.c30 - PCI Express outbound window attributes register 1*/
111 char res7[12];
112 uint pexotar2; /* 0x.c40 - PCI Express outbound translation address register 2 */
113 uint pexotear2; /* 0x.c44 - PCI Express outbound translation extended address register 2*/
114 uint pexowbar2; /* 0x.c48 - PCI Express outbound window base address register 2*/
115 char res8[4];
116 uint pexowar2; /* 0x.c50 - PCI Express outbound window attributes register 2*/
117 char res9[12];
118 uint pexotar3; /* 0x.c60 - PCI Express outbound translation address register 3 */
119 uint pexotear3; /* 0x.c64 - PCI Express outbound translation extended address register 3*/
120 uint pexowbar3; /* 0x.c68 - PCI Express outbound window base address register 3*/
121 char res10[4];
122 uint pexowar3; /* 0x.c70 - PCI Express outbound window attributes register 3*/
123 char res11[12];
124 uint pexotar4; /* 0x.c80 - PCI Express outbound translation address register 4 */
125 uint pexotear4; /* 0x.c84 - PCI Express outbound translation extended address register 4*/
126 uint pexowbar4; /* 0x.c88 - PCI Express outbound window base address register 4*/
127 char res12[4];
128 uint pexowar4; /* 0x.c90 - PCI Express outbound window attributes register 4*/
129 char res13[12];
130 char res14[256];
131 uint pexitar3; /* 0x.da0 - PCI Express inbound translation address register 3 */
132 char res15[4];
133 uint pexiwbar3; /* 0x.da8 - PCI Express inbound window base address register 3 */
134 uint pexiwbear3; /* 0x.dac - PCI Express inbound window base extended address register 3 */
135 uint pexiwar3; /* 0x.db0 - PCI Express inbound window attributes register 3 */
136 char res16[12];
137 uint pexitar2; /* 0x.dc0 - PCI Express inbound translation address register 2 */
138 char res17[4];
139 uint pexiwbar2; /* 0x.dc8 - PCI Express inbound window base address register 2 */
140 uint pexiwbear2; /* 0x.dcc - PCI Express inbound window base extended address register 2 */
141 uint pexiwar2; /* 0x.dd0 - PCI Express inbound window attributes register 2 */
142 char res18[12];
143 uint pexitar1; /* 0x.de0 - PCI Express inbound translation address register 2 */
144 char res19[4];
145 uint pexiwbar1; /* 0x.de8 - PCI Express inbound window base address register 2 */
146 uint pexiwbear1; /* 0x.dec - PCI Express inbound window base extended address register 2 */
147 uint pexiwar1; /* 0x.df0 - PCI Express inbound window attributes register 2 */
148 char res20[12];
149 uint pex_err_dr; /* 0x.e00 - PCI Express error detect register */
150 char res21[4];
151 uint pex_err_en; /* 0x.e08 - PCI Express error interrupt enable register */
152 char res22[4];
153 uint pex_err_disr; /* 0x.e10 - PCI Express error disable register */
154 char res23[12];
155 uint pex_err_cap_stat; /* 0x.e20 - PCI Express error capture status register */
156 char res24[4];
157 uint pex_err_cap_r0; /* 0x.e28 - PCI Express error capture register 0 */
158 uint pex_err_cap_r1; /* 0x.e2c - PCI Express error capture register 0 */
159 uint pex_err_cap_r2; /* 0x.e30 - PCI Express error capture register 0 */
160 uint pex_err_cap_r3; /* 0x.e34 - PCI Express error capture register 0 */
161} ccsr_pex_t;
162
163/* Global Utility Registers */ 88/* Global Utility Registers */
164typedef struct ccsr_guts { 89typedef struct ccsr_guts {
165 uint porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */ 90 uint porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */
diff --git a/include/asm-powerpc/immap_qe.h b/include/asm-powerpc/immap_qe.h
index 9fdd0491f6a3..1020b7fc0129 100644
--- a/include/asm-powerpc/immap_qe.h
+++ b/include/asm-powerpc/immap_qe.h
@@ -258,8 +258,9 @@ struct ucc_slow {
258 u8 uccs; /* UCCx status register */ 258 u8 uccs; /* UCCx status register */
259 u8 res3[0x24]; 259 u8 res3[0x24];
260 __be16 utpt; 260 __be16 utpt;
261 u8 res4[0x52];
261 u8 guemr; /* UCC general extended mode register */ 262 u8 guemr; /* UCC general extended mode register */
262 u8 res4[0x200 - 0x091]; 263 u8 res5[0x200 - 0x091];
263} __attribute__ ((packed)); 264} __attribute__ ((packed));
264 265
265/* QE UCC Fast */ 266/* QE UCC Fast */
diff --git a/include/asm-powerpc/io.h b/include/asm-powerpc/io.h
index 1cd532379c30..350c9bdb31dc 100644
--- a/include/asm-powerpc/io.h
+++ b/include/asm-powerpc/io.h
@@ -11,7 +11,12 @@
11 11
12/* Check of existence of legacy devices */ 12/* Check of existence of legacy devices */
13extern int check_legacy_ioport(unsigned long base_port); 13extern int check_legacy_ioport(unsigned long base_port);
14#define PNPBIOS_BASE 0xf000 /* only relevant for PReP */ 14#define I8042_DATA_REG 0x60
15#define FDC_BASE 0x3f0
16/* only relevant for PReP */
17#define _PIDXR 0x279
18#define _PNPWRP 0xa79
19#define PNPBIOS_BASE 0xf000
15 20
16#include <linux/compiler.h> 21#include <linux/compiler.h>
17#include <asm/page.h> 22#include <asm/page.h>
@@ -732,6 +737,12 @@ static inline void * bus_to_virt(unsigned long address)
732 737
733#endif /* CONFIG_PPC32 */ 738#endif /* CONFIG_PPC32 */
734 739
740/* access ports */
741#define setbits32(_addr, _v) out_be32((_addr), in_be32(_addr) | (_v))
742#define clrbits32(_addr, _v) out_be32((_addr), in_be32(_addr) & ~(_v))
743
744#define setbits16(_addr, _v) out_be16((_addr), in_be16(_addr) | (_v))
745#define clrbits16(_addr, _v) out_be16((_addr), in_be16(_addr) & ~(_v))
735 746
736#endif /* __KERNEL__ */ 747#endif /* __KERNEL__ */
737 748
diff --git a/include/asm-powerpc/iommu.h b/include/asm-powerpc/iommu.h
index f85dbd305558..b2e56b30306a 100644
--- a/include/asm-powerpc/iommu.h
+++ b/include/asm-powerpc/iommu.h
@@ -99,6 +99,7 @@ extern void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle,
99extern void iommu_init_early_pSeries(void); 99extern void iommu_init_early_pSeries(void);
100extern void iommu_init_early_iSeries(void); 100extern void iommu_init_early_iSeries(void);
101extern void iommu_init_early_dart(void); 101extern void iommu_init_early_dart(void);
102extern void iommu_init_early_pasemi(void);
102 103
103#ifdef CONFIG_PCI 104#ifdef CONFIG_PCI
104extern void pci_iommu_init(void); 105extern void pci_iommu_init(void);
diff --git a/include/asm-powerpc/ipic.h b/include/asm-powerpc/ipic.h
index 9fbb03415860..edec79dcb7c1 100644
--- a/include/asm-powerpc/ipic.h
+++ b/include/asm-powerpc/ipic.h
@@ -78,7 +78,7 @@ extern u32 ipic_get_mcp_status(void);
78extern void ipic_clear_mcp_status(u32 mask); 78extern void ipic_clear_mcp_status(u32 mask);
79 79
80#ifdef CONFIG_PPC_MERGE 80#ifdef CONFIG_PPC_MERGE
81extern void ipic_init(struct device_node *node, unsigned int flags); 81extern struct ipic * ipic_init(struct device_node *node, unsigned int flags);
82extern unsigned int ipic_get_irq(void); 82extern unsigned int ipic_get_irq(void);
83#else 83#else
84extern void ipic_init(phys_addr_t phys_addr, unsigned int flags, 84extern void ipic_init(phys_addr_t phys_addr, unsigned int flags,
diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h
index 46476e9a494a..4734cc178db5 100644
--- a/include/asm-powerpc/irq.h
+++ b/include/asm-powerpc/irq.h
@@ -89,6 +89,9 @@ struct irq_host_ops {
89 /* Dispose of such a mapping */ 89 /* Dispose of such a mapping */
90 void (*unmap)(struct irq_host *h, unsigned int virq); 90 void (*unmap)(struct irq_host *h, unsigned int virq);
91 91
92 /* Update of such a mapping */
93 void (*remap)(struct irq_host *h, unsigned int virq, irq_hw_number_t hw);
94
92 /* Translate device-tree interrupt specifier from raw format coming 95 /* Translate device-tree interrupt specifier from raw format coming
93 * from the firmware to a irq_hw_number_t (interrupt line number) and 96 * from the firmware to a irq_hw_number_t (interrupt line number) and
94 * type (sense) that can be passed to set_irq_type(). In the absence 97 * type (sense) that can be passed to set_irq_type(). In the absence
diff --git a/include/asm-powerpc/kprobes.h b/include/asm-powerpc/kprobes.h
index 2dafa376a63f..f850ca7020ed 100644
--- a/include/asm-powerpc/kprobes.h
+++ b/include/asm-powerpc/kprobes.h
@@ -44,6 +44,7 @@ typedef unsigned int kprobe_opcode_t;
44#define IS_TDI(instr) (((instr) & 0xfc000000) == 0x08000000) 44#define IS_TDI(instr) (((instr) & 0xfc000000) == 0x08000000)
45#define IS_TWI(instr) (((instr) & 0xfc000000) == 0x0c000000) 45#define IS_TWI(instr) (((instr) & 0xfc000000) == 0x0c000000)
46 46
47#ifdef CONFIG_PPC64
47/* 48/*
48 * 64bit powerpc uses function descriptors. 49 * 64bit powerpc uses function descriptors.
49 * Handle cases where: 50 * Handle cases where:
@@ -67,9 +68,13 @@ typedef unsigned int kprobe_opcode_t;
67} 68}
68 69
69#define JPROBE_ENTRY(pentry) (kprobe_opcode_t *)((func_descr_t *)pentry) 70#define JPROBE_ENTRY(pentry) (kprobe_opcode_t *)((func_descr_t *)pentry)
70
71#define is_trap(instr) (IS_TW(instr) || IS_TD(instr) || \ 71#define is_trap(instr) (IS_TW(instr) || IS_TD(instr) || \
72 IS_TWI(instr) || IS_TDI(instr)) 72 IS_TWI(instr) || IS_TDI(instr))
73#else
74/* Use stock kprobe_lookup_name since ppc32 doesn't use function descriptors */
75#define JPROBE_ENTRY(pentry) (kprobe_opcode_t *)(pentry)
76#define is_trap(instr) (IS_TW(instr) || IS_TWI(instr))
77#endif
73 78
74#define ARCH_SUPPORTS_KRETPROBES 79#define ARCH_SUPPORTS_KRETPROBES
75#define ARCH_INACTIVE_KPROBE_COUNT 1 80#define ARCH_INACTIVE_KPROBE_COUNT 1
@@ -82,6 +87,11 @@ extern void arch_remove_kprobe(struct kprobe *p);
82struct arch_specific_insn { 87struct arch_specific_insn {
83 /* copy of original instruction */ 88 /* copy of original instruction */
84 kprobe_opcode_t *insn; 89 kprobe_opcode_t *insn;
90 /*
91 * Set in kprobes code, initially to 0. If the instruction can be
92 * eumulated, this is set to 1, if not, to -1.
93 */
94 int boostable;
85}; 95};
86 96
87struct prev_kprobe { 97struct prev_kprobe {
diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h
index 1b04e5723548..b204926ce913 100644
--- a/include/asm-powerpc/machdep.h
+++ b/include/asm-powerpc/machdep.h
@@ -153,9 +153,6 @@ struct machdep_calls {
153 */ 153 */
154 long (*feature_call)(unsigned int feature, ...); 154 long (*feature_call)(unsigned int feature, ...);
155 155
156 /* Check availability of legacy devices like i8042 */
157 int (*check_legacy_ioport)(unsigned int baseport);
158
159 /* Get legacy PCI/IDE interrupt mapping */ 156 /* Get legacy PCI/IDE interrupt mapping */
160 int (*pci_get_legacy_ide_irq)(struct pci_dev *dev, int channel); 157 int (*pci_get_legacy_ide_irq)(struct pci_dev *dev, int channel);
161 158
diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h
new file mode 100644
index 000000000000..6739457d8bc0
--- /dev/null
+++ b/include/asm-powerpc/mmu-hash64.h
@@ -0,0 +1,400 @@
1#ifndef _ASM_POWERPC_MMU_HASH64_H_
2#define _ASM_POWERPC_MMU_HASH64_H_
3/*
4 * PowerPC64 memory management structures
5 *
6 * Dave Engebretsen & Mike Corrigan <{engebret|mikejc}@us.ibm.com>
7 * PPC64 rework.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#include <asm/asm-compat.h>
16#include <asm/page.h>
17
18/*
19 * Segment table
20 */
21
22#define STE_ESID_V 0x80
23#define STE_ESID_KS 0x20
24#define STE_ESID_KP 0x10
25#define STE_ESID_N 0x08
26
27#define STE_VSID_SHIFT 12
28
29/* Location of cpu0's segment table */
30#define STAB0_PAGE 0x6
31#define STAB0_OFFSET (STAB0_PAGE << 12)
32#define STAB0_PHYS_ADDR (STAB0_OFFSET + PHYSICAL_START)
33
34#ifndef __ASSEMBLY__
35extern char initial_stab[];
36#endif /* ! __ASSEMBLY */
37
38/*
39 * SLB
40 */
41
42#define SLB_NUM_BOLTED 3
43#define SLB_CACHE_ENTRIES 8
44
45/* Bits in the SLB ESID word */
46#define SLB_ESID_V ASM_CONST(0x0000000008000000) /* valid */
47
48/* Bits in the SLB VSID word */
49#define SLB_VSID_SHIFT 12
50#define SLB_VSID_B ASM_CONST(0xc000000000000000)
51#define SLB_VSID_B_256M ASM_CONST(0x0000000000000000)
52#define SLB_VSID_B_1T ASM_CONST(0x4000000000000000)
53#define SLB_VSID_KS ASM_CONST(0x0000000000000800)
54#define SLB_VSID_KP ASM_CONST(0x0000000000000400)
55#define SLB_VSID_N ASM_CONST(0x0000000000000200) /* no-execute */
56#define SLB_VSID_L ASM_CONST(0x0000000000000100)
57#define SLB_VSID_C ASM_CONST(0x0000000000000080) /* class */
58#define SLB_VSID_LP ASM_CONST(0x0000000000000030)
59#define SLB_VSID_LP_00 ASM_CONST(0x0000000000000000)
60#define SLB_VSID_LP_01 ASM_CONST(0x0000000000000010)
61#define SLB_VSID_LP_10 ASM_CONST(0x0000000000000020)
62#define SLB_VSID_LP_11 ASM_CONST(0x0000000000000030)
63#define SLB_VSID_LLP (SLB_VSID_L|SLB_VSID_LP)
64
65#define SLB_VSID_KERNEL (SLB_VSID_KP)
66#define SLB_VSID_USER (SLB_VSID_KP|SLB_VSID_KS|SLB_VSID_C)
67
68#define SLBIE_C (0x08000000)
69
70/*
71 * Hash table
72 */
73
74#define HPTES_PER_GROUP 8
75
76#define HPTE_V_AVPN_SHIFT 7
77#define HPTE_V_AVPN ASM_CONST(0xffffffffffffff80)
78#define HPTE_V_AVPN_VAL(x) (((x) & HPTE_V_AVPN) >> HPTE_V_AVPN_SHIFT)
79#define HPTE_V_COMPARE(x,y) (!(((x) ^ (y)) & HPTE_V_AVPN))
80#define HPTE_V_BOLTED ASM_CONST(0x0000000000000010)
81#define HPTE_V_LOCK ASM_CONST(0x0000000000000008)
82#define HPTE_V_LARGE ASM_CONST(0x0000000000000004)
83#define HPTE_V_SECONDARY ASM_CONST(0x0000000000000002)
84#define HPTE_V_VALID ASM_CONST(0x0000000000000001)
85
86#define HPTE_R_PP0 ASM_CONST(0x8000000000000000)
87#define HPTE_R_TS ASM_CONST(0x4000000000000000)
88#define HPTE_R_RPN_SHIFT 12
89#define HPTE_R_RPN ASM_CONST(0x3ffffffffffff000)
90#define HPTE_R_FLAGS ASM_CONST(0x00000000000003ff)
91#define HPTE_R_PP ASM_CONST(0x0000000000000003)
92#define HPTE_R_N ASM_CONST(0x0000000000000004)
93#define HPTE_R_C ASM_CONST(0x0000000000000080)
94#define HPTE_R_R ASM_CONST(0x0000000000000100)
95
96/* Values for PP (assumes Ks=0, Kp=1) */
97/* pp0 will always be 0 for linux */
98#define PP_RWXX 0 /* Supervisor read/write, User none */
99#define PP_RWRX 1 /* Supervisor read/write, User read */
100#define PP_RWRW 2 /* Supervisor read/write, User read/write */
101#define PP_RXRX 3 /* Supervisor read, User read */
102
103#ifndef __ASSEMBLY__
104
105typedef struct {
106 unsigned long v;
107 unsigned long r;
108} hpte_t;
109
110extern hpte_t *htab_address;
111extern unsigned long htab_size_bytes;
112extern unsigned long htab_hash_mask;
113
114/*
115 * Page size definition
116 *
117 * shift : is the "PAGE_SHIFT" value for that page size
118 * sllp : is a bit mask with the value of SLB L || LP to be or'ed
119 * directly to a slbmte "vsid" value
120 * penc : is the HPTE encoding mask for the "LP" field:
121 *
122 */
123struct mmu_psize_def
124{
125 unsigned int shift; /* number of bits */
126 unsigned int penc; /* HPTE encoding */
127 unsigned int tlbiel; /* tlbiel supported for that page size */
128 unsigned long avpnm; /* bits to mask out in AVPN in the HPTE */
129 unsigned long sllp; /* SLB L||LP (exact mask to use in slbmte) */
130};
131
132#endif /* __ASSEMBLY__ */
133
134/*
135 * The kernel use the constants below to index in the page sizes array.
136 * The use of fixed constants for this purpose is better for performances
137 * of the low level hash refill handlers.
138 *
139 * A non supported page size has a "shift" field set to 0
140 *
141 * Any new page size being implemented can get a new entry in here. Whether
142 * the kernel will use it or not is a different matter though. The actual page
143 * size used by hugetlbfs is not defined here and may be made variable
144 */
145
146#define MMU_PAGE_4K 0 /* 4K */
147#define MMU_PAGE_64K 1 /* 64K */
148#define MMU_PAGE_64K_AP 2 /* 64K Admixed (in a 4K segment) */
149#define MMU_PAGE_1M 3 /* 1M */
150#define MMU_PAGE_16M 4 /* 16M */
151#define MMU_PAGE_16G 5 /* 16G */
152#define MMU_PAGE_COUNT 6
153
154#ifndef __ASSEMBLY__
155
156/*
157 * The current system page sizes
158 */
159extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
160extern int mmu_linear_psize;
161extern int mmu_virtual_psize;
162extern int mmu_vmalloc_psize;
163extern int mmu_io_psize;
164
165/*
166 * If the processor supports 64k normal pages but not 64k cache
167 * inhibited pages, we have to be prepared to switch processes
168 * to use 4k pages when they create cache-inhibited mappings.
169 * If this is the case, mmu_ci_restrictions will be set to 1.
170 */
171extern int mmu_ci_restrictions;
172
173#ifdef CONFIG_HUGETLB_PAGE
174/*
175 * The page size index of the huge pages for use by hugetlbfs
176 */
177extern int mmu_huge_psize;
178
179#endif /* CONFIG_HUGETLB_PAGE */
180
181/*
182 * This function sets the AVPN and L fields of the HPTE appropriately
183 * for the page size
184 */
185static inline unsigned long hpte_encode_v(unsigned long va, int psize)
186{
187 unsigned long v =
188 v = (va >> 23) & ~(mmu_psize_defs[psize].avpnm);
189 v <<= HPTE_V_AVPN_SHIFT;
190 if (psize != MMU_PAGE_4K)
191 v |= HPTE_V_LARGE;
192 return v;
193}
194
195/*
196 * This function sets the ARPN, and LP fields of the HPTE appropriately
197 * for the page size. We assume the pa is already "clean" that is properly
198 * aligned for the requested page size
199 */
200static inline unsigned long hpte_encode_r(unsigned long pa, int psize)
201{
202 unsigned long r;
203
204 /* A 4K page needs no special encoding */
205 if (psize == MMU_PAGE_4K)
206 return pa & HPTE_R_RPN;
207 else {
208 unsigned int penc = mmu_psize_defs[psize].penc;
209 unsigned int shift = mmu_psize_defs[psize].shift;
210 return (pa & ~((1ul << shift) - 1)) | (penc << 12);
211 }
212 return r;
213}
214
215/*
216 * This hashes a virtual address for a 256Mb segment only for now
217 */
218
219static inline unsigned long hpt_hash(unsigned long va, unsigned int shift)
220{
221 return ((va >> 28) & 0x7fffffffffUL) ^ ((va & 0x0fffffffUL) >> shift);
222}
223
224extern int __hash_page_4K(unsigned long ea, unsigned long access,
225 unsigned long vsid, pte_t *ptep, unsigned long trap,
226 unsigned int local);
227extern int __hash_page_64K(unsigned long ea, unsigned long access,
228 unsigned long vsid, pte_t *ptep, unsigned long trap,
229 unsigned int local);
230struct mm_struct;
231extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap);
232extern int hash_huge_page(struct mm_struct *mm, unsigned long access,
233 unsigned long ea, unsigned long vsid, int local,
234 unsigned long trap);
235
236extern int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
237 unsigned long pstart, unsigned long mode,
238 int psize);
239
240extern void htab_initialize(void);
241extern void htab_initialize_secondary(void);
242extern void hpte_init_native(void);
243extern void hpte_init_lpar(void);
244extern void hpte_init_iSeries(void);
245extern void hpte_init_beat(void);
246
247extern void stabs_alloc(void);
248extern void slb_initialize(void);
249extern void slb_flush_and_rebolt(void);
250extern void stab_initialize(unsigned long stab);
251
252#endif /* __ASSEMBLY__ */
253
254/*
255 * VSID allocation
256 *
257 * We first generate a 36-bit "proto-VSID". For kernel addresses this
258 * is equal to the ESID, for user addresses it is:
259 * (context << 15) | (esid & 0x7fff)
260 *
261 * The two forms are distinguishable because the top bit is 0 for user
262 * addresses, whereas the top two bits are 1 for kernel addresses.
263 * Proto-VSIDs with the top two bits equal to 0b10 are reserved for
264 * now.
265 *
266 * The proto-VSIDs are then scrambled into real VSIDs with the
267 * multiplicative hash:
268 *
269 * VSID = (proto-VSID * VSID_MULTIPLIER) % VSID_MODULUS
270 * where VSID_MULTIPLIER = 268435399 = 0xFFFFFC7
271 * VSID_MODULUS = 2^36-1 = 0xFFFFFFFFF
272 *
273 * This scramble is only well defined for proto-VSIDs below
274 * 0xFFFFFFFFF, so both proto-VSID and actual VSID 0xFFFFFFFFF are
275 * reserved. VSID_MULTIPLIER is prime, so in particular it is
276 * co-prime to VSID_MODULUS, making this a 1:1 scrambling function.
277 * Because the modulus is 2^n-1 we can compute it efficiently without
278 * a divide or extra multiply (see below).
279 *
280 * This scheme has several advantages over older methods:
281 *
282 * - We have VSIDs allocated for every kernel address
283 * (i.e. everything above 0xC000000000000000), except the very top
284 * segment, which simplifies several things.
285 *
286 * - We allow for 15 significant bits of ESID and 20 bits of
287 * context for user addresses. i.e. 8T (43 bits) of address space for
288 * up to 1M contexts (although the page table structure and context
289 * allocation will need changes to take advantage of this).
290 *
291 * - The scramble function gives robust scattering in the hash
292 * table (at least based on some initial results). The previous
293 * method was more susceptible to pathological cases giving excessive
294 * hash collisions.
295 */
296/*
297 * WARNING - If you change these you must make sure the asm
298 * implementations in slb_allocate (slb_low.S), do_stab_bolted
299 * (head.S) and ASM_VSID_SCRAMBLE (below) are changed accordingly.
300 *
301 * You'll also need to change the precomputed VSID values in head.S
302 * which are used by the iSeries firmware.
303 */
304
305#define VSID_MULTIPLIER ASM_CONST(200730139) /* 28-bit prime */
306#define VSID_BITS 36
307#define VSID_MODULUS ((1UL<<VSID_BITS)-1)
308
309#define CONTEXT_BITS 19
310#define USER_ESID_BITS 16
311
312#define USER_VSID_RANGE (1UL << (USER_ESID_BITS + SID_SHIFT))
313
314/*
315 * This macro generates asm code to compute the VSID scramble
316 * function. Used in slb_allocate() and do_stab_bolted. The function
317 * computed is: (protovsid*VSID_MULTIPLIER) % VSID_MODULUS
318 *
319 * rt = register continaing the proto-VSID and into which the
320 * VSID will be stored
321 * rx = scratch register (clobbered)
322 *
323 * - rt and rx must be different registers
324 * - The answer will end up in the low 36 bits of rt. The higher
325 * bits may contain other garbage, so you may need to mask the
326 * result.
327 */
328#define ASM_VSID_SCRAMBLE(rt, rx) \
329 lis rx,VSID_MULTIPLIER@h; \
330 ori rx,rx,VSID_MULTIPLIER@l; \
331 mulld rt,rt,rx; /* rt = rt * MULTIPLIER */ \
332 \
333 srdi rx,rt,VSID_BITS; \
334 clrldi rt,rt,(64-VSID_BITS); \
335 add rt,rt,rx; /* add high and low bits */ \
336 /* Now, r3 == VSID (mod 2^36-1), and lies between 0 and \
337 * 2^36-1+2^28-1. That in particular means that if r3 >= \
338 * 2^36-1, then r3+1 has the 2^36 bit set. So, if r3+1 has \
339 * the bit clear, r3 already has the answer we want, if it \
340 * doesn't, the answer is the low 36 bits of r3+1. So in all \
341 * cases the answer is the low 36 bits of (r3 + ((r3+1) >> 36))*/\
342 addi rx,rt,1; \
343 srdi rx,rx,VSID_BITS; /* extract 2^36 bit */ \
344 add rt,rt,rx
345
346
347#ifndef __ASSEMBLY__
348
349typedef unsigned long mm_context_id_t;
350
351typedef struct {
352 mm_context_id_t id;
353 u16 user_psize; /* page size index */
354 u16 sllp; /* SLB entry page size encoding */
355#ifdef CONFIG_HUGETLB_PAGE
356 u16 low_htlb_areas, high_htlb_areas;
357#endif
358 unsigned long vdso_base;
359} mm_context_t;
360
361
362static inline unsigned long vsid_scramble(unsigned long protovsid)
363{
364#if 0
365 /* The code below is equivalent to this function for arguments
366 * < 2^VSID_BITS, which is all this should ever be called
367 * with. However gcc is not clever enough to compute the
368 * modulus (2^n-1) without a second multiply. */
369 return ((protovsid * VSID_MULTIPLIER) % VSID_MODULUS);
370#else /* 1 */
371 unsigned long x;
372
373 x = protovsid * VSID_MULTIPLIER;
374 x = (x >> VSID_BITS) + (x & VSID_MODULUS);
375 return (x + ((x+1) >> VSID_BITS)) & VSID_MODULUS;
376#endif /* 1 */
377}
378
379/* This is only valid for addresses >= KERNELBASE */
380static inline unsigned long get_kernel_vsid(unsigned long ea)
381{
382 return vsid_scramble(ea >> SID_SHIFT);
383}
384
385/* This is only valid for user addresses (which are below 2^41) */
386static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
387{
388 return vsid_scramble((context << USER_ESID_BITS)
389 | (ea >> SID_SHIFT));
390}
391
392#define VSID_SCRAMBLE(pvsid) (((pvsid) * VSID_MULTIPLIER) % VSID_MODULUS)
393#define KERNEL_VSID(ea) VSID_SCRAMBLE(GET_ESID(ea))
394
395/* Physical address used by some IO functions */
396typedef unsigned long phys_addr_t;
397
398#endif /* __ASSEMBLY__ */
399
400#endif /* _ASM_POWERPC_MMU_HASH64_H_ */
diff --git a/include/asm-powerpc/mmu.h b/include/asm-powerpc/mmu.h
index 41c8c9c5a254..06b3e6d336cb 100644
--- a/include/asm-powerpc/mmu.h
+++ b/include/asm-powerpc/mmu.h
@@ -2,406 +2,14 @@
2#define _ASM_POWERPC_MMU_H_ 2#define _ASM_POWERPC_MMU_H_
3#ifdef __KERNEL__ 3#ifdef __KERNEL__
4 4
5#ifndef CONFIG_PPC64 5#ifdef CONFIG_PPC64
6#include <asm-ppc/mmu.h> 6/* 64-bit classic hash table MMU */
7# include <asm/mmu-hash64.h>
7#else 8#else
8 9/* 32-bit. FIXME: split up the 32-bit MMU types, and revise for
9/* 10 * arch/powerpc */
10 * PowerPC memory management structures 11# include <asm-ppc/mmu.h>
11 *
12 * Dave Engebretsen & Mike Corrigan <{engebret|mikejc}@us.ibm.com>
13 * PPC64 rework.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
19 */
20
21#include <asm/asm-compat.h>
22#include <asm/page.h>
23
24/*
25 * Segment table
26 */
27
28#define STE_ESID_V 0x80
29#define STE_ESID_KS 0x20
30#define STE_ESID_KP 0x10
31#define STE_ESID_N 0x08
32
33#define STE_VSID_SHIFT 12
34
35/* Location of cpu0's segment table */
36#define STAB0_PAGE 0x6
37#define STAB0_OFFSET (STAB0_PAGE << 12)
38#define STAB0_PHYS_ADDR (STAB0_OFFSET + PHYSICAL_START)
39
40#ifndef __ASSEMBLY__
41extern char initial_stab[];
42#endif /* ! __ASSEMBLY */
43
44/*
45 * SLB
46 */
47
48#define SLB_NUM_BOLTED 3
49#define SLB_CACHE_ENTRIES 8
50
51/* Bits in the SLB ESID word */
52#define SLB_ESID_V ASM_CONST(0x0000000008000000) /* valid */
53
54/* Bits in the SLB VSID word */
55#define SLB_VSID_SHIFT 12
56#define SLB_VSID_B ASM_CONST(0xc000000000000000)
57#define SLB_VSID_B_256M ASM_CONST(0x0000000000000000)
58#define SLB_VSID_B_1T ASM_CONST(0x4000000000000000)
59#define SLB_VSID_KS ASM_CONST(0x0000000000000800)
60#define SLB_VSID_KP ASM_CONST(0x0000000000000400)
61#define SLB_VSID_N ASM_CONST(0x0000000000000200) /* no-execute */
62#define SLB_VSID_L ASM_CONST(0x0000000000000100)
63#define SLB_VSID_C ASM_CONST(0x0000000000000080) /* class */
64#define SLB_VSID_LP ASM_CONST(0x0000000000000030)
65#define SLB_VSID_LP_00 ASM_CONST(0x0000000000000000)
66#define SLB_VSID_LP_01 ASM_CONST(0x0000000000000010)
67#define SLB_VSID_LP_10 ASM_CONST(0x0000000000000020)
68#define SLB_VSID_LP_11 ASM_CONST(0x0000000000000030)
69#define SLB_VSID_LLP (SLB_VSID_L|SLB_VSID_LP)
70
71#define SLB_VSID_KERNEL (SLB_VSID_KP)
72#define SLB_VSID_USER (SLB_VSID_KP|SLB_VSID_KS|SLB_VSID_C)
73
74#define SLBIE_C (0x08000000)
75
76/*
77 * Hash table
78 */
79
80#define HPTES_PER_GROUP 8
81
82#define HPTE_V_AVPN_SHIFT 7
83#define HPTE_V_AVPN ASM_CONST(0xffffffffffffff80)
84#define HPTE_V_AVPN_VAL(x) (((x) & HPTE_V_AVPN) >> HPTE_V_AVPN_SHIFT)
85#define HPTE_V_COMPARE(x,y) (!(((x) ^ (y)) & HPTE_V_AVPN))
86#define HPTE_V_BOLTED ASM_CONST(0x0000000000000010)
87#define HPTE_V_LOCK ASM_CONST(0x0000000000000008)
88#define HPTE_V_LARGE ASM_CONST(0x0000000000000004)
89#define HPTE_V_SECONDARY ASM_CONST(0x0000000000000002)
90#define HPTE_V_VALID ASM_CONST(0x0000000000000001)
91
92#define HPTE_R_PP0 ASM_CONST(0x8000000000000000)
93#define HPTE_R_TS ASM_CONST(0x4000000000000000)
94#define HPTE_R_RPN_SHIFT 12
95#define HPTE_R_RPN ASM_CONST(0x3ffffffffffff000)
96#define HPTE_R_FLAGS ASM_CONST(0x00000000000003ff)
97#define HPTE_R_PP ASM_CONST(0x0000000000000003)
98#define HPTE_R_N ASM_CONST(0x0000000000000004)
99#define HPTE_R_C ASM_CONST(0x0000000000000080)
100#define HPTE_R_R ASM_CONST(0x0000000000000100)
101
102/* Values for PP (assumes Ks=0, Kp=1) */
103/* pp0 will always be 0 for linux */
104#define PP_RWXX 0 /* Supervisor read/write, User none */
105#define PP_RWRX 1 /* Supervisor read/write, User read */
106#define PP_RWRW 2 /* Supervisor read/write, User read/write */
107#define PP_RXRX 3 /* Supervisor read, User read */
108
109#ifndef __ASSEMBLY__
110
111typedef struct {
112 unsigned long v;
113 unsigned long r;
114} hpte_t;
115
116extern hpte_t *htab_address;
117extern unsigned long htab_size_bytes;
118extern unsigned long htab_hash_mask;
119
120/*
121 * Page size definition
122 *
123 * shift : is the "PAGE_SHIFT" value for that page size
124 * sllp : is a bit mask with the value of SLB L || LP to be or'ed
125 * directly to a slbmte "vsid" value
126 * penc : is the HPTE encoding mask for the "LP" field:
127 *
128 */
129struct mmu_psize_def
130{
131 unsigned int shift; /* number of bits */
132 unsigned int penc; /* HPTE encoding */
133 unsigned int tlbiel; /* tlbiel supported for that page size */
134 unsigned long avpnm; /* bits to mask out in AVPN in the HPTE */
135 unsigned long sllp; /* SLB L||LP (exact mask to use in slbmte) */
136};
137
138#endif /* __ASSEMBLY__ */
139
140/*
141 * The kernel use the constants below to index in the page sizes array.
142 * The use of fixed constants for this purpose is better for performances
143 * of the low level hash refill handlers.
144 *
145 * A non supported page size has a "shift" field set to 0
146 *
147 * Any new page size being implemented can get a new entry in here. Whether
148 * the kernel will use it or not is a different matter though. The actual page
149 * size used by hugetlbfs is not defined here and may be made variable
150 */
151
152#define MMU_PAGE_4K 0 /* 4K */
153#define MMU_PAGE_64K 1 /* 64K */
154#define MMU_PAGE_64K_AP 2 /* 64K Admixed (in a 4K segment) */
155#define MMU_PAGE_1M 3 /* 1M */
156#define MMU_PAGE_16M 4 /* 16M */
157#define MMU_PAGE_16G 5 /* 16G */
158#define MMU_PAGE_COUNT 6
159
160#ifndef __ASSEMBLY__
161
162/*
163 * The current system page sizes
164 */
165extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
166extern int mmu_linear_psize;
167extern int mmu_virtual_psize;
168extern int mmu_vmalloc_psize;
169extern int mmu_io_psize;
170
171/*
172 * If the processor supports 64k normal pages but not 64k cache
173 * inhibited pages, we have to be prepared to switch processes
174 * to use 4k pages when they create cache-inhibited mappings.
175 * If this is the case, mmu_ci_restrictions will be set to 1.
176 */
177extern int mmu_ci_restrictions;
178
179#ifdef CONFIG_HUGETLB_PAGE
180/*
181 * The page size index of the huge pages for use by hugetlbfs
182 */
183extern int mmu_huge_psize;
184
185#endif /* CONFIG_HUGETLB_PAGE */
186
187/*
188 * This function sets the AVPN and L fields of the HPTE appropriately
189 * for the page size
190 */
191static inline unsigned long hpte_encode_v(unsigned long va, int psize)
192{
193 unsigned long v =
194 v = (va >> 23) & ~(mmu_psize_defs[psize].avpnm);
195 v <<= HPTE_V_AVPN_SHIFT;
196 if (psize != MMU_PAGE_4K)
197 v |= HPTE_V_LARGE;
198 return v;
199}
200
201/*
202 * This function sets the ARPN, and LP fields of the HPTE appropriately
203 * for the page size. We assume the pa is already "clean" that is properly
204 * aligned for the requested page size
205 */
206static inline unsigned long hpte_encode_r(unsigned long pa, int psize)
207{
208 unsigned long r;
209
210 /* A 4K page needs no special encoding */
211 if (psize == MMU_PAGE_4K)
212 return pa & HPTE_R_RPN;
213 else {
214 unsigned int penc = mmu_psize_defs[psize].penc;
215 unsigned int shift = mmu_psize_defs[psize].shift;
216 return (pa & ~((1ul << shift) - 1)) | (penc << 12);
217 }
218 return r;
219}
220
221/*
222 * This hashes a virtual address for a 256Mb segment only for now
223 */
224
225static inline unsigned long hpt_hash(unsigned long va, unsigned int shift)
226{
227 return ((va >> 28) & 0x7fffffffffUL) ^ ((va & 0x0fffffffUL) >> shift);
228}
229
230extern int __hash_page_4K(unsigned long ea, unsigned long access,
231 unsigned long vsid, pte_t *ptep, unsigned long trap,
232 unsigned int local);
233extern int __hash_page_64K(unsigned long ea, unsigned long access,
234 unsigned long vsid, pte_t *ptep, unsigned long trap,
235 unsigned int local);
236struct mm_struct;
237extern int hash_huge_page(struct mm_struct *mm, unsigned long access,
238 unsigned long ea, unsigned long vsid, int local,
239 unsigned long trap);
240
241extern int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
242 unsigned long pstart, unsigned long mode,
243 int psize);
244
245extern void htab_initialize(void);
246extern void htab_initialize_secondary(void);
247extern void hpte_init_native(void);
248extern void hpte_init_lpar(void);
249extern void hpte_init_iSeries(void);
250
251extern void stabs_alloc(void);
252extern void slb_initialize(void);
253extern void slb_flush_and_rebolt(void);
254extern void stab_initialize(unsigned long stab);
255
256#endif /* __ASSEMBLY__ */
257
258/*
259 * VSID allocation
260 *
261 * We first generate a 36-bit "proto-VSID". For kernel addresses this
262 * is equal to the ESID, for user addresses it is:
263 * (context << 15) | (esid & 0x7fff)
264 *
265 * The two forms are distinguishable because the top bit is 0 for user
266 * addresses, whereas the top two bits are 1 for kernel addresses.
267 * Proto-VSIDs with the top two bits equal to 0b10 are reserved for
268 * now.
269 *
270 * The proto-VSIDs are then scrambled into real VSIDs with the
271 * multiplicative hash:
272 *
273 * VSID = (proto-VSID * VSID_MULTIPLIER) % VSID_MODULUS
274 * where VSID_MULTIPLIER = 268435399 = 0xFFFFFC7
275 * VSID_MODULUS = 2^36-1 = 0xFFFFFFFFF
276 *
277 * This scramble is only well defined for proto-VSIDs below
278 * 0xFFFFFFFFF, so both proto-VSID and actual VSID 0xFFFFFFFFF are
279 * reserved. VSID_MULTIPLIER is prime, so in particular it is
280 * co-prime to VSID_MODULUS, making this a 1:1 scrambling function.
281 * Because the modulus is 2^n-1 we can compute it efficiently without
282 * a divide or extra multiply (see below).
283 *
284 * This scheme has several advantages over older methods:
285 *
286 * - We have VSIDs allocated for every kernel address
287 * (i.e. everything above 0xC000000000000000), except the very top
288 * segment, which simplifies several things.
289 *
290 * - We allow for 15 significant bits of ESID and 20 bits of
291 * context for user addresses. i.e. 8T (43 bits) of address space for
292 * up to 1M contexts (although the page table structure and context
293 * allocation will need changes to take advantage of this).
294 *
295 * - The scramble function gives robust scattering in the hash
296 * table (at least based on some initial results). The previous
297 * method was more susceptible to pathological cases giving excessive
298 * hash collisions.
299 */
300/*
301 * WARNING - If you change these you must make sure the asm
302 * implementations in slb_allocate (slb_low.S), do_stab_bolted
303 * (head.S) and ASM_VSID_SCRAMBLE (below) are changed accordingly.
304 *
305 * You'll also need to change the precomputed VSID values in head.S
306 * which are used by the iSeries firmware.
307 */
308
309#define VSID_MULTIPLIER ASM_CONST(200730139) /* 28-bit prime */
310#define VSID_BITS 36
311#define VSID_MODULUS ((1UL<<VSID_BITS)-1)
312
313#define CONTEXT_BITS 19
314#define USER_ESID_BITS 16
315
316#define USER_VSID_RANGE (1UL << (USER_ESID_BITS + SID_SHIFT))
317
318/*
319 * This macro generates asm code to compute the VSID scramble
320 * function. Used in slb_allocate() and do_stab_bolted. The function
321 * computed is: (protovsid*VSID_MULTIPLIER) % VSID_MODULUS
322 *
323 * rt = register continaing the proto-VSID and into which the
324 * VSID will be stored
325 * rx = scratch register (clobbered)
326 *
327 * - rt and rx must be different registers
328 * - The answer will end up in the low 36 bits of rt. The higher
329 * bits may contain other garbage, so you may need to mask the
330 * result.
331 */
332#define ASM_VSID_SCRAMBLE(rt, rx) \
333 lis rx,VSID_MULTIPLIER@h; \
334 ori rx,rx,VSID_MULTIPLIER@l; \
335 mulld rt,rt,rx; /* rt = rt * MULTIPLIER */ \
336 \
337 srdi rx,rt,VSID_BITS; \
338 clrldi rt,rt,(64-VSID_BITS); \
339 add rt,rt,rx; /* add high and low bits */ \
340 /* Now, r3 == VSID (mod 2^36-1), and lies between 0 and \
341 * 2^36-1+2^28-1. That in particular means that if r3 >= \
342 * 2^36-1, then r3+1 has the 2^36 bit set. So, if r3+1 has \
343 * the bit clear, r3 already has the answer we want, if it \
344 * doesn't, the answer is the low 36 bits of r3+1. So in all \
345 * cases the answer is the low 36 bits of (r3 + ((r3+1) >> 36))*/\
346 addi rx,rt,1; \
347 srdi rx,rx,VSID_BITS; /* extract 2^36 bit */ \
348 add rt,rt,rx
349
350
351#ifndef __ASSEMBLY__
352
353typedef unsigned long mm_context_id_t;
354
355typedef struct {
356 mm_context_id_t id;
357 u16 user_psize; /* page size index */
358 u16 sllp; /* SLB entry page size encoding */
359#ifdef CONFIG_HUGETLB_PAGE
360 u16 low_htlb_areas, high_htlb_areas;
361#endif 12#endif
362 unsigned long vdso_base;
363} mm_context_t;
364
365
366static inline unsigned long vsid_scramble(unsigned long protovsid)
367{
368#if 0
369 /* The code below is equivalent to this function for arguments
370 * < 2^VSID_BITS, which is all this should ever be called
371 * with. However gcc is not clever enough to compute the
372 * modulus (2^n-1) without a second multiply. */
373 return ((protovsid * VSID_MULTIPLIER) % VSID_MODULUS);
374#else /* 1 */
375 unsigned long x;
376
377 x = protovsid * VSID_MULTIPLIER;
378 x = (x >> VSID_BITS) + (x & VSID_MODULUS);
379 return (x + ((x+1) >> VSID_BITS)) & VSID_MODULUS;
380#endif /* 1 */
381}
382
383/* This is only valid for addresses >= KERNELBASE */
384static inline unsigned long get_kernel_vsid(unsigned long ea)
385{
386 return vsid_scramble(ea >> SID_SHIFT);
387}
388
389/* This is only valid for user addresses (which are below 2^41) */
390static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
391{
392 return vsid_scramble((context << USER_ESID_BITS)
393 | (ea >> SID_SHIFT));
394}
395
396#define VSID_SCRAMBLE(pvsid) (((pvsid) * VSID_MULTIPLIER) % VSID_MODULUS)
397#define KERNEL_VSID(ea) VSID_SCRAMBLE(GET_ESID(ea))
398
399/* Physical address used by some IO functions */
400typedef unsigned long phys_addr_t;
401
402
403#endif /* __ASSEMBLY */
404 13
405#endif /* CONFIG_PPC64 */
406#endif /* __KERNEL__ */ 14#endif /* __KERNEL__ */
407#endif /* _ASM_POWERPC_MMU_H_ */ 15#endif /* _ASM_POWERPC_MMU_H_ */
diff --git a/include/asm-powerpc/mpc52xx.h b/include/asm-powerpc/mpc52xx.h
index 4560d72fc758..7afd5bf94528 100644
--- a/include/asm-powerpc/mpc52xx.h
+++ b/include/asm-powerpc/mpc52xx.h
@@ -249,6 +249,8 @@ extern void mpc52xx_declare_of_platform_devices(void);
249extern void mpc52xx_init_irq(void); 249extern void mpc52xx_init_irq(void);
250extern unsigned int mpc52xx_get_irq(void); 250extern unsigned int mpc52xx_get_irq(void);
251 251
252extern int __init mpc52xx_add_bridge(struct device_node *node);
253
252#endif /* __ASSEMBLY__ */ 254#endif /* __ASSEMBLY__ */
253 255
254#endif /* __ASM_POWERPC_MPC52xx_H__ */ 256#endif /* __ASM_POWERPC_MPC52xx_H__ */
diff --git a/include/asm-powerpc/mpc8260.h b/include/asm-powerpc/mpc8260.h
new file mode 100644
index 000000000000..f1b83b09ab2e
--- /dev/null
+++ b/include/asm-powerpc/mpc8260.h
@@ -0,0 +1,24 @@
1/*
2 * Since there are many different boards and no standard configuration,
3 * we have a unique include file for each. Rather than change every
4 * file that has to include MPC8260 configuration, they all include
5 * this one and the configuration switching is done here.
6 */
7#ifdef __KERNEL__
8#ifndef __ASM_PPC_MPC8260_H__
9#define __ASM_PPC_MPC8260_H__
10
11
12#ifdef CONFIG_8260
13
14#if defined(CONFIG_PQ2ADS) || defined (CONFIG_PQ2FADS)
15#include <platforms/82xx/pq2ads.h>
16#endif
17
18#ifdef CONFIG_PCI_8260
19#include <platforms/82xx/m82xx_pci.h>
20#endif
21
22#endif /* CONFIG_8260 */
23#endif /* !__ASM_PPC_MPC8260_H__ */
24#endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/mpc8xx.h b/include/asm-powerpc/mpc8xx.h
new file mode 100644
index 000000000000..580371120e1a
--- /dev/null
+++ b/include/asm-powerpc/mpc8xx.h
@@ -0,0 +1,28 @@
1/* This is the single file included by all MPC8xx build options.
2 * Since there are many different boards and no standard configuration,
3 * we have a unique include file for each. Rather than change every
4 * file that has to include MPC8xx configuration, they all include
5 * this one and the configuration switching is done here.
6 */
7#ifdef __KERNEL__
8#ifndef __CONFIG_8xx_DEFS
9#define __CONFIG_8xx_DEFS
10
11
12#ifdef CONFIG_8xx
13
14#ifdef CONFIG_FADS
15#include <platforms/fads.h>
16#endif
17
18#if defined(CONFIG_MPC86XADS)
19#include <platforms/8xx/mpc86xads.h>
20#endif
21
22#if defined(CONFIG_MPC885ADS)
23#include <platforms/8xx/mpc885ads.h>
24#endif
25
26#endif /* CONFIG_8xx */
27#endif /* __CONFIG_8xx_DEFS */
28#endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
index b71e7b32a555..e4d5fc5362a0 100644
--- a/include/asm-powerpc/mpic.h
+++ b/include/asm-powerpc/mpic.h
@@ -103,21 +103,6 @@
103#define MPIC_MAX_ISU 32 103#define MPIC_MAX_ISU 32
104 104
105/* 105/*
106 * Special vector numbers (internal use only)
107 */
108#define MPIC_VEC_SPURRIOUS 255
109#define MPIC_VEC_IPI_3 254
110#define MPIC_VEC_IPI_2 253
111#define MPIC_VEC_IPI_1 252
112#define MPIC_VEC_IPI_0 251
113
114/* unused */
115#define MPIC_VEC_TIMER_3 250
116#define MPIC_VEC_TIMER_2 249
117#define MPIC_VEC_TIMER_1 248
118#define MPIC_VEC_TIMER_0 247
119
120/*
121 * Tsi108 implementation of MPIC has many differences from the original one 106 * Tsi108 implementation of MPIC has many differences from the original one
122 */ 107 */
123 108
@@ -214,7 +199,7 @@ enum {
214}; 199};
215 200
216 201
217#ifdef CONFIG_MPIC_BROKEN_U3 202#ifdef CONFIG_MPIC_U3_HT_IRQS
218/* Fixup table entry */ 203/* Fixup table entry */
219struct mpic_irq_fixup 204struct mpic_irq_fixup
220{ 205{
@@ -223,7 +208,7 @@ struct mpic_irq_fixup
223 u32 data; 208 u32 data;
224 unsigned int index; 209 unsigned int index;
225}; 210};
226#endif /* CONFIG_MPIC_BROKEN_U3 */ 211#endif /* CONFIG_MPIC_U3_HT_IRQS */
227 212
228 213
229enum mpic_reg_type { 214enum mpic_reg_type {
@@ -254,7 +239,7 @@ struct mpic
254 239
255 /* The "linux" controller struct */ 240 /* The "linux" controller struct */
256 struct irq_chip hc_irq; 241 struct irq_chip hc_irq;
257#ifdef CONFIG_MPIC_BROKEN_U3 242#ifdef CONFIG_MPIC_U3_HT_IRQS
258 struct irq_chip hc_ht_irq; 243 struct irq_chip hc_ht_irq;
259#endif 244#endif
260#ifdef CONFIG_SMP 245#ifdef CONFIG_SMP
@@ -276,7 +261,14 @@ struct mpic
276 unsigned char *senses; 261 unsigned char *senses;
277 unsigned int senses_count; 262 unsigned int senses_count;
278 263
279#ifdef CONFIG_MPIC_BROKEN_U3 264 /* vector numbers used for internal sources (ipi/timers) */
265 unsigned int ipi_vecs[4];
266 unsigned int timer_vecs[4];
267
268 /* Spurious vector to program into unused sources */
269 unsigned int spurious_vec;
270
271#ifdef CONFIG_MPIC_U3_HT_IRQS
280 /* The fixup table */ 272 /* The fixup table */
281 struct mpic_irq_fixup *fixups; 273 struct mpic_irq_fixup *fixups;
282 spinlock_t fixup_lock; 274 spinlock_t fixup_lock;
@@ -321,7 +313,7 @@ struct mpic
321/* Set this for a big-endian MPIC */ 313/* Set this for a big-endian MPIC */
322#define MPIC_BIG_ENDIAN 0x00000002 314#define MPIC_BIG_ENDIAN 0x00000002
323/* Broken U3 MPIC */ 315/* Broken U3 MPIC */
324#define MPIC_BROKEN_U3 0x00000004 316#define MPIC_U3_HT_IRQS 0x00000004
325/* Broken IPI registers (autodetected) */ 317/* Broken IPI registers (autodetected) */
326#define MPIC_BROKEN_IPI 0x00000008 318#define MPIC_BROKEN_IPI 0x00000008
327/* MPIC wants a reset */ 319/* MPIC wants a reset */
@@ -332,6 +324,8 @@ struct mpic
332#define MPIC_NO_PTHROU_DIS 0x00000040 324#define MPIC_NO_PTHROU_DIS 0x00000040
333/* DCR based MPIC */ 325/* DCR based MPIC */
334#define MPIC_USES_DCR 0x00000080 326#define MPIC_USES_DCR 0x00000080
327/* MPIC has 11-bit vector fields (or larger) */
328#define MPIC_LARGE_VECTORS 0x00000100
335 329
336/* MPIC HW modification ID */ 330/* MPIC HW modification ID */
337#define MPIC_REGSET_MASK 0xf0000000 331#define MPIC_REGSET_MASK 0xf0000000
@@ -358,7 +352,7 @@ struct mpic
358 * @senses_num: number of entries in the array 352 * @senses_num: number of entries in the array
359 * 353 *
360 * Note about the sense array. If none is passed, all interrupts are 354 * Note about the sense array. If none is passed, all interrupts are
361 * setup to be level negative unless MPIC_BROKEN_U3 is set in which 355 * setup to be level negative unless MPIC_U3_HT_IRQS is set in which
362 * case they are edge positive (and the array is ignored anyway). 356 * case they are edge positive (and the array is ignored anyway).
363 * The values in the array start at the first source of the MPIC, 357 * The values in the array start at the first source of the MPIC,
364 * that is senses[0] correspond to linux irq "irq_offset". 358 * that is senses[0] correspond to linux irq "irq_offset".
diff --git a/include/asm-powerpc/of_device.h b/include/asm-powerpc/of_device.h
index a889b2005bf5..4f1aabe0ce73 100644
--- a/include/asm-powerpc/of_device.h
+++ b/include/asm-powerpc/of_device.h
@@ -32,5 +32,8 @@ extern int of_device_register(struct of_device *ofdev);
32extern void of_device_unregister(struct of_device *ofdev); 32extern void of_device_unregister(struct of_device *ofdev);
33extern void of_release_dev(struct device *dev); 33extern void of_release_dev(struct device *dev);
34 34
35extern int of_device_uevent(struct device *dev,
36 char **envp, int num_envp, char *buffer, int buffer_size);
37
35#endif /* __KERNEL__ */ 38#endif /* __KERNEL__ */
36#endif /* _ASM_POWERPC_OF_DEVICE_H */ 39#endif /* _ASM_POWERPC_OF_DEVICE_H */
diff --git a/include/asm-powerpc/oprofile_impl.h b/include/asm-powerpc/oprofile_impl.h
index 71043bf3641f..8d6b47f7b300 100644
--- a/include/asm-powerpc/oprofile_impl.h
+++ b/include/asm-powerpc/oprofile_impl.h
@@ -57,11 +57,11 @@ extern struct op_powerpc_model op_model_rs64;
57extern struct op_powerpc_model op_model_power4; 57extern struct op_powerpc_model op_model_power4;
58extern struct op_powerpc_model op_model_7450; 58extern struct op_powerpc_model op_model_7450;
59extern struct op_powerpc_model op_model_cell; 59extern struct op_powerpc_model op_model_cell;
60extern struct op_powerpc_model op_model_pa6t;
60 61
61#ifndef CONFIG_FSL_BOOKE
62 62
63/* All the classic PPC parts use these */ 63/* All the classic PPC parts use these */
64static inline unsigned int ctr_read(unsigned int i) 64static inline unsigned int classic_ctr_read(unsigned int i)
65{ 65{
66 switch(i) { 66 switch(i) {
67 case 0: 67 case 0:
@@ -89,7 +89,7 @@ static inline unsigned int ctr_read(unsigned int i)
89 } 89 }
90} 90}
91 91
92static inline void ctr_write(unsigned int i, unsigned int val) 92static inline void classic_ctr_write(unsigned int i, unsigned int val)
93{ 93{
94 switch(i) { 94 switch(i) {
95 case 0: 95 case 0:
@@ -124,89 +124,6 @@ static inline void ctr_write(unsigned int i, unsigned int val)
124 break; 124 break;
125 } 125 }
126} 126}
127#else /* CONFIG_FSL_BOOKE */
128static inline u32 get_pmlca(int ctr)
129{
130 u32 pmlca;
131
132 switch (ctr) {
133 case 0:
134 pmlca = mfpmr(PMRN_PMLCA0);
135 break;
136 case 1:
137 pmlca = mfpmr(PMRN_PMLCA1);
138 break;
139 case 2:
140 pmlca = mfpmr(PMRN_PMLCA2);
141 break;
142 case 3:
143 pmlca = mfpmr(PMRN_PMLCA3);
144 break;
145 default:
146 panic("Bad ctr number\n");
147 }
148
149 return pmlca;
150}
151
152static inline void set_pmlca(int ctr, u32 pmlca)
153{
154 switch (ctr) {
155 case 0:
156 mtpmr(PMRN_PMLCA0, pmlca);
157 break;
158 case 1:
159 mtpmr(PMRN_PMLCA1, pmlca);
160 break;
161 case 2:
162 mtpmr(PMRN_PMLCA2, pmlca);
163 break;
164 case 3:
165 mtpmr(PMRN_PMLCA3, pmlca);
166 break;
167 default:
168 panic("Bad ctr number\n");
169 }
170}
171
172static inline unsigned int ctr_read(unsigned int i)
173{
174 switch(i) {
175 case 0:
176 return mfpmr(PMRN_PMC0);
177 case 1:
178 return mfpmr(PMRN_PMC1);
179 case 2:
180 return mfpmr(PMRN_PMC2);
181 case 3:
182 return mfpmr(PMRN_PMC3);
183 default:
184 return 0;
185 }
186}
187
188static inline void ctr_write(unsigned int i, unsigned int val)
189{
190 switch(i) {
191 case 0:
192 mtpmr(PMRN_PMC0, val);
193 break;
194 case 1:
195 mtpmr(PMRN_PMC1, val);
196 break;
197 case 2:
198 mtpmr(PMRN_PMC2, val);
199 break;
200 case 3:
201 mtpmr(PMRN_PMC3, val);
202 break;
203 default:
204 break;
205 }
206}
207
208
209#endif /* CONFIG_FSL_BOOKE */
210 127
211 128
212extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth); 129extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth);
diff --git a/include/asm-powerpc/paca.h b/include/asm-powerpc/paca.h
index 0d3adc09c847..cf95274f735e 100644
--- a/include/asm-powerpc/paca.h
+++ b/include/asm-powerpc/paca.h
@@ -70,6 +70,7 @@ struct paca_struct {
70 s16 hw_cpu_id; /* Physical processor number */ 70 s16 hw_cpu_id; /* Physical processor number */
71 u8 cpu_start; /* At startup, processor spins until */ 71 u8 cpu_start; /* At startup, processor spins until */
72 /* this becomes non-zero. */ 72 /* this becomes non-zero. */
73 struct slb_shadow *slb_shadow_ptr;
73 74
74 /* 75 /*
75 * Now, starting in cacheline 2, the exception save areas 76 * Now, starting in cacheline 2, the exception save areas
@@ -93,6 +94,7 @@ struct paca_struct {
93 u64 stab_rr; /* stab/slb round-robin counter */ 94 u64 stab_rr; /* stab/slb round-robin counter */
94 u64 saved_r1; /* r1 save for RTAS calls */ 95 u64 saved_r1; /* r1 save for RTAS calls */
95 u64 saved_msr; /* MSR saved here by enter_rtas */ 96 u64 saved_msr; /* MSR saved here by enter_rtas */
97 u16 trap_save; /* Used when bad stack is encountered */
96 u8 soft_enabled; /* irq soft-enable flag */ 98 u8 soft_enabled; /* irq soft-enable flag */
97 u8 hard_enabled; /* set if irqs are enabled in MSR */ 99 u8 hard_enabled; /* set if irqs are enabled in MSR */
98 u8 io_sync; /* writel() needs spin_unlock sync */ 100 u8 io_sync; /* writel() needs spin_unlock sync */
@@ -101,8 +103,6 @@ struct paca_struct {
101 u64 user_time; /* accumulated usermode TB ticks */ 103 u64 user_time; /* accumulated usermode TB ticks */
102 u64 system_time; /* accumulated system TB ticks */ 104 u64 system_time; /* accumulated system TB ticks */
103 u64 startpurr; /* PURR/TB value snapshot */ 105 u64 startpurr; /* PURR/TB value snapshot */
104
105 struct slb_shadow *slb_shadow_ptr;
106}; 106};
107 107
108extern struct paca_struct paca[]; 108extern struct paca_struct paca[];
diff --git a/include/asm-powerpc/parport.h b/include/asm-powerpc/parport.h
index 3fca21ddf546..b37b81e37278 100644
--- a/include/asm-powerpc/parport.h
+++ b/include/asm-powerpc/parport.h
@@ -20,18 +20,18 @@ extern struct parport *parport_pc_probe_port (unsigned long int base,
20static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma) 20static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
21{ 21{
22 struct device_node *np; 22 struct device_node *np;
23 u32 *prop; 23 const u32 *prop;
24 u32 io1, io2; 24 u32 io1, io2;
25 int propsize; 25 int propsize;
26 int count = 0; 26 int count = 0;
27 for (np = NULL; (np = of_find_compatible_node(np, 27 for (np = NULL; (np = of_find_compatible_node(np,
28 "parallel", 28 "parallel",
29 "pnpPNP,400")) != NULL;) { 29 "pnpPNP,400")) != NULL;) {
30 prop = (u32 *)get_property(np, "reg", &propsize); 30 prop = of_get_property(np, "reg", &propsize);
31 if (!prop || propsize > 6*sizeof(u32)) 31 if (!prop || propsize > 6*sizeof(u32))
32 continue; 32 continue;
33 io1 = prop[1]; io2 = prop[2]; 33 io1 = prop[1]; io2 = prop[2];
34 prop = (u32 *)get_property(np, "interrupts", NULL); 34 prop = of_get_property(np, "interrupts", NULL);
35 if (!prop) 35 if (!prop)
36 continue; 36 continue;
37 if (parport_pc_probe_port(io1, io2, prop[0], autodma, NULL) != NULL) 37 if (parport_pc_probe_port(io1, io2, prop[0], autodma, NULL) != NULL)
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index cb02c9d1ef93..d9bf5aba96cb 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -53,6 +53,8 @@ struct pci_controller {
53 unsigned long buid; 53 unsigned long buid;
54 unsigned long dma_window_base_cur; 54 unsigned long dma_window_base_cur;
55 unsigned long dma_window_size; 55 unsigned long dma_window_size;
56
57 void *private_data;
56}; 58};
57 59
58/* 60/*
diff --git a/include/asm-powerpc/pci.h b/include/asm-powerpc/pci.h
index ac656ee6bb19..ce0f13e8eb14 100644
--- a/include/asm-powerpc/pci.h
+++ b/include/asm-powerpc/pci.h
@@ -70,19 +70,22 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
70 */ 70 */
71#define PCI_DISABLE_MWI 71#define PCI_DISABLE_MWI
72 72
73extern struct dma_mapping_ops *pci_dma_ops; 73#ifdef CONFIG_PCI
74extern void set_pci_dma_ops(struct dma_mapping_ops *dma_ops);
75extern struct dma_mapping_ops *get_pci_dma_ops(void);
74 76
75/* For DAC DMA, we currently don't support it by default, but 77/* For DAC DMA, we currently don't support it by default, but
76 * we let 64-bit platforms override this. 78 * we let 64-bit platforms override this.
77 */ 79 */
78static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask) 80static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask)
79{ 81{
80 if (pci_dma_ops && pci_dma_ops->dac_dma_supported) 82 struct dma_mapping_ops *d = get_pci_dma_ops();
81 return pci_dma_ops->dac_dma_supported(&hwdev->dev, mask); 83
84 if (d && d->dac_dma_supported)
85 return d->dac_dma_supported(&hwdev->dev, mask);
82 return 0; 86 return 0;
83} 87}
84 88
85#ifdef CONFIG_PCI
86static inline void pci_dma_burst_advice(struct pci_dev *pdev, 89static inline void pci_dma_burst_advice(struct pci_dev *pdev,
87 enum pci_dma_burst_strategy *strat, 90 enum pci_dma_burst_strategy *strat,
88 unsigned long *strategy_parameter) 91 unsigned long *strategy_parameter)
@@ -99,6 +102,9 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
99 *strat = PCI_DMA_BURST_MULTIPLE; 102 *strat = PCI_DMA_BURST_MULTIPLE;
100 *strategy_parameter = cacheline_size; 103 *strategy_parameter = cacheline_size;
101} 104}
105#else /* CONFIG_PCI */
106#define set_pci_dma_ops(d)
107#define get_pci_dma_ops() NULL
102#endif 108#endif
103 109
104extern int pci_domain_nr(struct pci_bus *bus); 110extern int pci_domain_nr(struct pci_bus *bus);
diff --git a/include/asm-powerpc/pgtable-4k.h b/include/asm-powerpc/pgtable-4k.h
index 345d9b07b3e2..a28fa8bc01da 100644
--- a/include/asm-powerpc/pgtable-4k.h
+++ b/include/asm-powerpc/pgtable-4k.h
@@ -97,3 +97,6 @@
97 97
98#define pud_ERROR(e) \ 98#define pud_ERROR(e) \
99 printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e)) 99 printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e))
100
101#define remap_4k_pfn(vma, addr, pfn, prot) \
102 remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
diff --git a/include/asm-powerpc/pgtable-64k.h b/include/asm-powerpc/pgtable-64k.h
index 4b7126c53f37..5e84f070eaf7 100644
--- a/include/asm-powerpc/pgtable-64k.h
+++ b/include/asm-powerpc/pgtable-64k.h
@@ -35,6 +35,7 @@
35#define _PAGE_HPTE_SUB 0x0ffff000 /* combo only: sub pages HPTE bits */ 35#define _PAGE_HPTE_SUB 0x0ffff000 /* combo only: sub pages HPTE bits */
36#define _PAGE_HPTE_SUB0 0x08000000 /* combo only: first sub page */ 36#define _PAGE_HPTE_SUB0 0x08000000 /* combo only: first sub page */
37#define _PAGE_COMBO 0x10000000 /* this is a combo 4k page */ 37#define _PAGE_COMBO 0x10000000 /* this is a combo 4k page */
38#define _PAGE_4K_PFN 0x20000000 /* PFN is for a single 4k page */
38#define _PAGE_F_SECOND 0x00008000 /* full page: hidx bits */ 39#define _PAGE_F_SECOND 0x00008000 /* full page: hidx bits */
39#define _PAGE_F_GIX 0x00007000 /* full page: hidx bits */ 40#define _PAGE_F_GIX 0x00007000 /* full page: hidx bits */
40 41
@@ -93,6 +94,10 @@
93#define pte_pagesize_index(pte) \ 94#define pte_pagesize_index(pte) \
94 (((pte) & _PAGE_COMBO)? MMU_PAGE_4K: MMU_PAGE_64K) 95 (((pte) & _PAGE_COMBO)? MMU_PAGE_4K: MMU_PAGE_64K)
95 96
97#define remap_4k_pfn(vma, addr, pfn, prot) \
98 remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, \
99 __pgprot(pgprot_val((prot)) | _PAGE_4K_PFN))
100
96#endif /* __ASSEMBLY__ */ 101#endif /* __ASSEMBLY__ */
97#endif /* __KERNEL__ */ 102#endif /* __KERNEL__ */
98#endif /* _ASM_POWERPC_PGTABLE_64K_H */ 103#endif /* _ASM_POWERPC_PGTABLE_64K_H */
diff --git a/include/asm-powerpc/pgtable.h b/include/asm-powerpc/pgtable.h
index 10f52743f4ff..19edb6982b81 100644
--- a/include/asm-powerpc/pgtable.h
+++ b/include/asm-powerpc/pgtable.h
@@ -272,7 +272,10 @@ static inline pte_t pte_mkhuge(pte_t pte) {
272 return pte; } 272 return pte; }
273 273
274/* Atomic PTE updates */ 274/* Atomic PTE updates */
275static inline unsigned long pte_update(pte_t *p, unsigned long clr) 275static inline unsigned long pte_update(struct mm_struct *mm,
276 unsigned long addr,
277 pte_t *ptep, unsigned long clr,
278 int huge)
276{ 279{
277 unsigned long old, tmp; 280 unsigned long old, tmp;
278 281
@@ -283,20 +286,15 @@ static inline unsigned long pte_update(pte_t *p, unsigned long clr)
283 andc %1,%0,%4 \n\ 286 andc %1,%0,%4 \n\
284 stdcx. %1,0,%3 \n\ 287 stdcx. %1,0,%3 \n\
285 bne- 1b" 288 bne- 1b"
286 : "=&r" (old), "=&r" (tmp), "=m" (*p) 289 : "=&r" (old), "=&r" (tmp), "=m" (*ptep)
287 : "r" (p), "r" (clr), "m" (*p), "i" (_PAGE_BUSY) 290 : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY)
288 : "cc" ); 291 : "cc" );
292
293 if (old & _PAGE_HASHPTE)
294 hpte_need_flush(mm, addr, ptep, old, huge);
289 return old; 295 return old;
290} 296}
291 297
292/* PTE updating functions, this function puts the PTE in the
293 * batch, doesn't actually triggers the hash flush immediately,
294 * you need to call flush_tlb_pending() to do that.
295 * Pass -1 for "normal" size (4K or 64K)
296 */
297extern void hpte_update(struct mm_struct *mm, unsigned long addr,
298 pte_t *ptep, unsigned long pte, int huge);
299
300static inline int __ptep_test_and_clear_young(struct mm_struct *mm, 298static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
301 unsigned long addr, pte_t *ptep) 299 unsigned long addr, pte_t *ptep)
302{ 300{
@@ -304,11 +302,7 @@ static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
304 302
305 if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0) 303 if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
306 return 0; 304 return 0;
307 old = pte_update(ptep, _PAGE_ACCESSED); 305 old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0);
308 if (old & _PAGE_HASHPTE) {
309 hpte_update(mm, addr, ptep, old, 0);
310 flush_tlb_pending();
311 }
312 return (old & _PAGE_ACCESSED) != 0; 306 return (old & _PAGE_ACCESSED) != 0;
313} 307}
314#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 308#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
@@ -331,9 +325,7 @@ static inline int __ptep_test_and_clear_dirty(struct mm_struct *mm,
331 325
332 if ((pte_val(*ptep) & _PAGE_DIRTY) == 0) 326 if ((pte_val(*ptep) & _PAGE_DIRTY) == 0)
333 return 0; 327 return 0;
334 old = pte_update(ptep, _PAGE_DIRTY); 328 old = pte_update(mm, addr, ptep, _PAGE_DIRTY, 0);
335 if (old & _PAGE_HASHPTE)
336 hpte_update(mm, addr, ptep, old, 0);
337 return (old & _PAGE_DIRTY) != 0; 329 return (old & _PAGE_DIRTY) != 0;
338} 330}
339#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY 331#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
@@ -352,9 +344,7 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
352 344
353 if ((pte_val(*ptep) & _PAGE_RW) == 0) 345 if ((pte_val(*ptep) & _PAGE_RW) == 0)
354 return; 346 return;
355 old = pte_update(ptep, _PAGE_RW); 347 old = pte_update(mm, addr, ptep, _PAGE_RW, 0);
356 if (old & _PAGE_HASHPTE)
357 hpte_update(mm, addr, ptep, old, 0);
358} 348}
359 349
360/* 350/*
@@ -378,7 +368,6 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
378({ \ 368({ \
379 int __dirty = __ptep_test_and_clear_dirty((__vma)->vm_mm, __address, \ 369 int __dirty = __ptep_test_and_clear_dirty((__vma)->vm_mm, __address, \
380 __ptep); \ 370 __ptep); \
381 flush_tlb_page(__vma, __address); \
382 __dirty; \ 371 __dirty; \
383}) 372})
384 373
@@ -386,20 +375,14 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
386static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 375static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
387 unsigned long addr, pte_t *ptep) 376 unsigned long addr, pte_t *ptep)
388{ 377{
389 unsigned long old = pte_update(ptep, ~0UL); 378 unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0);
390
391 if (old & _PAGE_HASHPTE)
392 hpte_update(mm, addr, ptep, old, 0);
393 return __pte(old); 379 return __pte(old);
394} 380}
395 381
396static inline void pte_clear(struct mm_struct *mm, unsigned long addr, 382static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
397 pte_t * ptep) 383 pte_t * ptep)
398{ 384{
399 unsigned long old = pte_update(ptep, ~0UL); 385 pte_update(mm, addr, ptep, ~0UL, 0);
400
401 if (old & _PAGE_HASHPTE)
402 hpte_update(mm, addr, ptep, old, 0);
403} 386}
404 387
405/* 388/*
@@ -408,10 +391,8 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
408static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 391static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
409 pte_t *ptep, pte_t pte) 392 pte_t *ptep, pte_t pte)
410{ 393{
411 if (pte_present(*ptep)) { 394 if (pte_present(*ptep))
412 pte_clear(mm, addr, ptep); 395 pte_clear(mm, addr, ptep);
413 flush_tlb_pending();
414 }
415 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS); 396 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
416 *ptep = pte; 397 *ptep = pte;
417} 398}
@@ -467,16 +448,6 @@ extern pgd_t swapper_pg_dir[];
467 448
468extern void paging_init(void); 449extern void paging_init(void);
469 450
470/*
471 * This gets called at the end of handling a page fault, when
472 * the kernel has put a new PTE into the page table for the process.
473 * We use it to put a corresponding HPTE into the hash table
474 * ahead of time, instead of waiting for the inevitable extra
475 * hash-table miss exception.
476 */
477struct vm_area_struct;
478extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
479
480/* Encode and de-code a swap entry */ 451/* Encode and de-code a swap entry */
481#define __swp_type(entry) (((entry).val >> 1) & 0x3f) 452#define __swp_type(entry) (((entry).val >> 1) & 0x3f)
482#define __swp_offset(entry) ((entry).val >> 8) 453#define __swp_offset(entry) ((entry).val >> 8)
@@ -522,6 +493,7 @@ void pgtable_cache_init(void);
522 return pt; 493 return pt;
523} 494}
524 495
496
525#include <asm-generic/pgtable.h> 497#include <asm-generic/pgtable.h>
526 498
527#endif /* __ASSEMBLY__ */ 499#endif /* __ASSEMBLY__ */
diff --git a/include/asm-powerpc/pmc.h b/include/asm-powerpc/pmc.h
index 8588be68e0ad..d6a616a1b3ea 100644
--- a/include/asm-powerpc/pmc.h
+++ b/include/asm-powerpc/pmc.h
@@ -30,6 +30,7 @@ void release_pmc_hardware(void);
30 30
31#ifdef CONFIG_PPC64 31#ifdef CONFIG_PPC64
32void power4_enable_pmcs(void); 32void power4_enable_pmcs(void);
33void pasemi_enable_pmcs(void);
33#endif 34#endif
34 35
35#endif /* __KERNEL__ */ 36#endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/pmi.h b/include/asm-powerpc/pmi.h
new file mode 100644
index 000000000000..cb0f8aa43088
--- /dev/null
+++ b/include/asm-powerpc/pmi.h
@@ -0,0 +1,67 @@
1#ifndef _POWERPC_PMI_H
2#define _POWERPC_PMI_H
3
4/*
5 * Definitions for talking with PMI device on PowerPC
6 *
7 * PMI (Platform Management Interrupt) is a way to communicate
8 * with the BMC (Baseboard Management Controller) via interrupts.
9 * Unlike IPMI it is bidirectional and has a low latency.
10 *
11 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
12 *
13 * Author: Christian Krafft <krafft@de.ibm.com>
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2, or (at your option)
18 * any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29
30#ifdef __KERNEL__
31
32#include <asm/of_device.h>
33
34#define PMI_TYPE_FREQ_CHANGE 0x01
35#define PMI_READ_TYPE 0
36#define PMI_READ_DATA0 1
37#define PMI_READ_DATA1 2
38#define PMI_READ_DATA2 3
39#define PMI_WRITE_TYPE 4
40#define PMI_WRITE_DATA0 5
41#define PMI_WRITE_DATA1 6
42#define PMI_WRITE_DATA2 7
43
44#define PMI_ACK 0x80
45
46#define PMI_TIMEOUT 100
47
48typedef struct {
49 u8 type;
50 u8 data0;
51 u8 data1;
52 u8 data2;
53} pmi_message_t;
54
55struct pmi_handler {
56 struct list_head node;
57 u8 type;
58 void (*handle_pmi_message) (struct of_device *, pmi_message_t);
59};
60
61void pmi_register_handler(struct of_device *, struct pmi_handler *);
62void pmi_unregister_handler(struct of_device *, struct pmi_handler *);
63
64void pmi_send_message(struct of_device *, pmi_message_t);
65
66#endif /* __KERNEL__ */
67#endif /* _POWERPC_PMI_H */
diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h
index ab6eddb518c7..d74b2965bb82 100644
--- a/include/asm-powerpc/ppc-pci.h
+++ b/include/asm-powerpc/ppc-pci.h
@@ -10,6 +10,8 @@
10#define _ASM_POWERPC_PPC_PCI_H 10#define _ASM_POWERPC_PPC_PCI_H
11#ifdef __KERNEL__ 11#ifdef __KERNEL__
12 12
13#ifdef CONFIG_PCI
14
13#include <linux/pci.h> 15#include <linux/pci.h>
14#include <asm/pci-bridge.h> 16#include <asm/pci-bridge.h>
15 17
@@ -22,7 +24,7 @@ extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary);
22extern struct list_head hose_list; 24extern struct list_head hose_list;
23extern int global_phb_number; 25extern int global_phb_number;
24 26
25extern unsigned long find_and_init_phbs(void); 27extern void find_and_init_phbs(void);
26 28
27extern struct pci_dev *ppc64_isabridge_dev; /* may be NULL if no ISA bus */ 29extern struct pci_dev *ppc64_isabridge_dev; /* may be NULL if no ISA bus */
28 30
@@ -68,7 +70,7 @@ struct pci_dev *pci_get_device_by_addr(unsigned long addr);
68void eeh_slot_error_detail (struct pci_dn *pdn, int severity); 70void eeh_slot_error_detail (struct pci_dn *pdn, int severity);
69 71
70/** 72/**
71 * rtas_pci_enableo - enable IO transfers for this slot 73 * rtas_pci_enable - enable IO transfers for this slot
72 * @pdn: pci device node 74 * @pdn: pci device node
73 * @function: either EEH_THAW_MMIO or EEH_THAW_DMA 75 * @function: either EEH_THAW_MMIO or EEH_THAW_DMA
74 * 76 *
@@ -89,6 +91,7 @@ int rtas_pci_enable(struct pci_dn *pdn, int function);
89 * Returns a non-zero value if the reset failed. 91 * Returns a non-zero value if the reset failed.
90 */ 92 */
91int rtas_set_slot_reset (struct pci_dn *); 93int rtas_set_slot_reset (struct pci_dn *);
94int eeh_wait_for_slot_status(struct pci_dn *pdn, int max_wait_msecs);
92 95
93/** 96/**
94 * eeh_restore_bars - Restore device configuration info. 97 * eeh_restore_bars - Restore device configuration info.
@@ -126,5 +129,10 @@ struct device_node * find_device_pe(struct device_node *dn);
126 129
127#endif 130#endif
128 131
132#else /* CONFIG_PCI */
133static inline void find_and_init_phbs(void) { }
134static inline void init_pci_config_tokens(void) { }
135#endif /* !CONFIG_PCI */
136
129#endif /* __KERNEL__ */ 137#endif /* __KERNEL__ */
130#endif /* _ASM_POWERPC_PPC_PCI_H */ 138#endif /* _ASM_POWERPC_PPC_PCI_H */
diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h
index a26c32ee5527..d947b1609491 100644
--- a/include/asm-powerpc/processor.h
+++ b/include/asm-powerpc/processor.h
@@ -133,7 +133,6 @@ struct thread_struct {
133 mm_segment_t fs; /* for get_fs() validation */ 133 mm_segment_t fs; /* for get_fs() validation */
134#ifdef CONFIG_PPC32 134#ifdef CONFIG_PPC32
135 void *pgdir; /* root of page-table tree */ 135 void *pgdir; /* root of page-table tree */
136 signed long last_syscall;
137#endif 136#endif
138#if defined(CONFIG_4xx) || defined (CONFIG_BOOKE) 137#if defined(CONFIG_4xx) || defined (CONFIG_BOOKE)
139 unsigned long dbcr0; /* debug control register values */ 138 unsigned long dbcr0; /* debug control register values */
diff --git a/include/asm-powerpc/prom.h b/include/asm-powerpc/prom.h
index 0afee17f33b4..ec400f608e16 100644
--- a/include/asm-powerpc/prom.h
+++ b/include/asm-powerpc/prom.h
@@ -18,7 +18,9 @@
18#include <linux/types.h> 18#include <linux/types.h>
19#include <linux/proc_fs.h> 19#include <linux/proc_fs.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <asm/irq.h>
21#include <asm/atomic.h> 22#include <asm/atomic.h>
23#include <asm/io.h>
22 24
23/* Definitions used by the flattened device tree */ 25/* Definitions used by the flattened device tree */
24#define OF_DT_HEADER 0xd00dfeed /* marker */ 26#define OF_DT_HEADER 0xd00dfeed /* marker */
@@ -58,6 +60,8 @@ struct boot_param_header
58 u32 boot_cpuid_phys; /* Physical CPU id we're booting on */ 60 u32 boot_cpuid_phys; /* Physical CPU id we're booting on */
59 /* version 3 fields below */ 61 /* version 3 fields below */
60 u32 dt_strings_size; /* size of the DT strings block */ 62 u32 dt_strings_size; /* size of the DT strings block */
63 /* version 17 fields below */
64 u32 dt_struct_size; /* size of the DT structure block */
61}; 65};
62 66
63 67
@@ -68,7 +72,7 @@ typedef u32 ihandle;
68struct property { 72struct property {
69 char *name; 73 char *name;
70 int length; 74 int length;
71 unsigned char *value; 75 void *value;
72 struct property *next; 76 struct property *next;
73}; 77};
74 78
@@ -108,14 +112,6 @@ static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_e
108} 112}
109 113
110 114
111/* OBSOLETE: Old style node lookup */
112extern struct device_node *find_devices(const char *name);
113extern struct device_node *find_type_devices(const char *type);
114extern struct device_node *find_path_device(const char *path);
115extern struct device_node *find_compatible_devices(const char *type,
116 const char *compat);
117extern struct device_node *find_all_nodes(void);
118
119/* New style node lookup */ 115/* New style node lookup */
120extern struct device_node *of_find_node_by_name(struct device_node *from, 116extern struct device_node *of_find_node_by_name(struct device_node *from,
121 const char *name); 117 const char *name);
@@ -159,15 +155,17 @@ extern void of_detach_node(const struct device_node *);
159extern void finish_device_tree(void); 155extern void finish_device_tree(void);
160extern void unflatten_device_tree(void); 156extern void unflatten_device_tree(void);
161extern void early_init_devtree(void *); 157extern void early_init_devtree(void *);
162extern int device_is_compatible(const struct device_node *device, 158extern int of_device_is_compatible(const struct device_node *device,
163 const char *); 159 const char *);
160#define device_is_compatible(d, c) of_device_is_compatible((d), (c))
164extern int machine_is_compatible(const char *compat); 161extern int machine_is_compatible(const char *compat);
165extern const void *get_property(const struct device_node *node, 162extern const void *of_get_property(const struct device_node *node,
166 const char *name, 163 const char *name,
167 int *lenp); 164 int *lenp);
165#define get_property(a, b, c) of_get_property((a), (b), (c))
168extern void print_properties(struct device_node *node); 166extern void print_properties(struct device_node *node);
169extern int prom_n_addr_cells(struct device_node* np); 167extern int of_n_addr_cells(struct device_node* np);
170extern int prom_n_size_cells(struct device_node* np); 168extern int of_n_size_cells(struct device_node* np);
171extern int prom_n_intr_cells(struct device_node* np); 169extern int prom_n_intr_cells(struct device_node* np);
172extern void prom_get_irq_senses(unsigned char *senses, int off, int max); 170extern void prom_get_irq_senses(unsigned char *senses, int off, int max);
173extern int prom_add_property(struct device_node* np, struct property* prop); 171extern int prom_add_property(struct device_node* np, struct property* prop);
@@ -255,6 +253,8 @@ extern void kdump_move_device_tree(void);
255/* CPU OF node matching */ 253/* CPU OF node matching */
256struct device_node *of_get_cpu_node(int cpu, unsigned int *thread); 254struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
257 255
256/* Get the MAC address */
257extern const void *of_get_mac_address(struct device_node *np);
258 258
259/* 259/*
260 * OF interrupt mapping 260 * OF interrupt mapping
@@ -348,6 +348,16 @@ static inline int of_irq_to_resource(struct device_node *dev, int index, struct
348 return irq; 348 return irq;
349} 349}
350 350
351static inline void __iomem *of_iomap(struct device_node *np, int index)
352{
353 struct resource res;
354
355 if (of_address_to_resource(np, index, &res))
356 return NULL;
357
358 return ioremap(res.start, 1 + res.end - res.start);
359}
360
351 361
352#endif /* __KERNEL__ */ 362#endif /* __KERNEL__ */
353#endif /* _POWERPC_PROM_H */ 363#endif /* _POWERPC_PROM_H */
diff --git a/include/asm-powerpc/ps3.h b/include/asm-powerpc/ps3.h
index 52a69ed0d90a..821581a8b643 100644
--- a/include/asm-powerpc/ps3.h
+++ b/include/asm-powerpc/ps3.h
@@ -21,11 +21,33 @@
21#if !defined(_ASM_POWERPC_PS3_H) 21#if !defined(_ASM_POWERPC_PS3_H)
22#define _ASM_POWERPC_PS3_H 22#define _ASM_POWERPC_PS3_H
23 23
24#include <linux/compiler.h> /* for __deprecated */
25#include <linux/init.h> 24#include <linux/init.h>
26#include <linux/types.h> 25#include <linux/types.h>
27#include <linux/device.h> 26#include <linux/device.h>
28 27
28union ps3_firmware_version {
29 u64 raw;
30 struct {
31 u16 pad;
32 u16 major;
33 u16 minor;
34 u16 rev;
35 };
36};
37
38int ps3_get_firmware_version(union ps3_firmware_version *v);
39
40/* 'Other OS' area */
41
42enum ps3_param_av_multi_out {
43 PS3_PARAM_AV_MULTI_OUT_NTSC = 0,
44 PS3_PARAM_AV_MULTI_OUT_PAL_RGB = 1,
45 PS3_PARAM_AV_MULTI_OUT_PAL_YCBCR = 2,
46 PS3_PARAM_AV_MULTI_OUT_SECAM = 3,
47};
48
49enum ps3_param_av_multi_out ps3_os_area_get_av_multi_out(void);
50
29/** 51/**
30 * struct ps3_device_id - HV bus device identifier from the system repository 52 * struct ps3_device_id - HV bus device identifier from the system repository
31 * @bus_id: HV bus id, {1..} (zero invalid) 53 * @bus_id: HV bus id, {1..} (zero invalid)
@@ -139,20 +161,32 @@ unsigned long ps3_mm_phys_to_lpar(unsigned long phys_addr);
139 161
140/* inrerrupt routines */ 162/* inrerrupt routines */
141 163
142int ps3_alloc_io_irq(unsigned int interrupt_id, unsigned int *virq); 164enum ps3_cpu_binding {
165 PS3_BINDING_CPU_ANY = -1,
166 PS3_BINDING_CPU_0 = 0,
167 PS3_BINDING_CPU_1 = 1,
168};
169
170int ps3_alloc_io_irq(enum ps3_cpu_binding cpu, unsigned int interrupt_id,
171 unsigned int *virq);
143int ps3_free_io_irq(unsigned int virq); 172int ps3_free_io_irq(unsigned int virq);
144int ps3_alloc_event_irq(unsigned int *virq); 173int ps3_alloc_event_irq(enum ps3_cpu_binding cpu, unsigned int *virq);
145int ps3_free_event_irq(unsigned int virq); 174int ps3_free_event_irq(unsigned int virq);
146int ps3_send_event_locally(unsigned int virq); 175int ps3_send_event_locally(unsigned int virq);
147int ps3_connect_event_irq(const struct ps3_device_id *did, 176int ps3_connect_event_irq(enum ps3_cpu_binding cpu,
148 unsigned int interrupt_id, unsigned int *virq); 177 const struct ps3_device_id *did, unsigned int interrupt_id,
178 unsigned int *virq);
149int ps3_disconnect_event_irq(const struct ps3_device_id *did, 179int ps3_disconnect_event_irq(const struct ps3_device_id *did,
150 unsigned int interrupt_id, unsigned int virq); 180 unsigned int interrupt_id, unsigned int virq);
151int ps3_alloc_vuart_irq(void* virt_addr_bmp, unsigned int *virq); 181int ps3_alloc_vuart_irq(enum ps3_cpu_binding cpu, void* virt_addr_bmp,
152int ps3_free_vuart_irq(unsigned int virq);
153int ps3_alloc_spe_irq(unsigned long spe_id, unsigned int class,
154 unsigned int *virq); 182 unsigned int *virq);
183int ps3_free_vuart_irq(unsigned int virq);
184int ps3_alloc_spe_irq(enum ps3_cpu_binding cpu, unsigned long spe_id,
185 unsigned int class, unsigned int *virq);
155int ps3_free_spe_irq(unsigned int virq); 186int ps3_free_spe_irq(unsigned int virq);
187int ps3_alloc_irq(enum ps3_cpu_binding cpu, unsigned long outlet,
188 unsigned int *virq);
189int ps3_free_irq(unsigned int virq);
156 190
157/* lv1 result codes */ 191/* lv1 result codes */
158 192
@@ -247,146 +281,6 @@ static inline const char* ps3_result(int result)
247#endif 281#endif
248} 282}
249 283
250/* repository bus info */
251
252enum ps3_bus_type {
253 PS3_BUS_TYPE_SB = 4,
254 PS3_BUS_TYPE_STORAGE = 5,
255};
256
257enum ps3_dev_type {
258 PS3_DEV_TYPE_SB_GELIC = 3,
259 PS3_DEV_TYPE_SB_USB = 4,
260 PS3_DEV_TYPE_SB_GPIO = 6,
261};
262
263int ps3_repository_read_bus_str(unsigned int bus_index, const char *bus_str,
264 u64 *value);
265int ps3_repository_read_bus_id(unsigned int bus_index, unsigned int *bus_id);
266int ps3_repository_read_bus_type(unsigned int bus_index,
267 enum ps3_bus_type *bus_type);
268int ps3_repository_read_bus_num_dev(unsigned int bus_index,
269 unsigned int *num_dev);
270
271/* repository bus device info */
272
273enum ps3_interrupt_type {
274 PS3_INTERRUPT_TYPE_EVENT_PORT = 2,
275 PS3_INTERRUPT_TYPE_SB_OHCI = 3,
276 PS3_INTERRUPT_TYPE_SB_EHCI = 4,
277 PS3_INTERRUPT_TYPE_OTHER = 5,
278};
279
280enum ps3_region_type {
281 PS3_REGION_TYPE_SB_OHCI = 3,
282 PS3_REGION_TYPE_SB_EHCI = 4,
283 PS3_REGION_TYPE_SB_GPIO = 5,
284};
285
286int ps3_repository_read_dev_str(unsigned int bus_index,
287 unsigned int dev_index, const char *dev_str, u64 *value);
288int ps3_repository_read_dev_id(unsigned int bus_index, unsigned int dev_index,
289 unsigned int *dev_id);
290int ps3_repository_read_dev_type(unsigned int bus_index,
291 unsigned int dev_index, enum ps3_dev_type *dev_type);
292int ps3_repository_read_dev_intr(unsigned int bus_index,
293 unsigned int dev_index, unsigned int intr_index,
294 enum ps3_interrupt_type *intr_type, unsigned int *interrupt_id);
295int ps3_repository_read_dev_reg_type(unsigned int bus_index,
296 unsigned int dev_index, unsigned int reg_index,
297 enum ps3_region_type *reg_type);
298int ps3_repository_read_dev_reg_addr(unsigned int bus_index,
299 unsigned int dev_index, unsigned int reg_index, u64 *bus_addr,
300 u64 *len);
301int ps3_repository_read_dev_reg(unsigned int bus_index,
302 unsigned int dev_index, unsigned int reg_index,
303 enum ps3_region_type *reg_type, u64 *bus_addr, u64 *len);
304
305/* repository bus enumerators */
306
307struct ps3_repository_device {
308 unsigned int bus_index;
309 unsigned int dev_index;
310 struct ps3_device_id did;
311};
312
313int ps3_repository_find_device(enum ps3_bus_type bus_type,
314 enum ps3_dev_type dev_type,
315 const struct ps3_repository_device *start_dev,
316 struct ps3_repository_device *dev);
317static inline int ps3_repository_find_first_device(
318 enum ps3_bus_type bus_type, enum ps3_dev_type dev_type,
319 struct ps3_repository_device *dev)
320{
321 return ps3_repository_find_device(bus_type, dev_type, NULL, dev);
322}
323int ps3_repository_find_interrupt(const struct ps3_repository_device *dev,
324 enum ps3_interrupt_type intr_type, unsigned int *interrupt_id);
325int ps3_repository_find_region(const struct ps3_repository_device *dev,
326 enum ps3_region_type reg_type, u64 *bus_addr, u64 *len);
327
328/* repository block device info */
329
330int ps3_repository_read_dev_port(unsigned int bus_index,
331 unsigned int dev_index, u64 *port);
332int ps3_repository_read_dev_blk_size(unsigned int bus_index,
333 unsigned int dev_index, u64 *blk_size);
334int ps3_repository_read_dev_num_blocks(unsigned int bus_index,
335 unsigned int dev_index, u64 *num_blocks);
336int ps3_repository_read_dev_num_regions(unsigned int bus_index,
337 unsigned int dev_index, unsigned int *num_regions);
338int ps3_repository_read_dev_region_id(unsigned int bus_index,
339 unsigned int dev_index, unsigned int region_index,
340 unsigned int *region_id);
341int ps3_repository_read_dev_region_size(unsigned int bus_index,
342 unsigned int dev_index, unsigned int region_index, u64 *region_size);
343int ps3_repository_read_dev_region_start(unsigned int bus_index,
344 unsigned int dev_index, unsigned int region_index, u64 *region_start);
345
346/* repository pu and memory info */
347
348int ps3_repository_read_num_pu(unsigned int *num_pu);
349int ps3_repository_read_ppe_id(unsigned int *pu_index, unsigned int *ppe_id);
350int ps3_repository_read_rm_base(unsigned int ppe_id, u64 *rm_base);
351int ps3_repository_read_rm_size(unsigned int ppe_id, u64 *rm_size);
352int ps3_repository_read_region_total(u64 *region_total);
353int ps3_repository_read_mm_info(u64 *rm_base, u64 *rm_size,
354 u64 *region_total);
355
356/* repository pme info */
357
358int ps3_repository_read_num_be(unsigned int *num_be);
359int ps3_repository_read_be_node_id(unsigned int be_index, u64 *node_id);
360int ps3_repository_read_tb_freq(u64 node_id, u64 *tb_freq);
361int ps3_repository_read_be_tb_freq(unsigned int be_index, u64 *tb_freq);
362
363/* repository 'Other OS' area */
364
365int ps3_repository_read_boot_dat_addr(u64 *lpar_addr);
366int ps3_repository_read_boot_dat_size(unsigned int *size);
367int ps3_repository_read_boot_dat_info(u64 *lpar_addr, unsigned int *size);
368
369/* repository spu info */
370
371/**
372 * enum spu_resource_type - Type of spu resource.
373 * @spu_resource_type_shared: Logical spu is shared with other partions.
374 * @spu_resource_type_exclusive: Logical spu is not shared with other partions.
375 *
376 * Returned by ps3_repository_read_spu_resource_id().
377 */
378
379enum ps3_spu_resource_type {
380 PS3_SPU_RESOURCE_TYPE_SHARED = 0,
381 PS3_SPU_RESOURCE_TYPE_EXCLUSIVE = 0x8000000000000000UL,
382};
383
384int ps3_repository_read_num_spu_reserved(unsigned int *num_spu_reserved);
385int ps3_repository_read_num_spu_resource_id(unsigned int *num_resource_id);
386int ps3_repository_read_spu_resource_id(unsigned int res_index,
387 enum ps3_spu_resource_type* resource_type, unsigned int *resource_id);
388
389
390/* system bus routines */ 284/* system bus routines */
391 285
392enum ps3_match_id { 286enum ps3_match_id {
@@ -459,4 +353,35 @@ static inline void *ps3_system_bus_get_driver_data(
459 353
460extern struct bus_type ps3_system_bus_type; 354extern struct bus_type ps3_system_bus_type;
461 355
356/* vuart routines */
357
358struct ps3_vuart_port_priv;
359
360/**
361 * struct ps3_vuart_port_device - a device on a vuart port
362 */
363
364struct ps3_vuart_port_device {
365 enum ps3_match_id match_id;
366 struct device core;
367 struct ps3_vuart_port_priv* priv; /* private driver variables */
368
369};
370
371int ps3_vuart_port_device_register(struct ps3_vuart_port_device *dev);
372
373/* system manager */
374
375void ps3_sys_manager_restart(void);
376void ps3_sys_manager_power_off(void);
377
378struct ps3_prealloc {
379 const char *name;
380 void *address;
381 unsigned long size;
382 unsigned long align;
383};
384
385extern struct ps3_prealloc ps3fb_videomemory;
386
462#endif 387#endif
diff --git a/include/asm-powerpc/ps3av.h b/include/asm-powerpc/ps3av.h
new file mode 100644
index 000000000000..43e90ea96136
--- /dev/null
+++ b/include/asm-powerpc/ps3av.h
@@ -0,0 +1,738 @@
1/*
2 * Copyright (C) 2006 Sony Computer Entertainment Inc.
3 * Copyright 2006, 2007 Sony Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published
7 * by the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
17 */
18#ifndef _ASM_POWERPC_PS3AV_H_
19#define _ASM_POWERPC_PS3AV_H_
20
21#include <linux/mutex.h>
22
23/** command for ioctl() **/
24#define PS3AV_VERSION 0x205 /* version of ps3av command */
25
26#define PS3AV_CID_AV_INIT 0x00000001
27#define PS3AV_CID_AV_FIN 0x00000002
28#define PS3AV_CID_AV_GET_HW_CONF 0x00000003
29#define PS3AV_CID_AV_GET_MONITOR_INFO 0x00000004
30#define PS3AV_CID_AV_ENABLE_EVENT 0x00000006
31#define PS3AV_CID_AV_DISABLE_EVENT 0x00000007
32#define PS3AV_CID_AV_TV_MUTE 0x0000000a
33
34#define PS3AV_CID_AV_VIDEO_CS 0x00010001
35#define PS3AV_CID_AV_VIDEO_MUTE 0x00010002
36#define PS3AV_CID_AV_VIDEO_DISABLE_SIG 0x00010003
37#define PS3AV_CID_AV_AUDIO_PARAM 0x00020001
38#define PS3AV_CID_AV_AUDIO_MUTE 0x00020002
39#define PS3AV_CID_AV_HDMI_MODE 0x00040001
40
41#define PS3AV_CID_VIDEO_INIT 0x01000001
42#define PS3AV_CID_VIDEO_MODE 0x01000002
43#define PS3AV_CID_VIDEO_FORMAT 0x01000004
44#define PS3AV_CID_VIDEO_PITCH 0x01000005
45
46#define PS3AV_CID_AUDIO_INIT 0x02000001
47#define PS3AV_CID_AUDIO_MODE 0x02000002
48#define PS3AV_CID_AUDIO_MUTE 0x02000003
49#define PS3AV_CID_AUDIO_ACTIVE 0x02000004
50#define PS3AV_CID_AUDIO_INACTIVE 0x02000005
51#define PS3AV_CID_AUDIO_SPDIF_BIT 0x02000006
52#define PS3AV_CID_AUDIO_CTRL 0x02000007
53
54#define PS3AV_CID_EVENT_UNPLUGGED 0x10000001
55#define PS3AV_CID_EVENT_PLUGGED 0x10000002
56#define PS3AV_CID_EVENT_HDCP_DONE 0x10000003
57#define PS3AV_CID_EVENT_HDCP_FAIL 0x10000004
58#define PS3AV_CID_EVENT_HDCP_AUTH 0x10000005
59#define PS3AV_CID_EVENT_HDCP_ERROR 0x10000006
60
61#define PS3AV_CID_AVB_PARAM 0x04000001
62
63/* max backend ports */
64#define PS3AV_HDMI_MAX 2 /* HDMI_0 HDMI_1 */
65#define PS3AV_AVMULTI_MAX 1 /* AVMULTI_0 */
66#define PS3AV_AV_PORT_MAX (PS3AV_HDMI_MAX + PS3AV_AVMULTI_MAX)
67#define PS3AV_OPT_PORT_MAX 1 /* SPDIF0 */
68#define PS3AV_HEAD_MAX 2 /* HEAD_A HEAD_B */
69
70/* num of pkt for PS3AV_CID_AVB_PARAM */
71#define PS3AV_AVB_NUM_VIDEO PS3AV_HEAD_MAX
72#define PS3AV_AVB_NUM_AUDIO 0 /* not supported */
73#define PS3AV_AVB_NUM_AV_VIDEO PS3AV_AV_PORT_MAX
74#define PS3AV_AVB_NUM_AV_AUDIO PS3AV_HDMI_MAX
75
76#define PS3AV_MUTE_PORT_MAX 1 /* num of ports in mute pkt */
77
78/* event_bit */
79#define PS3AV_CMD_EVENT_BIT_UNPLUGGED (1 << 0)
80#define PS3AV_CMD_EVENT_BIT_PLUGGED (1 << 1)
81#define PS3AV_CMD_EVENT_BIT_HDCP_DONE (1 << 2)
82#define PS3AV_CMD_EVENT_BIT_HDCP_FAIL (1 << 3)
83#define PS3AV_CMD_EVENT_BIT_HDCP_REAUTH (1 << 4)
84#define PS3AV_CMD_EVENT_BIT_HDCP_TOPOLOGY (1 << 5)
85
86/* common params */
87/* mute */
88#define PS3AV_CMD_MUTE_OFF 0x0000
89#define PS3AV_CMD_MUTE_ON 0x0001
90/* avport */
91#define PS3AV_CMD_AVPORT_HDMI_0 0x0000
92#define PS3AV_CMD_AVPORT_HDMI_1 0x0001
93#define PS3AV_CMD_AVPORT_AVMULTI_0 0x0010
94#define PS3AV_CMD_AVPORT_SPDIF_0 0x0020
95#define PS3AV_CMD_AVPORT_SPDIF_1 0x0021
96
97/* for av backend */
98/* av_mclk */
99#define PS3AV_CMD_AV_MCLK_128 0x0000
100#define PS3AV_CMD_AV_MCLK_256 0x0001
101#define PS3AV_CMD_AV_MCLK_512 0x0003
102/* av_inputlen */
103#define PS3AV_CMD_AV_INPUTLEN_16 0x02
104#define PS3AV_CMD_AV_INPUTLEN_20 0x0a
105#define PS3AV_CMD_AV_INPUTLEN_24 0x0b
106/* alayout */
107#define PS3AV_CMD_AV_LAYOUT_32 (1 << 0)
108#define PS3AV_CMD_AV_LAYOUT_44 (1 << 1)
109#define PS3AV_CMD_AV_LAYOUT_48 (1 << 2)
110#define PS3AV_CMD_AV_LAYOUT_88 (1 << 3)
111#define PS3AV_CMD_AV_LAYOUT_96 (1 << 4)
112#define PS3AV_CMD_AV_LAYOUT_176 (1 << 5)
113#define PS3AV_CMD_AV_LAYOUT_192 (1 << 6)
114/* hdmi_mode */
115#define PS3AV_CMD_AV_HDMI_MODE_NORMAL 0xff
116#define PS3AV_CMD_AV_HDMI_HDCP_OFF 0x01
117#define PS3AV_CMD_AV_HDMI_EDID_PASS 0x80
118#define PS3AV_CMD_AV_HDMI_DVI 0x40
119
120/* for video module */
121/* video_head */
122#define PS3AV_CMD_VIDEO_HEAD_A 0x0000
123#define PS3AV_CMD_VIDEO_HEAD_B 0x0001
124/* video_cs_out video_cs_in */
125#define PS3AV_CMD_VIDEO_CS_NONE 0x0000
126#define PS3AV_CMD_VIDEO_CS_RGB_8 0x0001
127#define PS3AV_CMD_VIDEO_CS_YUV444_8 0x0002
128#define PS3AV_CMD_VIDEO_CS_YUV422_8 0x0003
129#define PS3AV_CMD_VIDEO_CS_XVYCC_8 0x0004
130#define PS3AV_CMD_VIDEO_CS_RGB_10 0x0005
131#define PS3AV_CMD_VIDEO_CS_YUV444_10 0x0006
132#define PS3AV_CMD_VIDEO_CS_YUV422_10 0x0007
133#define PS3AV_CMD_VIDEO_CS_XVYCC_10 0x0008
134#define PS3AV_CMD_VIDEO_CS_RGB_12 0x0009
135#define PS3AV_CMD_VIDEO_CS_YUV444_12 0x000a
136#define PS3AV_CMD_VIDEO_CS_YUV422_12 0x000b
137#define PS3AV_CMD_VIDEO_CS_XVYCC_12 0x000c
138/* video_vid */
139#define PS3AV_CMD_VIDEO_VID_NONE 0x0000
140#define PS3AV_CMD_VIDEO_VID_480I 0x0001
141#define PS3AV_CMD_VIDEO_VID_576I 0x0003
142#define PS3AV_CMD_VIDEO_VID_480P 0x0005
143#define PS3AV_CMD_VIDEO_VID_576P 0x0006
144#define PS3AV_CMD_VIDEO_VID_1080I_60HZ 0x0007
145#define PS3AV_CMD_VIDEO_VID_1080I_50HZ 0x0008
146#define PS3AV_CMD_VIDEO_VID_720P_60HZ 0x0009
147#define PS3AV_CMD_VIDEO_VID_720P_50HZ 0x000a
148#define PS3AV_CMD_VIDEO_VID_1080P_60HZ 0x000b
149#define PS3AV_CMD_VIDEO_VID_1080P_50HZ 0x000c
150#define PS3AV_CMD_VIDEO_VID_WXGA 0x000d
151#define PS3AV_CMD_VIDEO_VID_SXGA 0x000e
152#define PS3AV_CMD_VIDEO_VID_WUXGA 0x000f
153#define PS3AV_CMD_VIDEO_VID_480I_A 0x0010
154/* video_format */
155#define PS3AV_CMD_VIDEO_FORMAT_BLACK 0x0000
156#define PS3AV_CMD_VIDEO_FORMAT_ARGB_8BIT 0x0007
157/* video_order */
158#define PS3AV_CMD_VIDEO_ORDER_RGB 0x0000
159#define PS3AV_CMD_VIDEO_ORDER_BGR 0x0001
160/* video_fmt */
161#define PS3AV_CMD_VIDEO_FMT_X8R8G8B8 0x0000
162/* video_out_format */
163#define PS3AV_CMD_VIDEO_OUT_FORMAT_RGB_12BIT 0x0000
164/* video_sync */
165#define PS3AV_CMD_VIDEO_SYNC_VSYNC 0x0001
166#define PS3AV_CMD_VIDEO_SYNC_CSYNC 0x0004
167#define PS3AV_CMD_VIDEO_SYNC_HSYNC 0x0010
168
169/* for audio module */
170/* num_of_ch */
171#define PS3AV_CMD_AUDIO_NUM_OF_CH_2 0x0000
172#define PS3AV_CMD_AUDIO_NUM_OF_CH_3 0x0001
173#define PS3AV_CMD_AUDIO_NUM_OF_CH_4 0x0002
174#define PS3AV_CMD_AUDIO_NUM_OF_CH_5 0x0003
175#define PS3AV_CMD_AUDIO_NUM_OF_CH_6 0x0004
176#define PS3AV_CMD_AUDIO_NUM_OF_CH_7 0x0005
177#define PS3AV_CMD_AUDIO_NUM_OF_CH_8 0x0006
178/* audio_fs */
179#define PS3AV_CMD_AUDIO_FS_32K 0x0001
180#define PS3AV_CMD_AUDIO_FS_44K 0x0002
181#define PS3AV_CMD_AUDIO_FS_48K 0x0003
182#define PS3AV_CMD_AUDIO_FS_88K 0x0004
183#define PS3AV_CMD_AUDIO_FS_96K 0x0005
184#define PS3AV_CMD_AUDIO_FS_176K 0x0006
185#define PS3AV_CMD_AUDIO_FS_192K 0x0007
186/* audio_word_bits */
187#define PS3AV_CMD_AUDIO_WORD_BITS_16 0x0001
188#define PS3AV_CMD_AUDIO_WORD_BITS_20 0x0002
189#define PS3AV_CMD_AUDIO_WORD_BITS_24 0x0003
190/* audio_format */
191#define PS3AV_CMD_AUDIO_FORMAT_PCM 0x0001
192#define PS3AV_CMD_AUDIO_FORMAT_BITSTREAM 0x00ff
193/* audio_source */
194#define PS3AV_CMD_AUDIO_SOURCE_SERIAL 0x0000
195#define PS3AV_CMD_AUDIO_SOURCE_SPDIF 0x0001
196/* audio_swap */
197#define PS3AV_CMD_AUDIO_SWAP_0 0x0000
198#define PS3AV_CMD_AUDIO_SWAP_1 0x0000
199/* audio_map */
200#define PS3AV_CMD_AUDIO_MAP_OUTPUT_0 0x0000
201#define PS3AV_CMD_AUDIO_MAP_OUTPUT_1 0x0001
202#define PS3AV_CMD_AUDIO_MAP_OUTPUT_2 0x0002
203#define PS3AV_CMD_AUDIO_MAP_OUTPUT_3 0x0003
204/* audio_layout */
205#define PS3AV_CMD_AUDIO_LAYOUT_2CH 0x0000
206#define PS3AV_CMD_AUDIO_LAYOUT_6CH 0x000b /* LREClr */
207#define PS3AV_CMD_AUDIO_LAYOUT_8CH 0x001f /* LREClrXY */
208/* audio_downmix */
209#define PS3AV_CMD_AUDIO_DOWNMIX_PERMITTED 0x0000
210#define PS3AV_CMD_AUDIO_DOWNMIX_PROHIBITED 0x0001
211
212/* audio_port */
213#define PS3AV_CMD_AUDIO_PORT_HDMI_0 ( 1 << 0 )
214#define PS3AV_CMD_AUDIO_PORT_HDMI_1 ( 1 << 1 )
215#define PS3AV_CMD_AUDIO_PORT_AVMULTI_0 ( 1 << 10 )
216#define PS3AV_CMD_AUDIO_PORT_SPDIF_0 ( 1 << 20 )
217#define PS3AV_CMD_AUDIO_PORT_SPDIF_1 ( 1 << 21 )
218
219/* audio_ctrl_id */
220#define PS3AV_CMD_AUDIO_CTRL_ID_DAC_RESET 0x0000
221#define PS3AV_CMD_AUDIO_CTRL_ID_DAC_DE_EMPHASIS 0x0001
222#define PS3AV_CMD_AUDIO_CTRL_ID_AVCLK 0x0002
223/* audio_ctrl_data[0] reset */
224#define PS3AV_CMD_AUDIO_CTRL_RESET_NEGATE 0x0000
225#define PS3AV_CMD_AUDIO_CTRL_RESET_ASSERT 0x0001
226/* audio_ctrl_data[0] de-emphasis */
227#define PS3AV_CMD_AUDIO_CTRL_DE_EMPHASIS_OFF 0x0000
228#define PS3AV_CMD_AUDIO_CTRL_DE_EMPHASIS_ON 0x0001
229/* audio_ctrl_data[0] avclk */
230#define PS3AV_CMD_AUDIO_CTRL_AVCLK_22 0x0000
231#define PS3AV_CMD_AUDIO_CTRL_AVCLK_18 0x0001
232
233/* av_vid */
234/* do not use these params directly, use vid_video2av */
235#define PS3AV_CMD_AV_VID_480I 0x0000
236#define PS3AV_CMD_AV_VID_480P 0x0001
237#define PS3AV_CMD_AV_VID_720P_60HZ 0x0002
238#define PS3AV_CMD_AV_VID_1080I_60HZ 0x0003
239#define PS3AV_CMD_AV_VID_1080P_60HZ 0x0004
240#define PS3AV_CMD_AV_VID_576I 0x0005
241#define PS3AV_CMD_AV_VID_576P 0x0006
242#define PS3AV_CMD_AV_VID_720P_50HZ 0x0007
243#define PS3AV_CMD_AV_VID_1080I_50HZ 0x0008
244#define PS3AV_CMD_AV_VID_1080P_50HZ 0x0009
245#define PS3AV_CMD_AV_VID_WXGA 0x000a
246#define PS3AV_CMD_AV_VID_SXGA 0x000b
247#define PS3AV_CMD_AV_VID_WUXGA 0x000c
248/* av_cs_out av_cs_in */
249/* use cs_video2av() */
250#define PS3AV_CMD_AV_CS_RGB_8 0x0000
251#define PS3AV_CMD_AV_CS_YUV444_8 0x0001
252#define PS3AV_CMD_AV_CS_YUV422_8 0x0002
253#define PS3AV_CMD_AV_CS_XVYCC_8 0x0003
254#define PS3AV_CMD_AV_CS_RGB_10 0x0004
255#define PS3AV_CMD_AV_CS_YUV444_10 0x0005
256#define PS3AV_CMD_AV_CS_YUV422_10 0x0006
257#define PS3AV_CMD_AV_CS_XVYCC_10 0x0007
258#define PS3AV_CMD_AV_CS_RGB_12 0x0008
259#define PS3AV_CMD_AV_CS_YUV444_12 0x0009
260#define PS3AV_CMD_AV_CS_YUV422_12 0x000a
261#define PS3AV_CMD_AV_CS_XVYCC_12 0x000b
262#define PS3AV_CMD_AV_CS_8 0x0000
263#define PS3AV_CMD_AV_CS_10 0x0001
264#define PS3AV_CMD_AV_CS_12 0x0002
265/* dither */
266#define PS3AV_CMD_AV_DITHER_OFF 0x0000
267#define PS3AV_CMD_AV_DITHER_ON 0x0001
268#define PS3AV_CMD_AV_DITHER_8BIT 0x0000
269#define PS3AV_CMD_AV_DITHER_10BIT 0x0002
270#define PS3AV_CMD_AV_DITHER_12BIT 0x0004
271/* super_white */
272#define PS3AV_CMD_AV_SUPER_WHITE_OFF 0x0000
273#define PS3AV_CMD_AV_SUPER_WHITE_ON 0x0001
274/* aspect */
275#define PS3AV_CMD_AV_ASPECT_16_9 0x0000
276#define PS3AV_CMD_AV_ASPECT_4_3 0x0001
277/* video_cs_cnv() */
278#define PS3AV_CMD_VIDEO_CS_RGB 0x0001
279#define PS3AV_CMD_VIDEO_CS_YUV422 0x0002
280#define PS3AV_CMD_VIDEO_CS_YUV444 0x0003
281
282/* for automode */
283#define PS3AV_RESBIT_720x480P 0x0003 /* 0x0001 | 0x0002 */
284#define PS3AV_RESBIT_720x576P 0x0003 /* 0x0001 | 0x0002 */
285#define PS3AV_RESBIT_1280x720P 0x0004
286#define PS3AV_RESBIT_1920x1080I 0x0008
287#define PS3AV_RESBIT_1920x1080P 0x4000
288#define PS3AV_RES_MASK_60 (PS3AV_RESBIT_720x480P \
289 | PS3AV_RESBIT_1280x720P \
290 | PS3AV_RESBIT_1920x1080I \
291 | PS3AV_RESBIT_1920x1080P)
292#define PS3AV_RES_MASK_50 (PS3AV_RESBIT_720x576P \
293 | PS3AV_RESBIT_1280x720P \
294 | PS3AV_RESBIT_1920x1080I \
295 | PS3AV_RESBIT_1920x1080P)
296
297#define PS3AV_MONITOR_TYPE_HDMI 1 /* HDMI */
298#define PS3AV_MONITOR_TYPE_DVI 2 /* DVI */
299#define PS3AV_DEFAULT_HDMI_VID_REG_60 PS3AV_CMD_VIDEO_VID_480P
300#define PS3AV_DEFAULT_AVMULTI_VID_REG_60 PS3AV_CMD_VIDEO_VID_480I
301#define PS3AV_DEFAULT_HDMI_VID_REG_50 PS3AV_CMD_VIDEO_VID_576P
302#define PS3AV_DEFAULT_AVMULTI_VID_REG_50 PS3AV_CMD_VIDEO_VID_576I
303#define PS3AV_DEFAULT_DVI_VID PS3AV_CMD_VIDEO_VID_480P
304
305#define PS3AV_REGION_60 0x01
306#define PS3AV_REGION_50 0x02
307#define PS3AV_REGION_RGB 0x10
308
309#define get_status(buf) (((__u32 *)buf)[2])
310#define PS3AV_HDR_SIZE 4 /* version + size */
311
312/* for video mode */
313#define PS3AV_MODE_MASK 0x000F
314#define PS3AV_MODE_HDCP_OFF 0x1000 /* Retail PS3 product doesn't support this */
315#define PS3AV_MODE_DITHER 0x0800
316#define PS3AV_MODE_FULL 0x0080
317#define PS3AV_MODE_DVI 0x0040
318#define PS3AV_MODE_RGB 0x0020
319
320
321/** command packet structure **/
322struct ps3av_send_hdr {
323 u16 version;
324 u16 size; /* size of command packet */
325 u32 cid; /* command id */
326};
327
328struct ps3av_reply_hdr {
329 u16 version;
330 u16 size;
331 u32 cid;
332 u32 status;
333};
334
335/* backend: initialization */
336struct ps3av_pkt_av_init {
337 struct ps3av_send_hdr send_hdr;
338 u32 event_bit;
339};
340
341/* backend: finalize */
342struct ps3av_pkt_av_fin {
343 struct ps3av_send_hdr send_hdr;
344 /* recv */
345 u32 reserved;
346};
347
348/* backend: get port */
349struct ps3av_pkt_av_get_hw_conf {
350 struct ps3av_send_hdr send_hdr;
351 /* recv */
352 u32 status;
353 u16 num_of_hdmi; /* out: number of hdmi */
354 u16 num_of_avmulti; /* out: number of avmulti */
355 u16 num_of_spdif; /* out: number of hdmi */
356 u16 reserved;
357};
358
359/* backend: get monitor info */
360struct ps3av_info_resolution {
361 u32 res_bits;
362 u32 native;
363};
364
365struct ps3av_info_cs {
366 u8 rgb;
367 u8 yuv444;
368 u8 yuv422;
369 u8 reserved;
370};
371
372struct ps3av_info_color {
373 u16 red_x;
374 u16 red_y;
375 u16 green_x;
376 u16 green_y;
377 u16 blue_x;
378 u16 blue_y;
379 u16 white_x;
380 u16 white_y;
381 u32 gamma;
382};
383
384struct ps3av_info_audio {
385 u8 type;
386 u8 max_num_of_ch;
387 u8 fs;
388 u8 sbit;
389};
390
391struct ps3av_info_monitor {
392 u8 avport;
393 u8 monitor_id[10];
394 u8 monitor_type;
395 u8 monitor_name[16];
396 struct ps3av_info_resolution res_60;
397 struct ps3av_info_resolution res_50;
398 struct ps3av_info_resolution res_other;
399 struct ps3av_info_resolution res_vesa;
400 struct ps3av_info_cs cs;
401 struct ps3av_info_color color;
402 u8 supported_ai;
403 u8 speaker_info;
404 u8 num_of_audio_block;
405 struct ps3av_info_audio audio[0]; /* 0 or more audio blocks */
406 u8 reserved[169];
407} __attribute__ ((packed));
408
409struct ps3av_pkt_av_get_monitor_info {
410 struct ps3av_send_hdr send_hdr;
411 u16 avport; /* in: avport */
412 u16 reserved;
413 /* recv */
414 struct ps3av_info_monitor info; /* out: monitor info */
415};
416
417/* backend: enable/disable event */
418struct ps3av_pkt_av_event {
419 struct ps3av_send_hdr send_hdr;
420 u32 event_bit; /* in */
421};
422
423/* backend: video cs param */
424struct ps3av_pkt_av_video_cs {
425 struct ps3av_send_hdr send_hdr;
426 u16 avport; /* in: avport */
427 u16 av_vid; /* in: video resolution */
428 u16 av_cs_out; /* in: output color space */
429 u16 av_cs_in; /* in: input color space */
430 u8 dither; /* in: dither bit length */
431 u8 bitlen_out; /* in: bit length */
432 u8 super_white; /* in: super white */
433 u8 aspect; /* in: aspect ratio */
434};
435
436/* backend: video mute */
437struct ps3av_av_mute {
438 u16 avport; /* in: avport */
439 u16 mute; /* in: mute on/off */
440};
441
442struct ps3av_pkt_av_video_mute {
443 struct ps3av_send_hdr send_hdr;
444 struct ps3av_av_mute mute[PS3AV_MUTE_PORT_MAX];
445};
446
447/* backend: video disable signal */
448struct ps3av_pkt_av_video_disable_sig {
449 struct ps3av_send_hdr send_hdr;
450 u16 avport; /* in: avport */
451 u16 reserved;
452};
453
454/* backend: audio param */
455struct ps3av_audio_info_frame {
456 struct pb1_bit {
457 u8 ct:4;
458 u8 rsv:1;
459 u8 cc:3;
460 } pb1;
461 struct pb2_bit {
462 u8 rsv:3;
463 u8 sf:3;
464 u8 ss:2;
465 } pb2;
466 u8 pb3;
467 u8 pb4;
468 struct pb5_bit {
469 u8 dm:1;
470 u8 lsv:4;
471 u8 rsv:3;
472 } pb5;
473};
474
475struct ps3av_pkt_av_audio_param {
476 struct ps3av_send_hdr send_hdr;
477 u16 avport; /* in: avport */
478 u16 reserved;
479 u8 mclk; /* in: audio mclk */
480 u8 ns[3]; /* in: audio ns val */
481 u8 enable; /* in: audio enable */
482 u8 swaplr; /* in: audio swap */
483 u8 fifomap; /* in: audio fifomap */
484 u8 inputctrl; /* in: audio input ctrl */
485 u8 inputlen; /* in: sample bit size */
486 u8 layout; /* in: speaker layout param */
487 struct ps3av_audio_info_frame info; /* in: info */
488 u8 chstat[5]; /* in: ch stat */
489};
490
491/* backend: audio_mute */
492struct ps3av_pkt_av_audio_mute {
493 struct ps3av_send_hdr send_hdr;
494 struct ps3av_av_mute mute[PS3AV_MUTE_PORT_MAX];
495};
496
497/* backend: hdmi_mode */
498struct ps3av_pkt_av_hdmi_mode {
499 struct ps3av_send_hdr send_hdr;
500 u8 mode; /* in: hdmi_mode */
501 u8 reserved0;
502 u8 reserved1;
503 u8 reserved2;
504};
505
506/* backend: tv_mute */
507struct ps3av_pkt_av_tv_mute {
508 struct ps3av_send_hdr send_hdr;
509 u16 avport; /* in: avport HDMI only */
510 u16 mute; /* in: mute */
511};
512
513/* video: initialize */
514struct ps3av_pkt_video_init {
515 struct ps3av_send_hdr send_hdr;
516 /* recv */
517 u32 reserved;
518};
519
520/* video: mode setting */
521struct ps3av_pkt_video_mode {
522 struct ps3av_send_hdr send_hdr;
523 u32 video_head; /* in: head */
524 u32 reserved;
525 u32 video_vid; /* in: video resolution */
526 u16 reserved1;
527 u16 width; /* in: width in pixel */
528 u16 reserved2;
529 u16 height; /* in: height in pixel */
530 u32 pitch; /* in: line size in byte */
531 u32 video_out_format; /* in: out format */
532 u32 video_format; /* in: input frame buffer format */
533 u8 reserved3;
534 u8 reserved4;
535 u16 video_order; /* in: input RGB order */
536 u32 reserved5;
537};
538
539/* video: format */
540struct ps3av_pkt_video_format {
541 struct ps3av_send_hdr send_hdr;
542 u32 video_head; /* in: head */
543 u32 video_format; /* in: frame buffer format */
544 u16 reserved;
545 u16 video_order; /* in: input RGB order */
546};
547
548/* video: pitch */
549struct ps3av_pkt_video_pitch {
550 u16 version;
551 u16 size; /* size of command packet */
552 u32 cid; /* command id */
553 u32 video_head; /* in: head */
554 u32 pitch; /* in: line size in byte */
555};
556
557/* audio: initialize */
558struct ps3av_pkt_audio_init {
559 struct ps3av_send_hdr send_hdr;
560 /* recv */
561 u32 reserved;
562};
563
564/* audio: mode setting */
565struct ps3av_pkt_audio_mode {
566 struct ps3av_send_hdr send_hdr;
567 u8 avport; /* in: avport */
568 u8 reserved0[3];
569 u32 mask; /* in: mask */
570 u32 audio_num_of_ch; /* in: number of ch */
571 u32 audio_fs; /* in: sampling freq */
572 u32 audio_word_bits; /* in: sample bit size */
573 u32 audio_format; /* in: audio output format */
574 u32 audio_source; /* in: audio source */
575 u8 audio_enable[4]; /* in: audio enable */
576 u8 audio_swap[4]; /* in: audio swap */
577 u8 audio_map[4]; /* in: audio map */
578 u32 audio_layout; /* in: speaker layout */
579 u32 audio_downmix; /* in: audio downmix permission */
580 u32 audio_downmix_level;
581 u8 audio_cs_info[8]; /* in: IEC channel status */
582};
583
584/* audio: mute */
585struct ps3av_audio_mute {
586 u8 avport; /* in: opt_port optical */
587 u8 reserved[3];
588 u32 mute; /* in: mute */
589};
590
591struct ps3av_pkt_audio_mute {
592 struct ps3av_send_hdr send_hdr;
593 struct ps3av_audio_mute mute[PS3AV_OPT_PORT_MAX];
594};
595
596/* audio: active/inactive */
597struct ps3av_pkt_audio_active {
598 struct ps3av_send_hdr send_hdr;
599 u32 audio_port; /* in: audio active/inactive port */
600};
601
602/* audio: SPDIF user bit */
603struct ps3av_pkt_audio_spdif_bit {
604 u16 version;
605 u16 size; /* size of command packet */
606 u32 cid; /* command id */
607 u8 avport; /* in: avport SPDIF only */
608 u8 reserved[3];
609 u32 audio_port; /* in: SPDIF only */
610 u32 spdif_bit_data[12]; /* in: user bit data */
611};
612
613/* audio: audio control */
614struct ps3av_pkt_audio_ctrl {
615 u16 version;
616 u16 size; /* size of command packet */
617 u32 cid; /* command id */
618 u32 audio_ctrl_id; /* in: control id */
619 u32 audio_ctrl_data[4]; /* in: control data */
620};
621
622/* avb:param */
623#define PS3AV_PKT_AVB_PARAM_MAX_BUF_SIZE \
624 (PS3AV_AVB_NUM_VIDEO*sizeof(struct ps3av_pkt_video_mode) + \
625 PS3AV_AVB_NUM_AUDIO*sizeof(struct ps3av_pkt_audio_mode) + \
626 PS3AV_AVB_NUM_AV_VIDEO*sizeof(struct ps3av_pkt_av_video_cs) + \
627 PS3AV_AVB_NUM_AV_AUDIO*sizeof(struct ps3av_pkt_av_audio_param))
628
629struct ps3av_pkt_avb_param {
630 struct ps3av_send_hdr send_hdr;
631 u16 num_of_video_pkt;
632 u16 num_of_audio_pkt;
633 u16 num_of_av_video_pkt;
634 u16 num_of_av_audio_pkt;
635 /*
636 * The actual buffer layout depends on the fields above:
637 *
638 * struct ps3av_pkt_video_mode video[num_of_video_pkt];
639 * struct ps3av_pkt_audio_mode audio[num_of_audio_pkt];
640 * struct ps3av_pkt_av_video_cs av_video[num_of_av_video_pkt];
641 * struct ps3av_pkt_av_audio_param av_audio[num_of_av_audio_pkt];
642 */
643 u8 buf[PS3AV_PKT_AVB_PARAM_MAX_BUF_SIZE];
644};
645
646struct ps3av {
647 int available;
648 struct semaphore sem;
649 struct semaphore ping;
650 struct semaphore pong;
651 struct mutex mutex;
652 int open_count;
653 struct ps3_vuart_port_device *dev;
654
655 int region;
656 struct ps3av_pkt_av_get_hw_conf av_hw_conf;
657 u32 av_port[PS3AV_AV_PORT_MAX + PS3AV_OPT_PORT_MAX];
658 u32 opt_port[PS3AV_OPT_PORT_MAX];
659 u32 head[PS3AV_HEAD_MAX];
660 u32 audio_port;
661 int ps3av_mode;
662 int ps3av_mode_old;
663};
664
665/** command status **/
666#define PS3AV_STATUS_SUCCESS 0x0000 /* success */
667#define PS3AV_STATUS_RECEIVE_VUART_ERROR 0x0001 /* receive vuart error */
668#define PS3AV_STATUS_SYSCON_COMMUNICATE_FAIL 0x0002 /* syscon communication error */
669#define PS3AV_STATUS_INVALID_COMMAND 0x0003 /* obsolete invalid CID */
670#define PS3AV_STATUS_INVALID_PORT 0x0004 /* invalid port number */
671#define PS3AV_STATUS_INVALID_VID 0x0005 /* invalid video format */
672#define PS3AV_STATUS_INVALID_COLOR_SPACE 0x0006 /* invalid video colose space */
673#define PS3AV_STATUS_INVALID_FS 0x0007 /* invalid audio sampling freq */
674#define PS3AV_STATUS_INVALID_AUDIO_CH 0x0008 /* invalid audio channel number */
675#define PS3AV_STATUS_UNSUPPORTED_VERSION 0x0009 /* version mismatch */
676#define PS3AV_STATUS_INVALID_SAMPLE_SIZE 0x000a /* invalid audio sample bit size */
677#define PS3AV_STATUS_FAILURE 0x000b /* other failures */
678#define PS3AV_STATUS_UNSUPPORTED_COMMAND 0x000c /* unsupported cid */
679#define PS3AV_STATUS_BUFFER_OVERFLOW 0x000d /* write buffer overflow */
680#define PS3AV_STATUS_INVALID_VIDEO_PARAM 0x000e /* invalid video param */
681#define PS3AV_STATUS_NO_SEL 0x000f /* not exist selector */
682#define PS3AV_STATUS_INVALID_AV_PARAM 0x0010 /* invalid backend param */
683#define PS3AV_STATUS_INVALID_AUDIO_PARAM 0x0011 /* invalid audio param */
684#define PS3AV_STATUS_UNSUPPORTED_HDMI_MODE 0x0012 /* unsupported hdmi mode */
685#define PS3AV_STATUS_NO_SYNC_HEAD 0x0013 /* sync head failed */
686
687extern void ps3av_set_hdr(u32, u16, struct ps3av_send_hdr *);
688extern int ps3av_do_pkt(u32, u16, size_t, struct ps3av_send_hdr *);
689
690extern int ps3av_cmd_init(void);
691extern int ps3av_cmd_fin(void);
692extern int ps3av_cmd_av_video_mute(int, u32 *, u32);
693extern int ps3av_cmd_av_video_disable_sig(u32);
694extern int ps3av_cmd_av_tv_mute(u32, u32);
695extern int ps3av_cmd_enable_event(void);
696extern int ps3av_cmd_av_hdmi_mode(u8);
697extern u32 ps3av_cmd_set_av_video_cs(void *, u32, int, int, int, u32);
698extern u32 ps3av_cmd_set_video_mode(void *, u32, int, int, u32);
699extern int ps3av_cmd_video_format_black(u32, u32, u32);
700extern int ps3av_cmd_av_audio_mute(int, u32 *, u32);
701extern u32 ps3av_cmd_set_av_audio_param(void *, u32,
702 const struct ps3av_pkt_audio_mode *,
703 u32);
704extern void ps3av_cmd_set_audio_mode(struct ps3av_pkt_audio_mode *, u32, u32,
705 u32, u32, u32, u32);
706extern int ps3av_cmd_audio_mode(struct ps3av_pkt_audio_mode *);
707extern int ps3av_cmd_audio_mute(int, u32 *, u32);
708extern int ps3av_cmd_audio_active(int, u32);
709extern int ps3av_cmd_avb_param(struct ps3av_pkt_avb_param *, u32);
710extern int ps3av_cmd_av_get_hw_conf(struct ps3av_pkt_av_get_hw_conf *);
711#ifdef PS3AV_DEBUG
712extern void ps3av_cmd_av_hw_conf_dump(const struct ps3av_pkt_av_get_hw_conf *);
713extern void ps3av_cmd_av_monitor_info_dump(const struct ps3av_pkt_av_get_monitor_info *);
714#else
715static inline void ps3av_cmd_av_hw_conf_dump(const struct ps3av_pkt_av_get_hw_conf *hw_conf) {}
716static inline void ps3av_cmd_av_monitor_info_dump(const struct ps3av_pkt_av_get_monitor_info *monitor_info) {}
717#endif
718extern int ps3av_cmd_video_get_monitor_info(struct ps3av_pkt_av_get_monitor_info *,
719 u32);
720
721extern int ps3av_vuart_write(struct ps3_vuart_port_device *dev,
722 const void *buf, unsigned long size);
723extern int ps3av_vuart_read(struct ps3_vuart_port_device *dev, void *buf,
724 unsigned long size, int timeout);
725
726extern int ps3av_set_video_mode(u32, int);
727extern int ps3av_set_audio_mode(u32, u32, u32, u32, u32);
728extern int ps3av_set_mode(u32, int);
729extern int ps3av_get_mode(void);
730extern int ps3av_get_scanmode(int);
731extern int ps3av_get_refresh_rate(int);
732extern int ps3av_video_mode2res(u32, u32 *, u32 *);
733extern int ps3av_video_mute(int);
734extern int ps3av_audio_mute(int);
735extern int ps3av_dev_open(void);
736extern int ps3av_dev_close(void);
737
738#endif /* _ASM_POWERPC_PS3AV_H_ */
diff --git a/include/asm-powerpc/ps3fb.h b/include/asm-powerpc/ps3fb.h
new file mode 100644
index 000000000000..ad81cf431964
--- /dev/null
+++ b/include/asm-powerpc/ps3fb.h
@@ -0,0 +1,56 @@
1/*
2 * Copyright (C) 2006 Sony Computer Entertainment Inc.
3 * Copyright 2006, 2007 Sony Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published
7 * by the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
17 */
18
19#ifndef _ASM_POWERPC_PS3FB_H_
20#define _ASM_POWERPC_PS3FB_H_
21
22#include <linux/ioctl.h>
23
24/* ioctl */
25#define PS3FB_IOCTL_SETMODE _IOW('r', 1, int) /* set video mode */
26#define PS3FB_IOCTL_GETMODE _IOR('r', 2, int) /* get video mode */
27#define PS3FB_IOCTL_SCREENINFO _IOR('r', 3, int) /* get screen info */
28#define PS3FB_IOCTL_ON _IO('r', 4) /* use IOCTL_FSEL */
29#define PS3FB_IOCTL_OFF _IO('r', 5) /* return to normal-flip */
30#define PS3FB_IOCTL_FSEL _IOW('r', 6, int) /* blit and flip request */
31
32#ifndef FBIO_WAITFORVSYNC
33#define FBIO_WAITFORVSYNC _IOW('F', 0x20, __u32) /* wait for vsync */
34#endif
35
36struct ps3fb_ioctl_res {
37 __u32 xres; /* frame buffer x_size */
38 __u32 yres; /* frame buffer y_size */
39 __u32 xoff; /* margine x */
40 __u32 yoff; /* margine y */
41 __u32 num_frames; /* num of frame buffers */
42};
43
44#ifdef __KERNEL__
45
46#ifdef CONFIG_FB_PS3
47extern void ps3fb_flip_ctl(int on);
48extern void ps3fb_cleanup(void);
49#else
50static inline void ps3fb_flip_ctl(int on) {}
51static inline void ps3fb_cleanup(void) {}
52#endif
53
54#endif /* __KERNEL__ */
55
56#endif /* _ASM_POWERPC_PS3FB_H_ */
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index a3631b15754c..749c7f953b58 100644
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -166,6 +166,7 @@
166#define SPRN_TBWU 0x11D /* Time Base Upper Register (super, R/W) */ 166#define SPRN_TBWU 0x11D /* Time Base Upper Register (super, R/W) */
167#define SPRN_SPURR 0x134 /* Scaled PURR */ 167#define SPRN_SPURR 0x134 /* Scaled PURR */
168#define SPRN_HIOR 0x137 /* 970 Hypervisor interrupt offset */ 168#define SPRN_HIOR 0x137 /* 970 Hypervisor interrupt offset */
169#define SPRN_LPCR 0x13E /* LPAR Control Register */
169#define SPRN_DBAT0L 0x219 /* Data BAT 0 Lower Register */ 170#define SPRN_DBAT0L 0x219 /* Data BAT 0 Lower Register */
170#define SPRN_DBAT0U 0x218 /* Data BAT 0 Upper Register */ 171#define SPRN_DBAT0U 0x218 /* Data BAT 0 Upper Register */
171#define SPRN_DBAT1L 0x21B /* Data BAT 1 Lower Register */ 172#define SPRN_DBAT1L 0x21B /* Data BAT 1 Lower Register */
@@ -391,6 +392,12 @@
391#define SPRN_HSRR0 0x13A /* Save/Restore Register 0 */ 392#define SPRN_HSRR0 0x13A /* Save/Restore Register 0 */
392#define SPRN_HSRR1 0x13B /* Save/Restore Register 1 */ 393#define SPRN_HSRR1 0x13B /* Save/Restore Register 1 */
393 394
395#define SPRN_TBCTL 0x35f /* PA6T Timebase control register */
396#define TBCTL_FREEZE 0x0000000000000000ull /* Freeze all tbs */
397#define TBCTL_RESTART 0x0000000100000000ull /* Restart all tbs */
398#define TBCTL_UPDATE_UPPER 0x0000000200000000ull /* Set upper 32 bits */
399#define TBCTL_UPDATE_LOWER 0x0000000300000000ull /* Set lower 32 bits */
400
394#ifndef SPRN_SVR 401#ifndef SPRN_SVR
395#define SPRN_SVR 0x11E /* System Version Register */ 402#define SPRN_SVR 0x11E /* System Version Register */
396#endif 403#endif
@@ -462,6 +469,69 @@
462#define SPRN_SIAR 780 469#define SPRN_SIAR 780
463#define SPRN_SDAR 781 470#define SPRN_SDAR 781
464 471
472#define SPRN_PA6T_MMCR0 795
473#define PA6T_MMCR0_EN0 0x0000000000000001UL
474#define PA6T_MMCR0_EN1 0x0000000000000002UL
475#define PA6T_MMCR0_EN2 0x0000000000000004UL
476#define PA6T_MMCR0_EN3 0x0000000000000008UL
477#define PA6T_MMCR0_EN4 0x0000000000000010UL
478#define PA6T_MMCR0_EN5 0x0000000000000020UL
479#define PA6T_MMCR0_SUPEN 0x0000000000000040UL
480#define PA6T_MMCR0_PREN 0x0000000000000080UL
481#define PA6T_MMCR0_HYPEN 0x0000000000000100UL
482#define PA6T_MMCR0_FCM0 0x0000000000000200UL
483#define PA6T_MMCR0_FCM1 0x0000000000000400UL
484#define PA6T_MMCR0_INTGEN 0x0000000000000800UL
485#define PA6T_MMCR0_INTEN0 0x0000000000001000UL
486#define PA6T_MMCR0_INTEN1 0x0000000000002000UL
487#define PA6T_MMCR0_INTEN2 0x0000000000004000UL
488#define PA6T_MMCR0_INTEN3 0x0000000000008000UL
489#define PA6T_MMCR0_INTEN4 0x0000000000010000UL
490#define PA6T_MMCR0_INTEN5 0x0000000000020000UL
491#define PA6T_MMCR0_DISCNT 0x0000000000040000UL
492#define PA6T_MMCR0_UOP 0x0000000000080000UL
493#define PA6T_MMCR0_TRG 0x0000000000100000UL
494#define PA6T_MMCR0_TRGEN 0x0000000000200000UL
495#define PA6T_MMCR0_TRGREG 0x0000000001600000UL
496#define PA6T_MMCR0_SIARLOG 0x0000000002000000UL
497#define PA6T_MMCR0_SDARLOG 0x0000000004000000UL
498#define PA6T_MMCR0_PROEN 0x0000000008000000UL
499#define PA6T_MMCR0_PROLOG 0x0000000010000000UL
500#define PA6T_MMCR0_DAMEN2 0x0000000020000000UL
501#define PA6T_MMCR0_DAMEN3 0x0000000040000000UL
502#define PA6T_MMCR0_DAMEN4 0x0000000080000000UL
503#define PA6T_MMCR0_DAMEN5 0x0000000100000000UL
504#define PA6T_MMCR0_DAMSEL2 0x0000000200000000UL
505#define PA6T_MMCR0_DAMSEL3 0x0000000400000000UL
506#define PA6T_MMCR0_DAMSEL4 0x0000000800000000UL
507#define PA6T_MMCR0_DAMSEL5 0x0000001000000000UL
508#define PA6T_MMCR0_HANDDIS 0x0000002000000000UL
509#define PA6T_MMCR0_PCTEN 0x0000004000000000UL
510#define PA6T_MMCR0_SOCEN 0x0000008000000000UL
511#define PA6T_MMCR0_SOCMOD 0x0000010000000000UL
512
513#define SPRN_PA6T_MMCR1 798
514#define PA6T_MMCR1_ES2 0x00000000000000ffUL
515#define PA6T_MMCR1_ES3 0x000000000000ff00UL
516#define PA6T_MMCR1_ES4 0x0000000000ff0000UL
517#define PA6T_MMCR1_ES5 0x00000000ff000000UL
518
519#define SPRN_PA6T_SIAR 780
520#define SPRN_PA6T_UPMC0 771
521#define SPRN_PA6T_UPMC1 772
522#define SPRN_PA6T_UPMC2 773
523#define SPRN_PA6T_UPMC3 774
524#define SPRN_PA6T_UPMC4 775
525#define SPRN_PA6T_UPMC5 776
526#define SPRN_PA6T_UMMCR0 779
527#define SPRN_PA6T_UMMCR1 782
528#define SPRN_PA6T_PMC0 787
529#define SPRN_PA6T_PMC1 788
530#define SPRN_PA6T_PMC2 789
531#define SPRN_PA6T_PMC3 790
532#define SPRN_PA6T_PMC4 791
533#define SPRN_PA6T_PMC5 792
534
465#else /* 32-bit */ 535#else /* 32-bit */
466#define SPRN_MMCR0 952 /* Monitor Mode Control Register 0 */ 536#define SPRN_MMCR0 952 /* Monitor Mode Control Register 0 */
467#define MMCR0_FC 0x80000000UL /* freeze counters */ 537#define MMCR0_FC 0x80000000UL /* freeze counters */
diff --git a/include/asm-powerpc/smp.h b/include/asm-powerpc/smp.h
index 20ea7c70bc38..01717f266dc9 100644
--- a/include/asm-powerpc/smp.h
+++ b/include/asm-powerpc/smp.h
@@ -75,6 +75,7 @@ extern cpumask_t cpu_sibling_map[NR_CPUS];
75void smp_init_iSeries(void); 75void smp_init_iSeries(void);
76void smp_init_pSeries(void); 76void smp_init_pSeries(void);
77void smp_init_cell(void); 77void smp_init_cell(void);
78void smp_init_celleb(void);
78void smp_setup_cpu_maps(void); 79void smp_setup_cpu_maps(void);
79 80
80extern int __cpu_disable(void); 81extern int __cpu_disable(void);
diff --git a/include/asm-powerpc/socket.h b/include/asm-powerpc/socket.h
index c8b1da50e72d..403e9fde2eb5 100644
--- a/include/asm-powerpc/socket.h
+++ b/include/asm-powerpc/socket.h
@@ -56,5 +56,7 @@
56 56
57#define SO_PEERSEC 31 57#define SO_PEERSEC 31
58#define SO_PASSSEC 34 58#define SO_PASSSEC 34
59#define SO_TIMESTAMPNS 35
60#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
59 61
60#endif /* _ASM_POWERPC_SOCKET_H */ 62#endif /* _ASM_POWERPC_SOCKET_H */
diff --git a/include/asm-powerpc/sockios.h b/include/asm-powerpc/sockios.h
index 590078d8ed28..55cef7675a31 100644
--- a/include/asm-powerpc/sockios.h
+++ b/include/asm-powerpc/sockios.h
@@ -14,6 +14,7 @@
14#define FIOGETOWN 0x8903 14#define FIOGETOWN 0x8903
15#define SIOCGPGRP 0x8904 15#define SIOCGPGRP 0x8904
16#define SIOCATMARK 0x8905 16#define SIOCATMARK 0x8905
17#define SIOCGSTAMP 0x8906 /* Get stamp */ 17#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
18#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
18 19
19#endif /* _ASM_POWERPC_SOCKIOS_H */ 20#endif /* _ASM_POWERPC_SOCKIOS_H */
diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
index 3d90264e9d36..31d5054be20f 100644
--- a/include/asm-powerpc/spu.h
+++ b/include/asm-powerpc/spu.h
@@ -104,6 +104,7 @@
104 104
105struct spu_context; 105struct spu_context;
106struct spu_runqueue; 106struct spu_runqueue;
107struct device_node;
107 108
108struct spu { 109struct spu {
109 const char *name; 110 const char *name;
@@ -128,7 +129,6 @@ struct spu {
128 struct spu_runqueue *rq; 129 struct spu_runqueue *rq;
129 unsigned long long timestamp; 130 unsigned long long timestamp;
130 pid_t pid; 131 pid_t pid;
131 int prio;
132 int class_0_pending; 132 int class_0_pending;
133 spinlock_t register_lock; 133 spinlock_t register_lock;
134 134
@@ -142,7 +142,19 @@ struct spu {
142 char irq_c1[8]; 142 char irq_c1[8];
143 char irq_c2[8]; 143 char irq_c2[8];
144 144
145 u64 spe_id;
146
145 void* pdata; /* platform private data */ 147 void* pdata; /* platform private data */
148
149 /* of based platforms only */
150 struct device_node *devnode;
151
152 /* native only */
153 struct spu_priv1 __iomem *priv1;
154
155 /* beat only */
156 u64 shadow_int_mask_RW[3];
157
146 struct sys_device sysdev; 158 struct sys_device sysdev;
147}; 159};
148 160
@@ -153,6 +165,13 @@ int spu_irq_class_0_bottom(struct spu *spu);
153int spu_irq_class_1_bottom(struct spu *spu); 165int spu_irq_class_1_bottom(struct spu *spu);
154void spu_irq_setaffinity(struct spu *spu, int cpu); 166void spu_irq_setaffinity(struct spu *spu, int cpu);
155 167
168extern void spu_invalidate_slbs(struct spu *spu);
169extern void spu_associate_mm(struct spu *spu, struct mm_struct *mm);
170
171/* Calls from the memory management to the SPU */
172struct mm_struct;
173extern void spu_flush_all_slbs(struct mm_struct *mm);
174
156/* system callbacks from the SPU */ 175/* system callbacks from the SPU */
157struct spu_syscall_block { 176struct spu_syscall_block {
158 u64 nr_ret; 177 u64 nr_ret;
diff --git a/include/asm-powerpc/spu_csa.h b/include/asm-powerpc/spu_csa.h
index bdbf906a767f..02e56a6685a2 100644
--- a/include/asm-powerpc/spu_csa.h
+++ b/include/asm-powerpc/spu_csa.h
@@ -221,8 +221,6 @@ struct spu_priv2_collapsed {
221 * @spu_chnlcnt_RW: Array of saved channel counts. 221 * @spu_chnlcnt_RW: Array of saved channel counts.
222 * @spu_chnldata_RW: Array of saved channel data. 222 * @spu_chnldata_RW: Array of saved channel data.
223 * @suspend_time: Time stamp when decrementer disabled. 223 * @suspend_time: Time stamp when decrementer disabled.
224 * @slb_esid_RW: Array of saved SLB esid entries.
225 * @slb_vsid_RW: Array of saved SLB vsid entries.
226 * 224 *
227 * Structure representing the whole of the SPU 225 * Structure representing the whole of the SPU
228 * context save area (CSA). This struct contains 226 * context save area (CSA). This struct contains
@@ -244,9 +242,8 @@ struct spu_state {
244 u64 spu_chnldata_RW[32]; 242 u64 spu_chnldata_RW[32];
245 u32 spu_mailbox_data[4]; 243 u32 spu_mailbox_data[4];
246 u32 pu_mailbox_data[1]; 244 u32 pu_mailbox_data[1];
245 u64 dar, dsisr;
247 unsigned long suspend_time; 246 unsigned long suspend_time;
248 u64 slb_esid_RW[8];
249 u64 slb_vsid_RW[8];
250 spinlock_t register_lock; 247 spinlock_t register_lock;
251}; 248};
252 249
diff --git a/include/asm-powerpc/spu_priv1.h b/include/asm-powerpc/spu_priv1.h
index 69dcb0c53884..7e78f6a1ab8b 100644
--- a/include/asm-powerpc/spu_priv1.h
+++ b/include/asm-powerpc/spu_priv1.h
@@ -206,6 +206,8 @@ spu_destroy_spu (struct spu *spu)
206 */ 206 */
207 207
208extern const struct spu_priv1_ops spu_priv1_mmio_ops; 208extern const struct spu_priv1_ops spu_priv1_mmio_ops;
209extern const struct spu_priv1_ops spu_priv1_beat_ops;
210
209extern const struct spu_management_ops spu_management_of_ops; 211extern const struct spu_management_ops spu_management_of_ops;
210 212
211#endif /* __KERNEL__ */ 213#endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/sstep.h b/include/asm-powerpc/sstep.h
index 630a9889c07c..f593b0f9b627 100644
--- a/include/asm-powerpc/sstep.h
+++ b/include/asm-powerpc/sstep.h
@@ -21,6 +21,7 @@ struct pt_regs;
21 */ 21 */
22#define IS_MTMSRD(instr) (((instr) & 0xfc0007be) == 0x7c000124) 22#define IS_MTMSRD(instr) (((instr) & 0xfc0007be) == 0x7c000124)
23#define IS_RFID(instr) (((instr) & 0xfc0007fe) == 0x4c000024) 23#define IS_RFID(instr) (((instr) & 0xfc0007fe) == 0x4c000024)
24#define IS_RFI(instr) (((instr) & 0xfc0007fe) == 0x4c000064)
24 25
25/* Emulate instructions that cause a transfer of control. */ 26/* Emulate instructions that cause a transfer of control. */
26extern int emulate_step(struct pt_regs *regs, unsigned int instr); 27extern int emulate_step(struct pt_regs *regs, unsigned int instr);
diff --git a/include/asm-powerpc/string.h b/include/asm-powerpc/string.h
index faa407f33c6b..aa40f92c298d 100644
--- a/include/asm-powerpc/string.h
+++ b/include/asm-powerpc/string.h
@@ -14,8 +14,6 @@
14#define __HAVE_ARCH_MEMCMP 14#define __HAVE_ARCH_MEMCMP
15#define __HAVE_ARCH_MEMCHR 15#define __HAVE_ARCH_MEMCHR
16 16
17extern int strcasecmp(const char *, const char *);
18extern int strncasecmp(const char *, const char *, __kernel_size_t);
19extern char * strcpy(char *,const char *); 17extern char * strcpy(char *,const char *);
20extern char * strncpy(char *,const char *, __kernel_size_t); 18extern char * strncpy(char *,const char *, __kernel_size_t);
21extern __kernel_size_t strlen(const char *); 19extern __kernel_size_t strlen(const char *);
diff --git a/include/asm-powerpc/systbl.h b/include/asm-powerpc/systbl.h
index 97b435484177..0b00068313f9 100644
--- a/include/asm-powerpc/systbl.h
+++ b/include/asm-powerpc/systbl.h
@@ -288,7 +288,7 @@ COMPAT_SYS(ppoll)
288SYSCALL_SPU(unshare) 288SYSCALL_SPU(unshare)
289SYSCALL_SPU(splice) 289SYSCALL_SPU(splice)
290SYSCALL_SPU(tee) 290SYSCALL_SPU(tee)
291SYSCALL_SPU(vmsplice) 291COMPAT_SYS_SPU(vmsplice)
292COMPAT_SYS_SPU(openat) 292COMPAT_SYS_SPU(openat)
293SYSCALL_SPU(mkdirat) 293SYSCALL_SPU(mkdirat)
294SYSCALL_SPU(mknodat) 294SYSCALL_SPU(mknodat)
@@ -304,4 +304,6 @@ SYSCALL_SPU(fchmodat)
304SYSCALL_SPU(faccessat) 304SYSCALL_SPU(faccessat)
305COMPAT_SYS_SPU(get_robust_list) 305COMPAT_SYS_SPU(get_robust_list)
306COMPAT_SYS_SPU(set_robust_list) 306COMPAT_SYS_SPU(set_robust_list)
307COMPAT_SYS(move_pages) 307COMPAT_SYS_SPU(move_pages)
308SYSCALL_SPU(getcpu)
309COMPAT_SYS(epoll_pwait)
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index f7b1227d6454..d3e0906ff2bc 100644
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -131,6 +131,7 @@ extern void enable_kernel_altivec(void);
131extern void giveup_altivec(struct task_struct *); 131extern void giveup_altivec(struct task_struct *);
132extern void load_up_altivec(struct task_struct *); 132extern void load_up_altivec(struct task_struct *);
133extern int emulate_altivec(struct pt_regs *); 133extern int emulate_altivec(struct pt_regs *);
134extern void enable_kernel_spe(void);
134extern void giveup_spe(struct task_struct *); 135extern void giveup_spe(struct task_struct *);
135extern void load_up_spe(struct task_struct *); 136extern void load_up_spe(struct task_struct *);
136extern int fix_alignment(struct pt_regs *); 137extern int fix_alignment(struct pt_regs *);
diff --git a/include/asm-powerpc/termios.h b/include/asm-powerpc/termios.h
index 7f80a019b6a0..2c14fea07c8a 100644
--- a/include/asm-powerpc/termios.h
+++ b/include/asm-powerpc/termios.h
@@ -71,24 +71,6 @@ struct termio {
71#define _VEOL2 8 71#define _VEOL2 8
72#define _VSWTC 9 72#define _VSWTC 9
73 73
74/* line disciplines */
75#define N_TTY 0
76#define N_SLIP 1
77#define N_MOUSE 2
78#define N_PPP 3
79#define N_STRIP 4
80#define N_AX25 5
81#define N_X25 6 /* X.25 async */
82#define N_6PACK 7
83#define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */
84#define N_R3964 9 /* Reserved for Simatic R3964 module */
85#define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */
86#define N_IRDA 11 /* Linux IrDa - http://www.cs.uit.no/~dagb/irda/irda.html */
87#define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */
88#define N_HDLC 13 /* synchronous HDLC */
89#define N_SYNC_PPP 14
90#define N_HCI 15 /* Bluetooth HCI UART */
91
92#ifdef __KERNEL__ 74#ifdef __KERNEL__
93/* ^C ^\ del ^U ^D 1 0 0 0 0 ^W ^R ^Z ^Q ^S ^V ^U */ 75/* ^C ^\ del ^U ^D 1 0 0 0 0 ^W ^R ^Z ^Q ^S ^V ^U */
94#define INIT_C_CC "\003\034\177\025\004\001\000\000\000\000\027\022\032\021\023\026\025" 76#define INIT_C_CC "\003\034\177\025\004\001\000\000\000\000\027\022\032\021\023\026\025"
diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h
index 4cff977ad526..3fd57c048f59 100644
--- a/include/asm-powerpc/time.h
+++ b/include/asm-powerpc/time.h
@@ -39,6 +39,8 @@ extern void generic_calibrate_decr(void);
39extern void wakeup_decrementer(void); 39extern void wakeup_decrementer(void);
40extern void snapshot_timebase(void); 40extern void snapshot_timebase(void);
41 41
42extern void set_dec_cpu6(unsigned int val);
43
42/* Some sane defaults: 125 MHz timebase, 1GHz processor */ 44/* Some sane defaults: 125 MHz timebase, 1GHz processor */
43extern unsigned long ppc_proc_freq; 45extern unsigned long ppc_proc_freq;
44#define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8) 46#define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8)
diff --git a/include/asm-powerpc/tlb.h b/include/asm-powerpc/tlb.h
index 4e2a834683fb..0a17682663d8 100644
--- a/include/asm-powerpc/tlb.h
+++ b/include/asm-powerpc/tlb.h
@@ -38,7 +38,6 @@ extern void pte_free_finish(void);
38 38
39static inline void tlb_flush(struct mmu_gather *tlb) 39static inline void tlb_flush(struct mmu_gather *tlb)
40{ 40{
41 flush_tlb_pending();
42 pte_free_finish(); 41 pte_free_finish();
43} 42}
44 43
diff --git a/include/asm-powerpc/tlbflush.h b/include/asm-powerpc/tlbflush.h
index 93c7d0c7230f..86e6266a028b 100644
--- a/include/asm-powerpc/tlbflush.h
+++ b/include/asm-powerpc/tlbflush.h
@@ -17,10 +17,73 @@
17 */ 17 */
18#ifdef __KERNEL__ 18#ifdef __KERNEL__
19 19
20
21struct mm_struct; 20struct mm_struct;
21struct vm_area_struct;
22
23#if defined(CONFIG_4xx) || defined(CONFIG_8xx) || defined(CONFIG_FSL_BOOKE)
24/*
25 * TLB flushing for software loaded TLB chips
26 *
27 * TODO: (CONFIG_FSL_BOOKE) determine if flush_tlb_range &
28 * flush_tlb_kernel_range are best implemented as tlbia vs
29 * specific tlbie's
30 */
31
32extern void _tlbie(unsigned long address);
33
34#if defined(CONFIG_40x) || defined(CONFIG_8xx)
35#define _tlbia() asm volatile ("tlbia; sync" : : : "memory")
36#else /* CONFIG_44x || CONFIG_FSL_BOOKE */
37extern void _tlbia(void);
38#endif
39
40static inline void flush_tlb_mm(struct mm_struct *mm)
41{
42 _tlbia();
43}
44
45static inline void flush_tlb_page(struct vm_area_struct *vma,
46 unsigned long vmaddr)
47{
48 _tlbie(vmaddr);
49}
50
51static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
52 unsigned long vmaddr)
53{
54 _tlbie(vmaddr);
55}
56
57static inline void flush_tlb_range(struct vm_area_struct *vma,
58 unsigned long start, unsigned long end)
59{
60 _tlbia();
61}
62
63static inline void flush_tlb_kernel_range(unsigned long start,
64 unsigned long end)
65{
66 _tlbia();
67}
22 68
23#ifdef CONFIG_PPC64 69#elif defined(CONFIG_PPC32)
70/*
71 * TLB flushing for "classic" hash-MMMU 32-bit CPUs, 6xx, 7xx, 7xxx
72 */
73extern void _tlbie(unsigned long address);
74extern void _tlbia(void);
75
76extern void flush_tlb_mm(struct mm_struct *mm);
77extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
78extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
79extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
80 unsigned long end);
81extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
82
83#else
84/*
85 * TLB flushing for 64-bit has-MMU CPUs
86 */
24 87
25#include <linux/percpu.h> 88#include <linux/percpu.h>
26#include <asm/page.h> 89#include <asm/page.h>
@@ -28,117 +91,90 @@ struct mm_struct;
28#define PPC64_TLB_BATCH_NR 192 91#define PPC64_TLB_BATCH_NR 192
29 92
30struct ppc64_tlb_batch { 93struct ppc64_tlb_batch {
31 unsigned long index; 94 int active;
32 struct mm_struct *mm; 95 unsigned long index;
33 real_pte_t pte[PPC64_TLB_BATCH_NR]; 96 struct mm_struct *mm;
34 unsigned long vaddr[PPC64_TLB_BATCH_NR]; 97 real_pte_t pte[PPC64_TLB_BATCH_NR];
35 unsigned int psize; 98 unsigned long vaddr[PPC64_TLB_BATCH_NR];
99 unsigned int psize;
36}; 100};
37DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch); 101DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
38 102
39extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch); 103extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
40 104
41static inline void flush_tlb_pending(void) 105extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
106 pte_t *ptep, unsigned long pte, int huge);
107
108#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
109
110static inline void arch_enter_lazy_mmu_mode(void)
111{
112 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
113
114 batch->active = 1;
115}
116
117static inline void arch_leave_lazy_mmu_mode(void)
42{ 118{
43 struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch); 119 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
44 120
45 if (batch->index) 121 if (batch->index)
46 __flush_tlb_pending(batch); 122 __flush_tlb_pending(batch);
47 put_cpu_var(ppc64_tlb_batch); 123 batch->active = 0;
48} 124}
49 125
126#define arch_flush_lazy_mmu_mode() do {} while (0)
127
128
50extern void flush_hash_page(unsigned long va, real_pte_t pte, int psize, 129extern void flush_hash_page(unsigned long va, real_pte_t pte, int psize,
51 int local); 130 int local);
52extern void flush_hash_range(unsigned long number, int local); 131extern void flush_hash_range(unsigned long number, int local);
53 132
54#else /* CONFIG_PPC64 */
55
56#include <linux/mm.h>
57
58extern void _tlbie(unsigned long address);
59extern void _tlbia(void);
60
61/*
62 * TODO: (CONFIG_FSL_BOOKE) determine if flush_tlb_range &
63 * flush_tlb_kernel_range are best implemented as tlbia vs
64 * specific tlbie's
65 */
66
67#if (defined(CONFIG_4xx) && !defined(CONFIG_44x)) || defined(CONFIG_8xx)
68#define flush_tlb_pending() asm volatile ("tlbia; sync" : : : "memory")
69#elif defined(CONFIG_4xx) || defined(CONFIG_FSL_BOOKE)
70#define flush_tlb_pending() _tlbia()
71#endif
72
73/*
74 * This gets called at the end of handling a page fault, when
75 * the kernel has put a new PTE into the page table for the process.
76 * We use it to ensure coherency between the i-cache and d-cache
77 * for the page which has just been mapped in.
78 * On machines which use an MMU hash table, we use this to put a
79 * corresponding HPTE into the hash table ahead of time, instead of
80 * waiting for the inevitable extra hash-table miss exception.
81 */
82extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
83
84#endif /* CONFIG_PPC64 */
85
86#if defined(CONFIG_PPC64) || defined(CONFIG_4xx) || \
87 defined(CONFIG_FSL_BOOKE) || defined(CONFIG_8xx)
88 133
89static inline void flush_tlb_mm(struct mm_struct *mm) 134static inline void flush_tlb_mm(struct mm_struct *mm)
90{ 135{
91 flush_tlb_pending();
92} 136}
93 137
94static inline void flush_tlb_page(struct vm_area_struct *vma, 138static inline void flush_tlb_page(struct vm_area_struct *vma,
95 unsigned long vmaddr) 139 unsigned long vmaddr)
96{ 140{
97#ifdef CONFIG_PPC64
98 flush_tlb_pending();
99#else
100 _tlbie(vmaddr);
101#endif
102} 141}
103 142
104static inline void flush_tlb_page_nohash(struct vm_area_struct *vma, 143static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
105 unsigned long vmaddr) 144 unsigned long vmaddr)
106{ 145{
107#ifndef CONFIG_PPC64
108 _tlbie(vmaddr);
109#endif
110} 146}
111 147
112static inline void flush_tlb_range(struct vm_area_struct *vma, 148static inline void flush_tlb_range(struct vm_area_struct *vma,
113 unsigned long start, unsigned long end) 149 unsigned long start, unsigned long end)
114{ 150{
115 flush_tlb_pending();
116} 151}
117 152
118static inline void flush_tlb_kernel_range(unsigned long start, 153static inline void flush_tlb_kernel_range(unsigned long start,
119 unsigned long end) 154 unsigned long end)
120{ 155{
121 flush_tlb_pending();
122} 156}
123 157
124#else /* 6xx, 7xx, 7xxx cpus */
125
126extern void flush_tlb_mm(struct mm_struct *mm);
127extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
128extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
129extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
130 unsigned long end);
131extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
132
133#endif 158#endif
134 159
135/* 160/*
161 * This gets called at the end of handling a page fault, when
162 * the kernel has put a new PTE into the page table for the process.
163 * We use it to ensure coherency between the i-cache and d-cache
164 * for the page which has just been mapped in.
165 * On machines which use an MMU hash table, we use this to put a
166 * corresponding HPTE into the hash table ahead of time, instead of
167 * waiting for the inevitable extra hash-table miss exception.
168 */
169extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
170
171/*
136 * This is called in munmap when we have freed up some page-table 172 * This is called in munmap when we have freed up some page-table
137 * pages. We don't need to do anything here, there's nothing special 173 * pages. We don't need to do anything here, there's nothing special
138 * about our page-table pages. -- paulus 174 * about our page-table pages. -- paulus
139 */ 175 */
140static inline void flush_tlb_pgtables(struct mm_struct *mm, 176static inline void flush_tlb_pgtables(struct mm_struct *mm,
141 unsigned long start, unsigned long end) 177 unsigned long start, unsigned long end)
142{ 178{
143} 179}
144 180
diff --git a/include/asm-powerpc/topology.h b/include/asm-powerpc/topology.h
index 6610495f5f16..0ad21a849b5f 100644
--- a/include/asm-powerpc/topology.h
+++ b/include/asm-powerpc/topology.h
@@ -57,7 +57,6 @@ static inline int pcibus_to_node(struct pci_bus *bus)
57 .busy_factor = 32, \ 57 .busy_factor = 32, \
58 .imbalance_pct = 125, \ 58 .imbalance_pct = 125, \
59 .cache_nice_tries = 1, \ 59 .cache_nice_tries = 1, \
60 .per_cpu_gain = 100, \
61 .busy_idx = 3, \ 60 .busy_idx = 3, \
62 .idle_idx = 1, \ 61 .idle_idx = 1, \
63 .newidle_idx = 2, \ 62 .newidle_idx = 2, \
diff --git a/include/asm-powerpc/uaccess.h b/include/asm-powerpc/uaccess.h
index adbf16b8cfbb..8e798e3758bc 100644
--- a/include/asm-powerpc/uaccess.h
+++ b/include/asm-powerpc/uaccess.h
@@ -110,12 +110,18 @@ struct exception_table_entry {
110 __get_user_nocheck((x), (ptr), sizeof(*(ptr))) 110 __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
111#define __put_user(x, ptr) \ 111#define __put_user(x, ptr) \
112 __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) 112 __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)))
113
113#ifndef __powerpc64__ 114#ifndef __powerpc64__
114#define __get_user64(x, ptr) \ 115#define __get_user64(x, ptr) \
115 __get_user64_nocheck((x), (ptr), sizeof(*(ptr))) 116 __get_user64_nocheck((x), (ptr), sizeof(*(ptr)))
116#define __put_user64(x, ptr) __put_user(x, ptr) 117#define __put_user64(x, ptr) __put_user(x, ptr)
117#endif 118#endif
118 119
120#define __get_user_inatomic(x, ptr) \
121 __get_user_nosleep((x), (ptr), sizeof(*(ptr)))
122#define __put_user_inatomic(x, ptr) \
123 __put_user_nosleep((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)))
124
119#define __get_user_unaligned __get_user 125#define __get_user_unaligned __get_user
120#define __put_user_unaligned __put_user 126#define __put_user_unaligned __put_user
121 127
@@ -198,6 +204,16 @@ do { \
198 __pu_err; \ 204 __pu_err; \
199}) 205})
200 206
207#define __put_user_nosleep(x, ptr, size) \
208({ \
209 long __pu_err; \
210 __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
211 __chk_user_ptr(ptr); \
212 __put_user_size((x), __pu_addr, (size), __pu_err); \
213 __pu_err; \
214})
215
216
201extern long __get_user_bad(void); 217extern long __get_user_bad(void);
202 218
203#define __get_user_asm(x, addr, err, op) \ 219#define __get_user_asm(x, addr, err, op) \
@@ -297,6 +313,18 @@ do { \
297 __gu_err; \ 313 __gu_err; \
298}) 314})
299 315
316#define __get_user_nosleep(x, ptr, size) \
317({ \
318 long __gu_err; \
319 unsigned long __gu_val; \
320 const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
321 __chk_user_ptr(ptr); \
322 __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \
323 (x) = (__typeof__(*(ptr)))__gu_val; \
324 __gu_err; \
325})
326
327
300/* more complex routines */ 328/* more complex routines */
301 329
302extern unsigned long __copy_tofrom_user(void __user *to, 330extern unsigned long __copy_tofrom_user(void __user *to,
diff --git a/include/asm-powerpc/ucc_fast.h b/include/asm-powerpc/ucc_fast.h
index 39d1c90fd2ca..f529f70b1d82 100644
--- a/include/asm-powerpc/ucc_fast.h
+++ b/include/asm-powerpc/ucc_fast.h
@@ -159,6 +159,9 @@ struct ucc_fast_private {
159 struct ucc_fast *uf_regs; /* a pointer to memory map of UCC regs. */ 159 struct ucc_fast *uf_regs; /* a pointer to memory map of UCC regs. */
160 u32 *p_ucce; /* a pointer to the event register in memory. */ 160 u32 *p_ucce; /* a pointer to the event register in memory. */
161 u32 *p_uccm; /* a pointer to the mask register in memory. */ 161 u32 *p_uccm; /* a pointer to the mask register in memory. */
162#ifdef CONFIG_UGETH_TX_ON_DEMAND
163 u16 *p_utodr; /* pointer to the transmit on demand register */
164#endif
162 int enabled_tx; /* Whether channel is enabled for Tx (ENT) */ 165 int enabled_tx; /* Whether channel is enabled for Tx (ENT) */
163 int enabled_rx; /* Whether channel is enabled for Rx (ENR) */ 166 int enabled_rx; /* Whether channel is enabled for Rx (ENR) */
164 int stopped_tx; /* Whether channel has been stopped for Tx 167 int stopped_tx; /* Whether channel has been stopped for Tx
diff --git a/include/asm-powerpc/ucc_slow.h b/include/asm-powerpc/ucc_slow.h
index ca93bc99237e..fdaac9d762bb 100644
--- a/include/asm-powerpc/ucc_slow.h
+++ b/include/asm-powerpc/ucc_slow.h
@@ -150,7 +150,7 @@ struct ucc_slow_info {
150 int ucc_num; 150 int ucc_num;
151 enum qe_clock rx_clock; 151 enum qe_clock rx_clock;
152 enum qe_clock tx_clock; 152 enum qe_clock tx_clock;
153 struct ucc_slow *us_regs; 153 u32 regs;
154 int irq; 154 int irq;
155 u16 uccm_mask; 155 u16 uccm_mask;
156 int data_mem_part; 156 int data_mem_part;
@@ -199,9 +199,9 @@ struct ucc_slow_private {
199 and length for first BD in a frame */ 199 and length for first BD in a frame */
200 u32 tx_base_offset; /* first BD in Tx BD table offset (In MURAM) */ 200 u32 tx_base_offset; /* first BD in Tx BD table offset (In MURAM) */
201 u32 rx_base_offset; /* first BD in Rx BD table offset (In MURAM) */ 201 u32 rx_base_offset; /* first BD in Rx BD table offset (In MURAM) */
202 u8 *confBd; /* next BD for confirm after Tx */ 202 struct qe_bd *confBd; /* next BD for confirm after Tx */
203 u8 *tx_bd; /* next BD for new Tx request */ 203 struct qe_bd *tx_bd; /* next BD for new Tx request */
204 u8 *rx_bd; /* next BD to collect after Rx */ 204 struct qe_bd *rx_bd; /* next BD to collect after Rx */
205 void *p_rx_frame; /* accumulating receive frame */ 205 void *p_rx_frame; /* accumulating receive frame */
206 u16 *p_ucce; /* a pointer to the event register in memory. 206 u16 *p_ucce; /* a pointer to the event register in memory.
207 */ 207 */
diff --git a/include/asm-powerpc/udbg.h b/include/asm-powerpc/udbg.h
index 55e57844fa78..d03d8557f706 100644
--- a/include/asm-powerpc/udbg.h
+++ b/include/asm-powerpc/udbg.h
@@ -41,9 +41,12 @@ extern void __init udbg_early_init(void);
41extern void __init udbg_init_debug_lpar(void); 41extern void __init udbg_init_debug_lpar(void);
42extern void __init udbg_init_pmac_realmode(void); 42extern void __init udbg_init_pmac_realmode(void);
43extern void __init udbg_init_maple_realmode(void); 43extern void __init udbg_init_maple_realmode(void);
44extern void __init udbg_init_pas_realmode(void);
44extern void __init udbg_init_iseries(void); 45extern void __init udbg_init_iseries(void);
45extern void __init udbg_init_rtas_panel(void); 46extern void __init udbg_init_rtas_panel(void);
46extern void __init udbg_init_rtas_console(void); 47extern void __init udbg_init_rtas_console(void);
48extern void __init udbg_init_debug_beat(void);
49extern void __init udbg_init_btext(void);
47 50
48#endif /* __KERNEL__ */ 51#endif /* __KERNEL__ */
49#endif /* _ASM_POWERPC_UDBG_H */ 52#endif /* _ASM_POWERPC_UDBG_H */
diff --git a/include/asm-powerpc/uic.h b/include/asm-powerpc/uic.h
new file mode 100644
index 000000000000..970eb7e2186a
--- /dev/null
+++ b/include/asm-powerpc/uic.h
@@ -0,0 +1,23 @@
1/*
2 * include/asm-powerpc/uic.h
3 *
4 * IBM PPC4xx UIC external definitions and structure.
5 *
6 * Maintainer: David Gibson <dwg@au1.ibm.com>
7 * Copyright 2007 IBM Corporation.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14#ifndef _ASM_POWERPC_UIC_H
15#define _ASM_POWERPC_UIC_H
16
17#ifdef __KERNEL__
18
19extern void __init uic_init_tree(void);
20extern unsigned int uic_get_irq(void);
21
22#endif /* __KERNEL__ */
23#endif /* _ASM_POWERPC_UIC_H */
diff --git a/include/asm-powerpc/unistd.h b/include/asm-powerpc/unistd.h
index 0ae954e3d258..2baedbe54e13 100644
--- a/include/asm-powerpc/unistd.h
+++ b/include/asm-powerpc/unistd.h
@@ -324,10 +324,12 @@
324#define __NR_get_robust_list 299 324#define __NR_get_robust_list 299
325#define __NR_set_robust_list 300 325#define __NR_set_robust_list 300
326#define __NR_move_pages 301 326#define __NR_move_pages 301
327#define __NR_getcpu 302
328#define __NR_epoll_pwait 303
327 329
328#ifdef __KERNEL__ 330#ifdef __KERNEL__
329 331
330#define __NR_syscalls 302 332#define __NR_syscalls 304
331 333
332#define __NR__exit __NR_exit 334#define __NR__exit __NR_exit
333#define NR_syscalls __NR_syscalls 335#define NR_syscalls __NR_syscalls
diff --git a/include/asm-powerpc/vdso.h b/include/asm-powerpc/vdso.h
index b9f9118b1607..26fc449bd989 100644
--- a/include/asm-powerpc/vdso.h
+++ b/include/asm-powerpc/vdso.h
@@ -18,16 +18,11 @@
18 18
19#ifndef __ASSEMBLY__ 19#ifndef __ASSEMBLY__
20 20
21extern unsigned int vdso64_pages;
22extern unsigned int vdso32_pages;
23
24/* Offsets relative to thread->vdso_base */ 21/* Offsets relative to thread->vdso_base */
25extern unsigned long vdso64_rt_sigtramp; 22extern unsigned long vdso64_rt_sigtramp;
26extern unsigned long vdso32_sigtramp; 23extern unsigned long vdso32_sigtramp;
27extern unsigned long vdso32_rt_sigtramp; 24extern unsigned long vdso32_rt_sigtramp;
28 25
29extern void vdso_init(void);
30
31#else /* __ASSEMBLY__ */ 26#else /* __ASSEMBLY__ */
32 27
33#ifdef __VDSO64__ 28#ifdef __VDSO64__