20 files changed, 128 insertions, 110 deletions

diff --git a/include/asm-powerpc/asm-compat.h b/include/asm-powerpc/asm-compat.h
index 8ec2e1da68bf..8f0fe7971949 100644
--- a/include/asm-powerpc/asm-compat.h
+++ b/include/asm-powerpc/asm-compat.h
@@ -22,6 +22,7 @@
 #define PPC_STL         stringify_in_c(std)
 #define PPC_LCMPI       stringify_in_c(cmpdi)
 #define PPC_LONG        stringify_in_c(.llong)
+#define PPC_LONG_ALIGN  stringify_in_c(.balign 8)
 #define PPC_TLNEI       stringify_in_c(tdnei)
 #define PPC_LLARX       stringify_in_c(ldarx)
 #define PPC_STLCX       stringify_in_c(stdcx.)
@@ -43,6 +44,7 @@
 #define PPC_STL         stringify_in_c(stw)
 #define PPC_LCMPI       stringify_in_c(cmpwi)
 #define PPC_LONG        stringify_in_c(.long)
+#define PPC_LONG_ALIGN  stringify_in_c(.balign 4)
 #define PPC_TLNEI       stringify_in_c(twnei)
 #define PPC_LLARX       stringify_in_c(lwarx)
 #define PPC_STLCX       stringify_in_c(stwcx.)
diff --git a/include/asm-powerpc/hugetlb.h b/include/asm-powerpc/hugetlb.h
index be32ff02f4a0..26f0d0ab27a5 100644
--- a/include/asm-powerpc/hugetlb.h
+++ b/include/asm-powerpc/hugetlb.h
@@ -7,7 +7,7 @@
 int is_hugepage_only_range(struct mm_struct *mm, unsigned long addr,
                            unsigned long len);
 
-void hugetlb_free_pgd_range(struct mmu_gather **tlb, unsigned long addr,
+void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr,
                             unsigned long end, unsigned long floor,
                             unsigned long ceiling);
 
@@ -21,11 +21,13 @@ pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
  * If the arch doesn't supply something else, assume that hugepage
  * size aligned regions are ok without further preparation.
  */
-static inline int prepare_hugepage_range(unsigned long addr, unsigned long len)
+static inline int prepare_hugepage_range(struct file *file,
+                        unsigned long addr, unsigned long len)
 {
-        if (len & ~HPAGE_MASK)
+        struct hstate *h = hstate_file(file);
+        if (len & ~huge_page_mask(h))
                 return -EINVAL;
-        if (addr & ~HPAGE_MASK)
+        if (addr & ~huge_page_mask(h))
                 return -EINVAL;
         return 0;
 }
diff --git a/include/asm-powerpc/ide.h b/include/asm-powerpc/ide.h
index 3d90bf7d3d73..1aaf27be8741 100644
--- a/include/asm-powerpc/ide.h
+++ b/include/asm-powerpc/ide.h
@@ -14,14 +14,6 @@
 #endif
 #include <asm/io.h>
 
-#ifndef MAX_HWIFS
-#ifdef __powerpc64__
-#define MAX_HWIFS       10
-#else
-#define MAX_HWIFS       8
-#endif
-#endif
-
 #define __ide_mm_insw(p, a, c)  readsw((void __iomem *)(p), (a), (c))
 #define __ide_mm_insl(p, a, c)  readsl((void __iomem *)(p), (a), (c))
 #define __ide_mm_outsw(p, a, c) writesw((void __iomem *)(p), (a), (c))
@@ -40,16 +32,6 @@ static __inline__ int ide_default_irq(unsigned long base)
         case 0x170:     return 15;
         }
 #endif
-#ifdef CONFIG_PPC_PREP
-        switch (base) {
-        case 0x1f0:     return 13;
-        case 0x170:     return 13;
-        case 0x1e8:     return 11;
-        case 0x168:     return 10;
-        case 0xfff0:    return 14;      /* MCP(N)750 ide0 */
-        case 0xffe0:    return 15;      /* MCP(N)750 ide1 */
-        }
-#endif
         return 0;
 }
 
@@ -62,14 +44,6 @@ static __inline__ unsigned long ide_default_io_base(int index)
         case 1:         return 0x170;
         }
 #endif
-#ifdef CONFIG_PPC_PREP
-        switch (index) {
-        case 0:         return 0x1f0;
-        case 1:         return 0x170;
-        case 2:         return 0x1e8;
-        case 3:         return 0x168;
-        }
-#endif
         return 0;
 }
 
diff --git a/include/asm-powerpc/io.h b/include/asm-powerpc/io.h
index 8b627823f5f9..77c7fa025e65 100644
--- a/include/asm-powerpc/io.h
+++ b/include/asm-powerpc/io.h
@@ -617,7 +617,8 @@ static inline void iosync(void)
  *   and can be hooked by the platform via ppc_md
  *
  * * ioremap_flags allows to specify the page flags as an argument and can
- *   also be hooked by the platform via ppc_md
+ *   also be hooked by the platform via ppc_md. ioremap_prot is the exact
+ *   same thing as ioremap_flags.
  *
  * * ioremap_nocache is identical to ioremap
  *
@@ -639,6 +640,8 @@ extern void __iomem *ioremap(phys_addr_t address, unsigned long size);
 extern void __iomem *ioremap_flags(phys_addr_t address, unsigned long size,
                                    unsigned long flags);
 #define ioremap_nocache(addr, size)     ioremap((addr), (size))
+#define ioremap_prot(addr, size, prot)  ioremap_flags((addr), (size), (prot))
+
 extern void iounmap(volatile void __iomem *addr);
 
 extern void __iomem *__ioremap(phys_addr_t, unsigned long size,
diff --git a/include/asm-powerpc/kgdb.h b/include/asm-powerpc/kgdb.h
index b617dac82969..1399caf719ae 100644
--- a/include/asm-powerpc/kgdb.h
+++ b/include/asm-powerpc/kgdb.h
@@ -1,57 +1,65 @@
 /*
- * kgdb.h: Defines and declarations for serial line source level
- *         remote debugging of the Linux kernel using gdb.
+ * include/asm-powerpc/kgdb.h
  *
+ * The PowerPC (32/64) specific defines / externs for KGDB.  Based on
+ * the previous 32bit and 64bit specific files, which had the following
+ * copyrights:
+ *
+ * PPC64 Mods (C) 2005 Frank Rowand (frowand@mvista.com)
+ * PPC Mods (C) 2004 Tom Rini (trini@mvista.com)
+ * PPC Mods (C) 2003 John Whitney (john.whitney@timesys.com)
  * PPC Mods (C) 1998 Michael Tesch (tesch@cs.wisc.edu)
  *
+ *
  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ * Author: Tom Rini <trini@kernel.crashing.org>
+ *
+ * 2006 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
  */
 #ifdef __KERNEL__
-#ifndef _PPC_KGDB_H
-#define _PPC_KGDB_H
+#ifndef __POWERPC_KGDB_H__
+#define __POWERPC_KGDB_H__
 
 #ifndef __ASSEMBLY__
 
-/* Things specific to the gen550 backend. */
-struct uart_port;
-
-extern void gen550_progress(char *, unsigned short);
-extern void gen550_kgdb_map_scc(void);
-extern void gen550_init(int, struct uart_port *);
-
-/* Things specific to the pmac backend. */
-extern void zs_kgdb_hook(int tty_num);
-
-/* To init the kgdb engine. (called by serial hook)*/
-extern void set_debug_traps(void);
-
-/* To enter the debugger explicitly. */
-extern void breakpoint(void);
-
-/* For taking exceptions
- * these are defined in traps.c
- */
-extern int (*debugger)(struct pt_regs *regs);
-extern int (*debugger_bpt)(struct pt_regs *regs);
-extern int (*debugger_sstep)(struct pt_regs *regs);
-extern int (*debugger_iabr_match)(struct pt_regs *regs);
-extern int (*debugger_dabr_match)(struct pt_regs *regs);
-extern void (*debugger_fault_handler)(struct pt_regs *regs);
-
-/* What we bring to the party */
-int kgdb_bpt(struct pt_regs *regs);
-int kgdb_sstep(struct pt_regs *regs);
-void kgdb(struct pt_regs *regs);
-int kgdb_iabr_match(struct pt_regs *regs);
-int kgdb_dabr_match(struct pt_regs *regs);
+#define BREAK_INSTR_SIZE        4
+#define BUFMAX                  ((NUMREGBYTES * 2) + 512)
+#define OUTBUFMAX               ((NUMREGBYTES * 2) + 512)
+static inline void arch_kgdb_breakpoint(void)
+{
+        asm(".long 0x7d821008"); /* twge r2, r2 */
+}
+#define CACHE_FLUSH_IS_SAFE     1
 
+/* The number bytes of registers we have to save depends on a few
+ * things.  For 64bit we default to not including vector registers and
+ * vector state registers. */
+#ifdef CONFIG_PPC64
 /*
- * external low-level support routines (ie macserial.c)
+ * 64 bit (8 byte) registers:
+ *   32 gpr, 32 fpr, nip, msr, link, ctr
+ * 32 bit (4 byte) registers:
+ *   ccr, xer, fpscr
  */
-extern void kgdb_interruptible(int); /* control interrupts from serial */
-extern void putDebugChar(char);   /* write a single character      */
-extern char getDebugChar(void);   /* read and return a single char */
-
+#define NUMREGBYTES             ((68 * 8) + (3 * 4))
+#define NUMCRITREGBYTES         184
+#else /* CONFIG_PPC32 */
+/* On non-E500 family PPC32 we determine the size by picking the last
+ * register we need, but on E500 we skip sections so we list what we
+ * need to store, and add it up. */
+#ifndef CONFIG_E500
+#define MAXREG                  (PT_FPSCR+1)
+#else
+/* 32 GPRs (8 bytes), nip, msr, ccr, link, ctr, xer, acc (8 bytes), spefscr*/
+#define MAXREG                 ((32*2)+6+2+1)
+#endif
+#define NUMREGBYTES             (MAXREG * sizeof(int))
+/* CR/LR, R1, R2, R13-R31 inclusive. */
+#define NUMCRITREGBYTES         (23 * sizeof(int))
+#endif /* 32/64 */
 #endif /* !(__ASSEMBLY__) */
-#endif /* !(_PPC_KGDB_H) */
+#endif /* !__POWERPC_KGDB_H__ */
 #endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h
index 989922621e35..1233d735fd28 100644
--- a/include/asm-powerpc/machdep.h
+++ b/include/asm-powerpc/machdep.h
@@ -80,7 +80,8 @@ struct machdep_calls {
                                      long index,
                                      long npages,
                                      unsigned long uaddr,
-                                     enum dma_data_direction direction);
+                                     enum dma_data_direction direction,
+                                     struct dma_attrs *attrs);
         void            (*tce_free)(struct iommu_table *tbl,
                                     long index,
                                     long npages);
diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h
index d1dc16afb118..19c7a9403490 100644
--- a/include/asm-powerpc/mmu-hash64.h
+++ b/include/asm-powerpc/mmu-hash64.h
@@ -194,9 +194,9 @@ extern int mmu_ci_restrictions;
 
 #ifdef CONFIG_HUGETLB_PAGE
 /*
- * The page size index of the huge pages for use by hugetlbfs
+ * The page size indexes of the huge pages for use by hugetlbfs
  */
-extern int mmu_huge_psize;
+extern unsigned int mmu_huge_psizes[MMU_PAGE_COUNT];
 
 #endif /* CONFIG_HUGETLB_PAGE */
 
@@ -281,6 +281,8 @@ extern int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
                              unsigned long pstart, unsigned long mode,
                              int psize, int ssize);
 extern void set_huge_psize(int psize);
+extern void add_gpage(unsigned long addr, unsigned long page_size,
+                          unsigned long number_of_pages);
 extern void demote_segment_4k(struct mm_struct *mm, unsigned long addr);
 
 extern void htab_initialize(void);
diff --git a/include/asm-powerpc/page.h b/include/asm-powerpc/page.h
index cffdf0eb0df6..e088545cb3f5 100644
--- a/include/asm-powerpc/page.h
+++ b/include/asm-powerpc/page.h
@@ -119,9 +119,6 @@ extern phys_addr_t kernstart_addr;
 /* align addr on a size boundary - adjust address up if needed */
 #define _ALIGN(addr,size)     _ALIGN_UP(addr,size)
 
-/* to align the pointer to the (next) page boundary */
-#define PAGE_ALIGN(addr)        _ALIGN(addr, PAGE_SIZE)
-
 /*
  * Don't compare things with KERNELBASE or PAGE_OFFSET to test for
  * "kernelness", use is_kernel_addr() - it should do what you want.
diff --git a/include/asm-powerpc/page_64.h b/include/asm-powerpc/page_64.h
index 02fd80710e9d..043bfdfe4f73 100644
--- a/include/asm-powerpc/page_64.h
+++ b/include/asm-powerpc/page_64.h
@@ -90,6 +90,7 @@ extern unsigned int HPAGE_SHIFT;
 #define HPAGE_SIZE              ((1UL) << HPAGE_SHIFT)
 #define HPAGE_MASK              (~(HPAGE_SIZE - 1))
 #define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
+#define HUGE_MAX_HSTATE         3
 
 #endif /* __ASSEMBLY__ */
 
diff --git a/include/asm-powerpc/pgalloc-64.h b/include/asm-powerpc/pgalloc-64.h
index 68980990f62a..812a1d8f35cb 100644
--- a/include/asm-powerpc/pgalloc-64.h
+++ b/include/asm-powerpc/pgalloc-64.h
@@ -22,7 +22,7 @@ extern struct kmem_cache *pgtable_cache[];
 #define PUD_CACHE_NUM           1
 #define PMD_CACHE_NUM           1
 #define HUGEPTE_CACHE_NUM       2
-#define PTE_NONCACHE_NUM        3  /* from GFP rather than kmem_cache */
+#define PTE_NONCACHE_NUM        7  /* from GFP rather than kmem_cache */
 
 static inline pgd_t *pgd_alloc(struct mm_struct *mm)
 {
@@ -119,7 +119,7 @@ static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
         __free_page(ptepage);
 }
 
-#define PGF_CACHENUM_MASK       0x3
+#define PGF_CACHENUM_MASK       0x7
 
 typedef struct pgtable_free {
         unsigned long val;
diff --git a/include/asm-powerpc/pgtable-4k.h b/include/asm-powerpc/pgtable-4k.h
index fd2090dc1dce..c9601dfb4a1e 100644
--- a/include/asm-powerpc/pgtable-4k.h
+++ b/include/asm-powerpc/pgtable-4k.h
@@ -51,6 +51,9 @@
 #define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | \
                          _PAGE_SECONDARY | _PAGE_GROUP_IX)
 
+/* There is no 4K PFN hack on 4K pages */
+#define _PAGE_4K_PFN    0
+
 /* PAGE_MASK gives the right answer below, but only by accident */
 /* It should be preserving the high 48 bits and then specifically */
 /* preserving _PAGE_SECONDARY | _PAGE_GROUP_IX */
diff --git a/include/asm-powerpc/pgtable-64k.h b/include/asm-powerpc/pgtable-64k.h
index c5007712473f..7e54adb35596 100644
--- a/include/asm-powerpc/pgtable-64k.h
+++ b/include/asm-powerpc/pgtable-64k.h
@@ -138,7 +138,7 @@ static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
                 unsigned __split = (psize == MMU_PAGE_4K ||                 \
                                     psize == MMU_PAGE_64K_AP);              \
                 shift = mmu_psize_defs[psize].shift;                        \
-                for (index = 0; va < __end; index++, va += (1 << shift)) {  \
+                for (index = 0; va < __end; index++, va += (1L << shift)) { \
                         if (!__split || __rpte_sub_valid(rpte, index)) do { \
 
 #define pte_iterate_hashed_end() } while(0); } } while(0)
diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h
index 73015f0139de..bdbab72f3ebc 100644
--- a/include/asm-powerpc/pgtable-ppc32.h
+++ b/include/asm-powerpc/pgtable-ppc32.h
@@ -295,10 +295,10 @@ extern int icache_44x_need_flush;
 #define _PAGE_PRESENT   0x00001 /* S: PTE contains a translation */
 #define _PAGE_USER      0x00002 /* S: User page (maps to UR) */
 #define _PAGE_FILE      0x00002 /* S: when !present: nonlinear file mapping */
-#define _PAGE_ACCESSED  0x00004 /* S: Page referenced */
-#define _PAGE_HWWRITE   0x00008 /* H: Dirty & RW, set in exception */
-#define _PAGE_RW        0x00010 /* S: Write permission */
-#define _PAGE_HWEXEC    0x00020 /* H: UX permission */
+#define _PAGE_RW        0x00004 /* S: Write permission (SW) */
+#define _PAGE_DIRTY     0x00008 /* S: Page dirty */
+#define _PAGE_HWEXEC    0x00010 /* H: SX permission */
+#define _PAGE_ACCESSED  0x00020 /* S: Page referenced */
 
 #define _PAGE_ENDIAN    0x00040 /* H: E bit */
 #define _PAGE_GUARDED   0x00080 /* H: G bit */
@@ -307,21 +307,14 @@ extern int icache_44x_need_flush;
 #define _PAGE_WRITETHRU 0x00400 /* H: W bit */
 
 #ifdef CONFIG_PTE_64BIT
-#define _PAGE_DIRTY     0x08000 /* S: Page dirty */
-
 /* ERPN in a PTE never gets cleared, ignore it */
 #define _PTE_NONE_MASK  0xffffffffffff0000ULL
-#else
-#define _PAGE_DIRTY     0x00800 /* S: Page dirty */
 #endif
 
 #define _PMD_PRESENT    0
 #define _PMD_PRESENT_MASK (PAGE_MASK)
 #define _PMD_BAD        (~PAGE_MASK)
 
-/* Until my rework is finished, FSL BookE still needs atomic PTE updates */
-#define PTE_ATOMIC_UPDATES      1
-
 #elif defined(CONFIG_8xx)
 /* Definitions for 8xx embedded chips. */
 #define _PAGE_PRESENT   0x0001  /* Page is valid */
@@ -402,6 +395,12 @@ extern int icache_44x_need_flush;
 #ifndef _PAGE_EXEC
 #define _PAGE_EXEC      0
 #endif
+#ifndef _PAGE_ENDIAN
+#define _PAGE_ENDIAN    0
+#endif
+#ifndef _PAGE_COHERENT
+#define _PAGE_COHERENT  0
+#endif
 #ifndef _PMD_PRESENT_MASK
 #define _PMD_PRESENT_MASK       _PMD_PRESENT
 #endif
@@ -412,6 +411,12 @@ extern int icache_44x_need_flush;
 
 #define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
 
+
+#define PAGE_PROT_BITS  __pgprot(_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
+                                 _PAGE_WRITETHRU | _PAGE_ENDIAN | \
+                                 _PAGE_USER | _PAGE_ACCESSED | \
+                                 _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \
+                                 _PAGE_EXEC | _PAGE_HWEXEC)
 /*
  * Note: the _PAGE_COHERENT bit automatically gets set in the hardware
  * PTE if CONFIG_SMP is defined (hash_page does this); there is no need
@@ -545,6 +550,10 @@ static inline pte_t pte_mkyoung(pte_t pte) {
         pte_val(pte) |= _PAGE_ACCESSED; return pte; }
 static inline pte_t pte_mkspecial(pte_t pte) {
         return pte; }
+static inline unsigned long pte_pgprot(pte_t pte)
+{
+        return __pgprot(pte_val(pte)) & PAGE_PROT_BITS;
+}
 
 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 {
diff --git a/include/asm-powerpc/pgtable-ppc64.h b/include/asm-powerpc/pgtable-ppc64.h
index ab98a9c80b28..ba8000352b9a 100644
--- a/include/asm-powerpc/pgtable-ppc64.h
+++ b/include/asm-powerpc/pgtable-ppc64.h
@@ -117,6 +117,10 @@
 #define PAGE_AGP        __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE)
 #define HAVE_PAGE_AGP
 
+#define PAGE_PROT_BITS  __pgprot(_PAGE_GUARDED | _PAGE_COHERENT | \
+                                 _PAGE_NO_CACHE | _PAGE_WRITETHRU | \
+                                 _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER | \
+                                 _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC)
 /* PTEIDX nibble */
 #define _PTEIDX_SECONDARY       0x8
 #define _PTEIDX_GROUP_IX        0x7
@@ -262,6 +266,10 @@ static inline pte_t pte_mkhuge(pte_t pte) {
         return pte; }
 static inline pte_t pte_mkspecial(pte_t pte) {
         return pte; }
+static inline unsigned long pte_pgprot(pte_t pte)
+{
+        return __pgprot(pte_val(pte)) & PAGE_PROT_BITS;
+}
 
 /* Atomic PTE updates */
 static inline unsigned long pte_update(struct mm_struct *mm,
diff --git a/include/asm-powerpc/pmi.h b/include/asm-powerpc/pmi.h
index e1dc090748df..b4e91fbf5081 100644
--- a/include/asm-powerpc/pmi.h
+++ b/include/asm-powerpc/pmi.h
@@ -30,6 +30,7 @@
 #ifdef __KERNEL__
 
 #define PMI_TYPE_FREQ_CHANGE    0x01
+#define PMI_TYPE_POWER_BUTTON   0x02
 #define PMI_READ_TYPE           0
 #define PMI_READ_DATA0          1
 #define PMI_READ_DATA1          2
diff --git a/include/asm-powerpc/ps3.h b/include/asm-powerpc/ps3.h
index 81ffe3b3c1ce..f9e34c493cbb 100644
--- a/include/asm-powerpc/ps3.h
+++ b/include/asm-powerpc/ps3.h
@@ -337,12 +337,18 @@ enum ps3_system_bus_device_type {
         PS3_DEVICE_TYPE_LPM,
 };
 
+enum ps3_match_sub_id {
+        /* for PS3_MATCH_ID_GRAPHICS */
+        PS3_MATCH_SUB_ID_FB             = 1,
+};
+
 /**
  * struct ps3_system_bus_device - a device on the system bus
  */
 
 struct ps3_system_bus_device {
         enum ps3_match_id match_id;
+        enum ps3_match_sub_id match_sub_id;
         enum ps3_system_bus_device_type dev_type;
 
         u64 bus_id;                       /* SB */
@@ -371,6 +377,7 @@ int ps3_close_hv_device(struct ps3_system_bus_device *dev);
 
 struct ps3_system_bus_driver {
         enum ps3_match_id match_id;
+        enum ps3_match_sub_id match_sub_id;
         struct device_driver core;
         int (*probe)(struct ps3_system_bus_device *);
         int (*remove)(struct ps3_system_bus_device *);
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index bbccadfee0d6..c6d1ab650778 100644
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -155,10 +155,12 @@
 #define   CTRL_RUNLATCH 0x1
 #define SPRN_DABR       0x3F5   /* Data Address Breakpoint Register */
 #define   DABR_TRANSLATION      (1UL << 2)
+#define SPRN_DABR2      0x13D   /* e300 */
 #define SPRN_DABRX      0x3F7   /* Data Address Breakpoint Register Extension */
 #define   DABRX_USER    (1UL << 0)
 #define   DABRX_KERNEL  (1UL << 1)
 #define SPRN_DAR        0x013   /* Data Address Register */
+#define SPRN_DBCR       0x136   /* e300 Data Breakpoint Control Reg */
 #define SPRN_DSISR      0x012   /* Data Storage Interrupt Status Register */
 #define   DSISR_NOHPTE          0x40000000      /* no translation found */
 #define   DSISR_PROTFAULT       0x08000000      /* protection fault */
@@ -264,6 +266,8 @@
 #define HID1_PS         (1<<16)         /* 750FX PLL selection */
 #define SPRN_HID2       0x3F8           /* Hardware Implementation Register 2 */
 #define SPRN_IABR       0x3F2   /* Instruction Address Breakpoint Register */
+#define SPRN_IABR2      0x3FA           /* 83xx */
+#define SPRN_IBCR       0x135           /* 83xx Insn Breakpoint Control Reg */
 #define SPRN_HID4       0x3F4           /* 970 HID4 */
 #define SPRN_HID5       0x3F6           /* 970 HID5 */
 #define SPRN_HID6       0x3F9   /* BE HID 6 */
diff --git a/include/asm-powerpc/semaphore.h b/include/asm-powerpc/semaphore.h
deleted file mode 100644
index d9b2034ed1d2..000000000000
--- a/include/asm-powerpc/semaphore.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <linux/semaphore.h>
diff --git a/include/asm-powerpc/uaccess.h b/include/asm-powerpc/uaccess.h
index 1a0736f8803f..bd0fb8495154 100644
--- a/include/asm-powerpc/uaccess.h
+++ b/include/asm-powerpc/uaccess.h
@@ -6,6 +6,7 @@
 
 #include <linux/sched.h>
 #include <linux/errno.h>
+#include <asm/asm-compat.h>
 #include <asm/processor.h>
 #include <asm/page.h>
 
@@ -141,12 +142,11 @@ extern long __put_user_bad(void);
                 "       b 2b\n"                                 \
                 ".previous\n"                                   \
                 ".section __ex_table,\"a\"\n"                   \
-                "       .balign %5\n"                           \
+                        PPC_LONG_ALIGN "\n"                     \
                         PPC_LONG "1b,3b\n"                      \
                 ".previous"                                     \
                 : "=r" (err)                                    \
-                : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err),\
-                  "i"(sizeof(unsigned long)))
+                : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err))
 
 #ifdef __powerpc64__
 #define __put_user_asm2(x, ptr, retval)                         \
@@ -162,13 +162,12 @@ extern long __put_user_bad(void);
                 "       b 3b\n"                                 \
                 ".previous\n"                                   \
                 ".section __ex_table,\"a\"\n"                   \
-                "       .balign %5\n"                           \
+                        PPC_LONG_ALIGN "\n"                     \
                         PPC_LONG "1b,4b\n"                      \
                         PPC_LONG "2b,4b\n"                      \
                 ".previous"                                     \
                 : "=r" (err)                                    \
-                : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err),\
-                  "i"(sizeof(unsigned long)))
+                : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err))
 #endif /* __powerpc64__ */
 
 #define __put_user_size(x, ptr, size, retval)                   \
@@ -226,12 +225,11 @@ extern long __get_user_bad(void);
                 "       b 2b\n"                         \
                 ".previous\n"                           \
                 ".section __ex_table,\"a\"\n"           \
-                "       .balign %5\n"                   \
+                        PPC_LONG_ALIGN "\n"             \
                         PPC_LONG "1b,3b\n"              \
                 ".previous"                             \
                 : "=r" (err), "=r" (x)                  \
-                : "b" (addr), "i" (-EFAULT), "0" (err), \
-                  "i"(sizeof(unsigned long)))
+                : "b" (addr), "i" (-EFAULT), "0" (err))
 
 #ifdef __powerpc64__
 #define __get_user_asm2(x, addr, err)                   \
@@ -249,13 +247,12 @@ extern long __get_user_bad(void);
                 "       b 3b\n"                         \
                 ".previous\n"                           \
                 ".section __ex_table,\"a\"\n"           \
-                "       .balign %5\n"                   \
+                        PPC_LONG_ALIGN "\n"             \
                         PPC_LONG "1b,4b\n"              \
                         PPC_LONG "2b,4b\n"              \
                 ".previous"                             \
                 : "=r" (err), "=&r" (x)                 \
-                : "b" (addr), "i" (-EFAULT), "0" (err), \
-                  "i"(sizeof(unsigned long)))
+                : "b" (addr), "i" (-EFAULT), "0" (err))
 #endif /* __powerpc64__ */
 
 #define __get_user_size(x, ptr, size, retval)                   \
diff --git a/include/asm-powerpc/ucc_fast.h b/include/asm-powerpc/ucc_fast.h
index f529f70b1d82..fce16abe7ee1 100644
--- a/include/asm-powerpc/ucc_fast.h
+++ b/include/asm-powerpc/ucc_fast.h
@@ -156,11 +156,11 @@ struct ucc_fast_info {
 
 struct ucc_fast_private {
         struct ucc_fast_info *uf_info;
-        struct ucc_fast *uf_regs;       /* a pointer to memory map of UCC regs. */
-        u32 *p_ucce;            /* a pointer to the event register in memory. */
-        u32 *p_uccm;            /* a pointer to the mask register in memory. */
+        struct ucc_fast __iomem *uf_regs; /* a pointer to the UCC regs. */
+        u32 __iomem *p_ucce;    /* a pointer to the event register in memory. */
+        u32 __iomem *p_uccm;    /* a pointer to the mask register in memory. */
 #ifdef CONFIG_UGETH_TX_ON_DEMAND
-        u16 *p_utodr;           /* pointer to the transmit on demand register */
+        u16 __iomem *p_utodr;   /* pointer to the transmit on demand register */
 #endif
         int enabled_tx;         /* Whether channel is enabled for Tx (ENT) */
         int enabled_rx;         /* Whether channel is enabled for Rx (ENR) */