aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-powerpc
diff options
context:
space:
mode:
Diffstat (limited to 'include/asm-powerpc')
-rw-r--r--include/asm-powerpc/irq.h86
1 files changed, 0 insertions, 86 deletions
diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h
index 0efe7b24b633..b5c03127a9b9 100644
--- a/include/asm-powerpc/irq.h
+++ b/include/asm-powerpc/irq.h
@@ -483,92 +483,6 @@ static __inline__ int irq_canonicalize(int irq)
483 */ 483 */
484#define mk_int_int_mask(IL) (1 << (7 - (IL/2))) 484#define mk_int_int_mask(IL) (1 << (7 - (IL/2)))
485 485
486#elif defined(CONFIG_PPC_86xx)
487#include <asm/mpc86xx.h>
488
489#define NR_EPIC_INTS 48
490#ifndef NR_8259_INTS
491#define NR_8259_INTS 16 /*ULI 1575 can route 12 interrupts */
492#endif
493#define NUM_8259_INTERRUPTS NR_8259_INTS
494
495#ifndef I8259_OFFSET
496#define I8259_OFFSET 0
497#endif
498
499#define NR_IRQS 256
500
501/* Internal IRQs on MPC86xx OpenPIC */
502
503#ifndef MPC86xx_OPENPIC_IRQ_OFFSET
504#define MPC86xx_OPENPIC_IRQ_OFFSET NR_8259_INTS
505#endif
506
507/* The 48 internal sources */
508#define MPC86xx_IRQ_NULL ( 0 + MPC86xx_OPENPIC_IRQ_OFFSET)
509#define MPC86xx_IRQ_MCM ( 1 + MPC86xx_OPENPIC_IRQ_OFFSET)
510#define MPC86xx_IRQ_DDR ( 2 + MPC86xx_OPENPIC_IRQ_OFFSET)
511#define MPC86xx_IRQ_LBC ( 3 + MPC86xx_OPENPIC_IRQ_OFFSET)
512#define MPC86xx_IRQ_DMA0 ( 4 + MPC86xx_OPENPIC_IRQ_OFFSET)
513#define MPC86xx_IRQ_DMA1 ( 5 + MPC86xx_OPENPIC_IRQ_OFFSET)
514#define MPC86xx_IRQ_DMA2 ( 6 + MPC86xx_OPENPIC_IRQ_OFFSET)
515#define MPC86xx_IRQ_DMA3 ( 7 + MPC86xx_OPENPIC_IRQ_OFFSET)
516
517/* no 10,11 */
518#define MPC86xx_IRQ_UART2 (12 + MPC86xx_OPENPIC_IRQ_OFFSET)
519#define MPC86xx_IRQ_TSEC1_TX (13 + MPC86xx_OPENPIC_IRQ_OFFSET)
520#define MPC86xx_IRQ_TSEC1_RX (14 + MPC86xx_OPENPIC_IRQ_OFFSET)
521#define MPC86xx_IRQ_TSEC3_TX (15 + MPC86xx_OPENPIC_IRQ_OFFSET)
522#define MPC86xx_IRQ_TSEC3_RX (16 + MPC86xx_OPENPIC_IRQ_OFFSET)
523#define MPC86xx_IRQ_TSEC3_ERROR (17 + MPC86xx_OPENPIC_IRQ_OFFSET)
524#define MPC86xx_IRQ_TSEC1_ERROR (18 + MPC86xx_OPENPIC_IRQ_OFFSET)
525#define MPC86xx_IRQ_TSEC2_TX (19 + MPC86xx_OPENPIC_IRQ_OFFSET)
526#define MPC86xx_IRQ_TSEC2_RX (20 + MPC86xx_OPENPIC_IRQ_OFFSET)
527#define MPC86xx_IRQ_TSEC4_TX (21 + MPC86xx_OPENPIC_IRQ_OFFSET)
528#define MPC86xx_IRQ_TSEC4_RX (22 + MPC86xx_OPENPIC_IRQ_OFFSET)
529#define MPC86xx_IRQ_TSEC4_ERROR (23 + MPC86xx_OPENPIC_IRQ_OFFSET)
530#define MPC86xx_IRQ_TSEC2_ERROR (24 + MPC86xx_OPENPIC_IRQ_OFFSET)
531/* no 25 */
532#define MPC86xx_IRQ_UART1 (26 + MPC86xx_OPENPIC_IRQ_OFFSET)
533#define MPC86xx_IRQ_IIC (27 + MPC86xx_OPENPIC_IRQ_OFFSET)
534#define MPC86xx_IRQ_PERFMON (28 + MPC86xx_OPENPIC_IRQ_OFFSET)
535/* no 29,30,31 */
536#define MPC86xx_IRQ_SRIO_ERROR (32 + MPC86xx_OPENPIC_IRQ_OFFSET)
537#define MPC86xx_IRQ_SRIO_OUT_BELL (33 + MPC86xx_OPENPIC_IRQ_OFFSET)
538#define MPC86xx_IRQ_SRIO_IN_BELL (34 + MPC86xx_OPENPIC_IRQ_OFFSET)
539/* no 35,36 */
540#define MPC86xx_IRQ_SRIO_OUT_MSG1 (37 + MPC86xx_OPENPIC_IRQ_OFFSET)
541#define MPC86xx_IRQ_SRIO_IN_MSG1 (38 + MPC86xx_OPENPIC_IRQ_OFFSET)
542#define MPC86xx_IRQ_SRIO_OUT_MSG2 (39 + MPC86xx_OPENPIC_IRQ_OFFSET)
543#define MPC86xx_IRQ_SRIO_IN_MSG2 (40 + MPC86xx_OPENPIC_IRQ_OFFSET)
544
545/* The 12 external interrupt lines */
546#define MPC86xx_IRQ_EXT_BASE 48
547#define MPC86xx_IRQ_EXT0 (0 + MPC86xx_IRQ_EXT_BASE \
548 + MPC86xx_OPENPIC_IRQ_OFFSET)
549#define MPC86xx_IRQ_EXT1 (1 + MPC86xx_IRQ_EXT_BASE \
550 + MPC86xx_OPENPIC_IRQ_OFFSET)
551#define MPC86xx_IRQ_EXT2 (2 + MPC86xx_IRQ_EXT_BASE \
552 + MPC86xx_OPENPIC_IRQ_OFFSET)
553#define MPC86xx_IRQ_EXT3 (3 + MPC86xx_IRQ_EXT_BASE \
554 + MPC86xx_OPENPIC_IRQ_OFFSET)
555#define MPC86xx_IRQ_EXT4 (4 + MPC86xx_IRQ_EXT_BASE \
556 + MPC86xx_OPENPIC_IRQ_OFFSET)
557#define MPC86xx_IRQ_EXT5 (5 + MPC86xx_IRQ_EXT_BASE \
558 + MPC86xx_OPENPIC_IRQ_OFFSET)
559#define MPC86xx_IRQ_EXT6 (6 + MPC86xx_IRQ_EXT_BASE \
560 + MPC86xx_OPENPIC_IRQ_OFFSET)
561#define MPC86xx_IRQ_EXT7 (7 + MPC86xx_IRQ_EXT_BASE \
562 + MPC86xx_OPENPIC_IRQ_OFFSET)
563#define MPC86xx_IRQ_EXT8 (8 + MPC86xx_IRQ_EXT_BASE \
564 + MPC86xx_OPENPIC_IRQ_OFFSET)
565#define MPC86xx_IRQ_EXT9 (9 + MPC86xx_IRQ_EXT_BASE \
566 + MPC86xx_OPENPIC_IRQ_OFFSET)
567#define MPC86xx_IRQ_EXT10 (10 + MPC86xx_IRQ_EXT_BASE \
568 + MPC86xx_OPENPIC_IRQ_OFFSET)
569#define MPC86xx_IRQ_EXT11 (11 + MPC86xx_IRQ_EXT_BASE \
570 + MPC86xx_OPENPIC_IRQ_OFFSET)
571
572#else /* CONFIG_40x + CONFIG_8xx */ 486#else /* CONFIG_40x + CONFIG_8xx */
573/* 487/*
574 * this is the # irq's for all ppc arch's (pmac/chrp/prep) 488 * this is the # irq's for all ppc arch's (pmac/chrp/prep)