3 files changed, 15 insertions, 4 deletions

diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h
index 7c97b5a08d08..c08e714d0c42 100644
--- a/include/asm-powerpc/pgtable-ppc32.h
+++ b/include/asm-powerpc/pgtable-ppc32.h
@@ -209,6 +209,13 @@ extern int icache_44x_need_flush;
  *   0  1  2  3  4  ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
  *   -  -  -  -  -    - U0 U1 U2 U3 W  I  M  G  E   - UX UW UR SX SW SR
  *
+ * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional
+ * TLB2 storage attibute fields. Those are:
+ *
+ *   TLB2:
+ *   0...10    11   12   13   14   15   16...31
+ *   no change WL1  IL1I IL1D IL2I IL2D no change
+ *
  * There are some constrains and options, to decide mapping software bits
  * into TLB entry.
  *
diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
index e3c845b0f764..6abead6e681a 100644
--- a/include/asm-powerpc/spu.h
+++ b/include/asm-powerpc/spu.h
@@ -100,6 +100,7 @@
 
 /* Flag indicating progress during context switch. */
 #define SPU_CONTEXT_SWITCH_PENDING      0UL
+#define SPU_CONTEXT_FAULT_PENDING       1UL
 
 struct spu_context;
 struct spu_runqueue;
@@ -128,9 +129,11 @@ struct spu {
         unsigned int irqs[3];
         u32 node;
         u64 flags;
-        u64 dar;
-        u64 dsisr;
         u64 class_0_pending;
+        u64 class_0_dar;
+        u64 class_0_dsisr;
+        u64 class_1_dar;
+        u64 class_1_dsisr;
         size_t ls_size;
         unsigned int slb_replace;
         struct mm_struct *mm;
@@ -143,7 +146,7 @@ struct spu {
 
         void (* wbox_callback)(struct spu *spu);
         void (* ibox_callback)(struct spu *spu);
-        void (* stop_callback)(struct spu *spu);
+        void (* stop_callback)(struct spu *spu, int irq);
         void (* mfc_callback)(struct spu *spu);
 
         char irq_c0[8];
diff --git a/include/asm-powerpc/spu_csa.h b/include/asm-powerpc/spu_csa.h
index 0ab6bff86078..129ec148d451 100644
--- a/include/asm-powerpc/spu_csa.h
+++ b/include/asm-powerpc/spu_csa.h
@@ -254,7 +254,8 @@ struct spu_state {
         u64 spu_chnldata_RW[32];
         u32 spu_mailbox_data[4];
         u32 pu_mailbox_data[1];
-        u64 dar, dsisr, class_0_pending;
+        u64 class_0_dar, class_0_dsisr, class_0_pending;
+        u64 class_1_dar, class_1_dsisr;
         unsigned long suspend_time;
         spinlock_t register_lock;
 };