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-rw-r--r--include/asm-powerpc/current.h1
-rw-r--r--include/asm-powerpc/edac.h40
-rw-r--r--include/asm-powerpc/eeh_event.h6
-rw-r--r--include/asm-powerpc/ibmebus.h44
-rw-r--r--include/asm-powerpc/immap_86xx.h75
-rw-r--r--include/asm-powerpc/paca.h3
-rw-r--r--include/asm-powerpc/pci.h14
-rw-r--r--include/asm-powerpc/ppc-pci.h12
-rw-r--r--include/asm-powerpc/processor.h1
-rw-r--r--include/asm-powerpc/prom.h3
10 files changed, 88 insertions, 111 deletions
diff --git a/include/asm-powerpc/current.h b/include/asm-powerpc/current.h
index b8708aedf925..e2c7f06931e7 100644
--- a/include/asm-powerpc/current.h
+++ b/include/asm-powerpc/current.h
@@ -12,6 +12,7 @@
12struct task_struct; 12struct task_struct;
13 13
14#ifdef __powerpc64__ 14#ifdef __powerpc64__
15#include <linux/stddef.h>
15#include <asm/paca.h> 16#include <asm/paca.h>
16 17
17static inline struct task_struct *get_current(void) 18static inline struct task_struct *get_current(void)
diff --git a/include/asm-powerpc/edac.h b/include/asm-powerpc/edac.h
new file mode 100644
index 000000000000..6ead88bbfbb8
--- /dev/null
+++ b/include/asm-powerpc/edac.h
@@ -0,0 +1,40 @@
1/*
2 * PPC EDAC common defs
3 *
4 * Author: Dave Jiang <djiang@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef ASM_EDAC_H
12#define ASM_EDAC_H
13/*
14 * ECC atomic, DMA, SMP and interrupt safe scrub function.
15 * Implements the per arch atomic_scrub() that EDAC use for software
16 * ECC scrubbing. It reads memory and then writes back the original
17 * value, allowing the hardware to detect and correct memory errors.
18 */
19static __inline__ void atomic_scrub(void *va, u32 size)
20{
21 unsigned int *virt_addr = va;
22 unsigned int temp;
23 unsigned int i;
24
25 for (i = 0; i < size / sizeof(*virt_addr); i++, virt_addr++) {
26 /* Very carefully read and write to memory atomically
27 * so we are interrupt, DMA and SMP safe.
28 */
29 __asm__ __volatile__ ("\n\
30 1: lwarx %0,0,%1\n\
31 stwcx. %0,0,%1\n\
32 bne- 1b\n\
33 isync"
34 : "=&r"(temp)
35 : "r"(virt_addr)
36 : "cr0", "memory");
37 }
38}
39
40#endif
diff --git a/include/asm-powerpc/eeh_event.h b/include/asm-powerpc/eeh_event.h
index dc6bf0ffb796..cc3cb04539ac 100644
--- a/include/asm-powerpc/eeh_event.h
+++ b/include/asm-powerpc/eeh_event.h
@@ -30,8 +30,6 @@ struct eeh_event {
30 struct list_head list; 30 struct list_head list;
31 struct device_node *dn; /* struct device node */ 31 struct device_node *dn; /* struct device node */
32 struct pci_dev *dev; /* affected device */ 32 struct pci_dev *dev; /* affected device */
33 enum pci_channel_state state; /* PCI bus state for the affected device */
34 int time_unavail; /* milliseconds until device might be available */
35}; 33};
36 34
37/** 35/**
@@ -46,9 +44,7 @@ struct eeh_event {
46 * (from a workqueue). 44 * (from a workqueue).
47 */ 45 */
48int eeh_send_failure_event (struct device_node *dn, 46int eeh_send_failure_event (struct device_node *dn,
49 struct pci_dev *dev, 47 struct pci_dev *dev);
50 enum pci_channel_state state,
51 int time_unavail);
52 48
53/* Main recovery function */ 49/* Main recovery function */
54struct pci_dn * handle_eeh_events (struct eeh_event *); 50struct pci_dn * handle_eeh_events (struct eeh_event *);
diff --git a/include/asm-powerpc/ibmebus.h b/include/asm-powerpc/ibmebus.h
index 66112114b8c5..87d396e28db2 100644
--- a/include/asm-powerpc/ibmebus.h
+++ b/include/asm-powerpc/ibmebus.h
@@ -2,36 +2,37 @@
2 * IBM PowerPC eBus Infrastructure Support. 2 * IBM PowerPC eBus Infrastructure Support.
3 * 3 *
4 * Copyright (c) 2005 IBM Corporation 4 * Copyright (c) 2005 IBM Corporation
5 * Joachim Fenkes <fenkes@de.ibm.com>
5 * Heiko J Schick <schickhj@de.ibm.com> 6 * Heiko J Schick <schickhj@de.ibm.com>
6 * 7 *
7 * All rights reserved. 8 * All rights reserved.
8 * 9 *
9 * This source code is distributed under a dual license of GPL v2.0 and OpenIB 10 * This source code is distributed under a dual license of GPL v2.0 and OpenIB
10 * BSD. 11 * BSD.
11 * 12 *
12 * OpenIB BSD License 13 * OpenIB BSD License
13 * 14 *
14 * Redistribution and use in source and binary forms, with or without 15 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are met: 16 * modification, are permitted provided that the following conditions are met:
16 * 17 *
17 * Redistributions of source code must retain the above copyright notice, this 18 * Redistributions of source code must retain the above copyright notice, this
18 * list of conditions and the following disclaimer. 19 * list of conditions and the following disclaimer.
19 * 20 *
20 * Redistributions in binary form must reproduce the above copyright notice, 21 * Redistributions in binary form must reproduce the above copyright notice,
21 * this list of conditions and the following disclaimer in the documentation 22 * this list of conditions and the following disclaimer in the documentation
22 * and/or other materials 23 * and/or other materials
23 * provided with the distribution. 24 * provided with the distribution.
24 * 25 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
32 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 33 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
33 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE. 36 * POSSIBILITY OF SUCH DAMAGE.
36 */ 37 */
37 38
@@ -46,12 +47,11 @@
46 47
47extern struct bus_type ibmebus_bus_type; 48extern struct bus_type ibmebus_bus_type;
48 49
49struct ibmebus_dev { 50struct ibmebus_dev {
50 const char *name;
51 struct of_device ofdev; 51 struct of_device ofdev;
52}; 52};
53 53
54struct ibmebus_driver { 54struct ibmebus_driver {
55 char *name; 55 char *name;
56 struct of_device_id *id_table; 56 struct of_device_id *id_table;
57 int (*probe) (struct ibmebus_dev *dev, const struct of_device_id *id); 57 int (*probe) (struct ibmebus_dev *dev, const struct of_device_id *id);
@@ -63,7 +63,7 @@ int ibmebus_register_driver(struct ibmebus_driver *drv);
63void ibmebus_unregister_driver(struct ibmebus_driver *drv); 63void ibmebus_unregister_driver(struct ibmebus_driver *drv);
64 64
65int ibmebus_request_irq(struct ibmebus_dev *dev, 65int ibmebus_request_irq(struct ibmebus_dev *dev,
66 u32 ist, 66 u32 ist,
67 irq_handler_t handler, 67 irq_handler_t handler,
68 unsigned long irq_flags, const char * devname, 68 unsigned long irq_flags, const char * devname,
69 void *dev_id); 69 void *dev_id);
diff --git a/include/asm-powerpc/immap_86xx.h b/include/asm-powerpc/immap_86xx.h
index d905b6622268..59b9e07b8e99 100644
--- a/include/asm-powerpc/immap_86xx.h
+++ b/include/asm-powerpc/immap_86xx.h
@@ -85,81 +85,6 @@ typedef struct ccsr_pci {
85 char res19[472]; 85 char res19[472];
86} ccsr_pci_t; 86} ccsr_pci_t;
87 87
88/* PCI Express Registers */
89typedef struct ccsr_pex {
90 uint pex_config_addr; /* 0x.000 - PCI Express Configuration Address Register */
91 uint pex_config_data; /* 0x.004 - PCI Express Configuration Data Register */
92 char res1[4];
93 uint pex_otb_cpl_tor; /* 0x.00c - PCI Express Outbound completion timeout register */
94 uint pex_conf_tor; /* 0x.010 - PCI Express configuration timeout register */
95 char res2[12];
96 uint pex_pme_mes_dr; /* 0x.020 - PCI Express PME and message detect register */
97 uint pex_pme_mes_disr; /* 0x.024 - PCI Express PME and message disable register */
98 uint pex_pme_mes_ier; /* 0x.028 - PCI Express PME and message interrupt enable register */
99 uint pex_pmcr; /* 0x.02c - PCI Express power management command register */
100 char res3[3024];
101 uint pexotar0; /* 0x.c00 - PCI Express outbound translation address register 0 */
102 uint pexotear0; /* 0x.c04 - PCI Express outbound translation extended address register 0*/
103 char res4[8];
104 uint pexowar0; /* 0x.c10 - PCI Express outbound window attributes register 0*/
105 char res5[12];
106 uint pexotar1; /* 0x.c20 - PCI Express outbound translation address register 1 */
107 uint pexotear1; /* 0x.c24 - PCI Express outbound translation extended address register 1*/
108 uint pexowbar1; /* 0x.c28 - PCI Express outbound window base address register 1*/
109 char res6[4];
110 uint pexowar1; /* 0x.c30 - PCI Express outbound window attributes register 1*/
111 char res7[12];
112 uint pexotar2; /* 0x.c40 - PCI Express outbound translation address register 2 */
113 uint pexotear2; /* 0x.c44 - PCI Express outbound translation extended address register 2*/
114 uint pexowbar2; /* 0x.c48 - PCI Express outbound window base address register 2*/
115 char res8[4];
116 uint pexowar2; /* 0x.c50 - PCI Express outbound window attributes register 2*/
117 char res9[12];
118 uint pexotar3; /* 0x.c60 - PCI Express outbound translation address register 3 */
119 uint pexotear3; /* 0x.c64 - PCI Express outbound translation extended address register 3*/
120 uint pexowbar3; /* 0x.c68 - PCI Express outbound window base address register 3*/
121 char res10[4];
122 uint pexowar3; /* 0x.c70 - PCI Express outbound window attributes register 3*/
123 char res11[12];
124 uint pexotar4; /* 0x.c80 - PCI Express outbound translation address register 4 */
125 uint pexotear4; /* 0x.c84 - PCI Express outbound translation extended address register 4*/
126 uint pexowbar4; /* 0x.c88 - PCI Express outbound window base address register 4*/
127 char res12[4];
128 uint pexowar4; /* 0x.c90 - PCI Express outbound window attributes register 4*/
129 char res13[12];
130 char res14[256];
131 uint pexitar3; /* 0x.da0 - PCI Express inbound translation address register 3 */
132 char res15[4];
133 uint pexiwbar3; /* 0x.da8 - PCI Express inbound window base address register 3 */
134 uint pexiwbear3; /* 0x.dac - PCI Express inbound window base extended address register 3 */
135 uint pexiwar3; /* 0x.db0 - PCI Express inbound window attributes register 3 */
136 char res16[12];
137 uint pexitar2; /* 0x.dc0 - PCI Express inbound translation address register 2 */
138 char res17[4];
139 uint pexiwbar2; /* 0x.dc8 - PCI Express inbound window base address register 2 */
140 uint pexiwbear2; /* 0x.dcc - PCI Express inbound window base extended address register 2 */
141 uint pexiwar2; /* 0x.dd0 - PCI Express inbound window attributes register 2 */
142 char res18[12];
143 uint pexitar1; /* 0x.de0 - PCI Express inbound translation address register 2 */
144 char res19[4];
145 uint pexiwbar1; /* 0x.de8 - PCI Express inbound window base address register 2 */
146 uint pexiwbear1; /* 0x.dec - PCI Express inbound window base extended address register 2 */
147 uint pexiwar1; /* 0x.df0 - PCI Express inbound window attributes register 2 */
148 char res20[12];
149 uint pex_err_dr; /* 0x.e00 - PCI Express error detect register */
150 char res21[4];
151 uint pex_err_en; /* 0x.e08 - PCI Express error interrupt enable register */
152 char res22[4];
153 uint pex_err_disr; /* 0x.e10 - PCI Express error disable register */
154 char res23[12];
155 uint pex_err_cap_stat; /* 0x.e20 - PCI Express error capture status register */
156 char res24[4];
157 uint pex_err_cap_r0; /* 0x.e28 - PCI Express error capture register 0 */
158 uint pex_err_cap_r1; /* 0x.e2c - PCI Express error capture register 0 */
159 uint pex_err_cap_r2; /* 0x.e30 - PCI Express error capture register 0 */
160 uint pex_err_cap_r3; /* 0x.e34 - PCI Express error capture register 0 */
161} ccsr_pex_t;
162
163/* Global Utility Registers */ 88/* Global Utility Registers */
164typedef struct ccsr_guts { 89typedef struct ccsr_guts {
165 uint porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */ 90 uint porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */
diff --git a/include/asm-powerpc/paca.h b/include/asm-powerpc/paca.h
index 0d3adc09c847..4de851d91f96 100644
--- a/include/asm-powerpc/paca.h
+++ b/include/asm-powerpc/paca.h
@@ -70,6 +70,7 @@ struct paca_struct {
70 s16 hw_cpu_id; /* Physical processor number */ 70 s16 hw_cpu_id; /* Physical processor number */
71 u8 cpu_start; /* At startup, processor spins until */ 71 u8 cpu_start; /* At startup, processor spins until */
72 /* this becomes non-zero. */ 72 /* this becomes non-zero. */
73 struct slb_shadow *slb_shadow_ptr;
73 74
74 /* 75 /*
75 * Now, starting in cacheline 2, the exception save areas 76 * Now, starting in cacheline 2, the exception save areas
@@ -101,8 +102,6 @@ struct paca_struct {
101 u64 user_time; /* accumulated usermode TB ticks */ 102 u64 user_time; /* accumulated usermode TB ticks */
102 u64 system_time; /* accumulated system TB ticks */ 103 u64 system_time; /* accumulated system TB ticks */
103 u64 startpurr; /* PURR/TB value snapshot */ 104 u64 startpurr; /* PURR/TB value snapshot */
104
105 struct slb_shadow *slb_shadow_ptr;
106}; 105};
107 106
108extern struct paca_struct paca[]; 107extern struct paca_struct paca[];
diff --git a/include/asm-powerpc/pci.h b/include/asm-powerpc/pci.h
index ac656ee6bb19..ce0f13e8eb14 100644
--- a/include/asm-powerpc/pci.h
+++ b/include/asm-powerpc/pci.h
@@ -70,19 +70,22 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
70 */ 70 */
71#define PCI_DISABLE_MWI 71#define PCI_DISABLE_MWI
72 72
73extern struct dma_mapping_ops *pci_dma_ops; 73#ifdef CONFIG_PCI
74extern void set_pci_dma_ops(struct dma_mapping_ops *dma_ops);
75extern struct dma_mapping_ops *get_pci_dma_ops(void);
74 76
75/* For DAC DMA, we currently don't support it by default, but 77/* For DAC DMA, we currently don't support it by default, but
76 * we let 64-bit platforms override this. 78 * we let 64-bit platforms override this.
77 */ 79 */
78static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask) 80static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask)
79{ 81{
80 if (pci_dma_ops && pci_dma_ops->dac_dma_supported) 82 struct dma_mapping_ops *d = get_pci_dma_ops();
81 return pci_dma_ops->dac_dma_supported(&hwdev->dev, mask); 83
84 if (d && d->dac_dma_supported)
85 return d->dac_dma_supported(&hwdev->dev, mask);
82 return 0; 86 return 0;
83} 87}
84 88
85#ifdef CONFIG_PCI
86static inline void pci_dma_burst_advice(struct pci_dev *pdev, 89static inline void pci_dma_burst_advice(struct pci_dev *pdev,
87 enum pci_dma_burst_strategy *strat, 90 enum pci_dma_burst_strategy *strat,
88 unsigned long *strategy_parameter) 91 unsigned long *strategy_parameter)
@@ -99,6 +102,9 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
99 *strat = PCI_DMA_BURST_MULTIPLE; 102 *strat = PCI_DMA_BURST_MULTIPLE;
100 *strategy_parameter = cacheline_size; 103 *strategy_parameter = cacheline_size;
101} 104}
105#else /* CONFIG_PCI */
106#define set_pci_dma_ops(d)
107#define get_pci_dma_ops() NULL
102#endif 108#endif
103 109
104extern int pci_domain_nr(struct pci_bus *bus); 110extern int pci_domain_nr(struct pci_bus *bus);
diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h
index ab6eddb518c7..d74b2965bb82 100644
--- a/include/asm-powerpc/ppc-pci.h
+++ b/include/asm-powerpc/ppc-pci.h
@@ -10,6 +10,8 @@
10#define _ASM_POWERPC_PPC_PCI_H 10#define _ASM_POWERPC_PPC_PCI_H
11#ifdef __KERNEL__ 11#ifdef __KERNEL__
12 12
13#ifdef CONFIG_PCI
14
13#include <linux/pci.h> 15#include <linux/pci.h>
14#include <asm/pci-bridge.h> 16#include <asm/pci-bridge.h>
15 17
@@ -22,7 +24,7 @@ extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary);
22extern struct list_head hose_list; 24extern struct list_head hose_list;
23extern int global_phb_number; 25extern int global_phb_number;
24 26
25extern unsigned long find_and_init_phbs(void); 27extern void find_and_init_phbs(void);
26 28
27extern struct pci_dev *ppc64_isabridge_dev; /* may be NULL if no ISA bus */ 29extern struct pci_dev *ppc64_isabridge_dev; /* may be NULL if no ISA bus */
28 30
@@ -68,7 +70,7 @@ struct pci_dev *pci_get_device_by_addr(unsigned long addr);
68void eeh_slot_error_detail (struct pci_dn *pdn, int severity); 70void eeh_slot_error_detail (struct pci_dn *pdn, int severity);
69 71
70/** 72/**
71 * rtas_pci_enableo - enable IO transfers for this slot 73 * rtas_pci_enable - enable IO transfers for this slot
72 * @pdn: pci device node 74 * @pdn: pci device node
73 * @function: either EEH_THAW_MMIO or EEH_THAW_DMA 75 * @function: either EEH_THAW_MMIO or EEH_THAW_DMA
74 * 76 *
@@ -89,6 +91,7 @@ int rtas_pci_enable(struct pci_dn *pdn, int function);
89 * Returns a non-zero value if the reset failed. 91 * Returns a non-zero value if the reset failed.
90 */ 92 */
91int rtas_set_slot_reset (struct pci_dn *); 93int rtas_set_slot_reset (struct pci_dn *);
94int eeh_wait_for_slot_status(struct pci_dn *pdn, int max_wait_msecs);
92 95
93/** 96/**
94 * eeh_restore_bars - Restore device configuration info. 97 * eeh_restore_bars - Restore device configuration info.
@@ -126,5 +129,10 @@ struct device_node * find_device_pe(struct device_node *dn);
126 129
127#endif 130#endif
128 131
132#else /* CONFIG_PCI */
133static inline void find_and_init_phbs(void) { }
134static inline void init_pci_config_tokens(void) { }
135#endif /* !CONFIG_PCI */
136
129#endif /* __KERNEL__ */ 137#endif /* __KERNEL__ */
130#endif /* _ASM_POWERPC_PPC_PCI_H */ 138#endif /* _ASM_POWERPC_PPC_PCI_H */
diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h
index a26c32ee5527..d947b1609491 100644
--- a/include/asm-powerpc/processor.h
+++ b/include/asm-powerpc/processor.h
@@ -133,7 +133,6 @@ struct thread_struct {
133 mm_segment_t fs; /* for get_fs() validation */ 133 mm_segment_t fs; /* for get_fs() validation */
134#ifdef CONFIG_PPC32 134#ifdef CONFIG_PPC32
135 void *pgdir; /* root of page-table tree */ 135 void *pgdir; /* root of page-table tree */
136 signed long last_syscall;
137#endif 136#endif
138#if defined(CONFIG_4xx) || defined (CONFIG_BOOKE) 137#if defined(CONFIG_4xx) || defined (CONFIG_BOOKE)
139 unsigned long dbcr0; /* debug control register values */ 138 unsigned long dbcr0; /* debug control register values */
diff --git a/include/asm-powerpc/prom.h b/include/asm-powerpc/prom.h
index 020ed015a94b..994de8ea3308 100644
--- a/include/asm-powerpc/prom.h
+++ b/include/asm-powerpc/prom.h
@@ -18,6 +18,7 @@
18#include <linux/types.h> 18#include <linux/types.h>
19#include <linux/proc_fs.h> 19#include <linux/proc_fs.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <asm/irq.h>
21#include <asm/atomic.h> 22#include <asm/atomic.h>
22 23
23/* Definitions used by the flattened device tree */ 24/* Definitions used by the flattened device tree */
@@ -58,6 +59,8 @@ struct boot_param_header
58 u32 boot_cpuid_phys; /* Physical CPU id we're booting on */ 59 u32 boot_cpuid_phys; /* Physical CPU id we're booting on */
59 /* version 3 fields below */ 60 /* version 3 fields below */
60 u32 dt_strings_size; /* size of the DT strings block */ 61 u32 dt_strings_size; /* size of the DT strings block */
62 /* version 17 fields below */
63 u32 dt_struct_size; /* size of the DT structure block */
61}; 64};
62 65
63 66
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-30 14:36:36 -0500