111 files changed, 2496 insertions, 496 deletions

diff --git a/include/asm-powerpc/abs_addr.h b/include/asm-powerpc/abs_addr.h
index 18415108fc56..c5c3259e0f86 100644
--- a/include/asm-powerpc/abs_addr.h
+++ b/include/asm-powerpc/abs_addr.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_ABS_ADDR_H
 #define _ASM_POWERPC_ABS_ADDR_H
+#ifdef __KERNEL__
 
 #include <linux/config.h>
 
@@ -70,4 +71,5 @@ static inline unsigned long phys_to_abs(unsigned long pa)
 #define iseries_hv_addr(virtaddr)       \
         (0x8000000000000000 | virt_to_abs(virtaddr))
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_ABS_ADDR_H */
diff --git a/include/asm-powerpc/agp.h b/include/asm-powerpc/agp.h
index 885b4631a6cf..e5ccaca2f5a4 100644
--- a/include/asm-powerpc/agp.h
+++ b/include/asm-powerpc/agp.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_AGP_H
 #define _ASM_POWERPC_AGP_H
+#ifdef __KERNEL__
 
 #include <asm/io.h>
 
@@ -18,4 +19,5 @@
 #define free_gatt_pages(table, order)   \
         free_pages((unsigned long)(table), (order))
 
+#endif /* __KERNEL__ */
 #endif  /* _ASM_POWERPC_AGP_H */
diff --git a/include/asm-powerpc/asm-compat.h b/include/asm-powerpc/asm-compat.h
index 8b133efc9f79..8e64be0cc47d 100644
--- a/include/asm-powerpc/asm-compat.h
+++ b/include/asm-powerpc/asm-compat.h
@@ -1,7 +1,6 @@
 #ifndef _ASM_POWERPC_ASM_COMPAT_H
 #define _ASM_POWERPC_ASM_COMPAT_H
 
-#include <linux/config.h>
 #include <asm/types.h>
 
 #ifdef __ASSEMBLY__
@@ -41,6 +40,7 @@
 
 #endif
 
+#ifdef __KERNEL__
 #ifdef CONFIG_IBM405_ERR77
 /* Erratum #77 on the 405 means we need a sync or dcbt before every
  * stwcx.  The old ATOMIC_SYNC_FIX covered some but not all of this.
@@ -51,5 +51,6 @@
 #define PPC405_ERR77(ra,rb)
 #define PPC405_ERR77_SYNC
 #endif
+#endif
 
 #endif /* _ASM_POWERPC_ASM_COMPAT_H */
diff --git a/include/asm-powerpc/atomic.h b/include/asm-powerpc/atomic.h
index ae395a0632a6..147a38dcc766 100644
--- a/include/asm-powerpc/atomic.h
+++ b/include/asm-powerpc/atomic.h
@@ -36,7 +36,7 @@ static __inline__ int atomic_add_return(int a, atomic_t *v)
         int t;
 
         __asm__ __volatile__(
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:     lwarx   %0,0,%2         # atomic_add_return\n\
         add     %0,%1,%0\n"
         PPC405_ERR77(0,%2)
@@ -72,7 +72,7 @@ static __inline__ int atomic_sub_return(int a, atomic_t *v)
         int t;
 
         __asm__ __volatile__(
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:     lwarx   %0,0,%2         # atomic_sub_return\n\
         subf    %0,%1,%0\n"
         PPC405_ERR77(0,%2)
@@ -106,7 +106,7 @@ static __inline__ int atomic_inc_return(atomic_t *v)
         int t;
 
         __asm__ __volatile__(
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:     lwarx   %0,0,%1         # atomic_inc_return\n\
         addic   %0,%0,1\n"
         PPC405_ERR77(0,%1)
@@ -150,7 +150,7 @@ static __inline__ int atomic_dec_return(atomic_t *v)
         int t;
 
         __asm__ __volatile__(
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:     lwarx   %0,0,%1         # atomic_dec_return\n\
         addic   %0,%0,-1\n"
         PPC405_ERR77(0,%1)
@@ -165,6 +165,7 @@ static __inline__ int atomic_dec_return(atomic_t *v)
 }
 
 #define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
+#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
 
 /**
  * atomic_add_unless - add unless the number is a given value
@@ -175,19 +176,19 @@ static __inline__ int atomic_dec_return(atomic_t *v)
  * Atomically adds @a to @v, so long as it was not @u.
  * Returns non-zero if @v was not @u, and zero otherwise.
  */
-#define atomic_add_unless(v, a, u)                                                       \
-({                                                                                                                       \
-           int c, old;                                                                                   \
-           c = atomic_read(v);                                                                   \
-           for (;;) {                                                                                     \
-                           if (unlikely(c == (u)))                                               \
-                                           break;                                                                 \
-                           old = atomic_cmpxchg((v), c, c + (a));                 \
-                           if (likely(old == c))                                                   \
-                                           break;                                                                 \
-                           c = old;                                                                             \
-           }                                                                                                       \
-           c != (u);                                                                                       \
+#define atomic_add_unless(v, a, u)                      \
+({                                                      \
+        int c, old;                                     \
+        c = atomic_read(v);                             \
+        for (;;) {                                      \
+                if (unlikely(c == (u)))                 \
+                        break;                          \
+                old = atomic_cmpxchg((v), c, c + (a));  \
+                if (likely(old == c))                   \
+                        break;                          \
+                c = old;                                \
+        }                                               \
+        c != (u);                                       \
 })
 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
 
@@ -203,7 +204,7 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
         int t;
 
         __asm__ __volatile__(
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:     lwarx   %0,0,%1         # atomic_dec_if_positive\n\
         addic.  %0,%0,-1\n\
         blt-    2f\n"
@@ -252,7 +253,7 @@ static __inline__ long atomic64_add_return(long a, atomic64_t *v)
         long t;
 
         __asm__ __volatile__(
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:     ldarx   %0,0,%2         # atomic64_add_return\n\
         add     %0,%1,%0\n\
         stdcx.  %0,0,%2 \n\
@@ -286,7 +287,7 @@ static __inline__ long atomic64_sub_return(long a, atomic64_t *v)
         long t;
 
         __asm__ __volatile__(
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:     ldarx   %0,0,%2         # atomic64_sub_return\n\
         subf    %0,%1,%0\n\
         stdcx.  %0,0,%2 \n\
@@ -318,7 +319,7 @@ static __inline__ long atomic64_inc_return(atomic64_t *v)
         long t;
 
         __asm__ __volatile__(
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:     ldarx   %0,0,%1         # atomic64_inc_return\n\
         addic   %0,%0,1\n\
         stdcx.  %0,0,%1 \n\
@@ -360,7 +361,7 @@ static __inline__ long atomic64_dec_return(atomic64_t *v)
         long t;
 
         __asm__ __volatile__(
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:     ldarx   %0,0,%1         # atomic64_dec_return\n\
         addic   %0,%0,-1\n\
         stdcx.  %0,0,%1\n\
@@ -385,7 +386,7 @@ static __inline__ long atomic64_dec_if_positive(atomic64_t *v)
         long t;
 
         __asm__ __volatile__(
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:     ldarx   %0,0,%1         # atomic64_dec_if_positive\n\
         addic.  %0,%0,-1\n\
         blt-    2f\n\
diff --git a/include/asm-powerpc/bitops.h b/include/asm-powerpc/bitops.h
index 1996eaa8aeae..bf6941a810b8 100644
--- a/include/asm-powerpc/bitops.h
+++ b/include/asm-powerpc/bitops.h
@@ -112,7 +112,7 @@ static __inline__ int test_and_set_bit(unsigned long nr,
         unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
 
         __asm__ __volatile__(
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:"    PPC_LLARX "%0,0,%3              # test_and_set_bit\n"
         "or     %1,%0,%2 \n"
         PPC405_ERR77(0,%3)
@@ -134,7 +134,7 @@ static __inline__ int test_and_clear_bit(unsigned long nr,
         unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
 
         __asm__ __volatile__(
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:"    PPC_LLARX "%0,0,%3              # test_and_clear_bit\n"
         "andc   %1,%0,%2 \n"
         PPC405_ERR77(0,%3)
@@ -156,7 +156,7 @@ static __inline__ int test_and_change_bit(unsigned long nr,
         unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
 
         __asm__ __volatile__(
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:"    PPC_LLARX "%0,0,%3              # test_and_change_bit\n"
         "xor    %1,%0,%2 \n"
         PPC405_ERR77(0,%3)
diff --git a/include/asm-powerpc/bootx.h b/include/asm-powerpc/bootx.h
new file mode 100644
index 000000000000..57b82e3f89ce
--- /dev/null
+++ b/include/asm-powerpc/bootx.h
@@ -0,0 +1,171 @@
+/*
+ * This file describes the structure passed from the BootX application
+ * (for MacOS) when it is used to boot Linux.
+ *
+ * Written by Benjamin Herrenschmidt.
+ */
+
+
+#ifndef __ASM_BOOTX_H__
+#define __ASM_BOOTX_H__
+
+#include <asm/types.h>
+
+#ifdef macintosh
+#include <Types.h>
+#include "linux_type_defs.h"
+#endif
+
+#ifdef macintosh
+/* All this requires PowerPC alignment */
+#pragma options align=power
+#endif
+
+/* On kernel entry:
+ *
+ * r3 = 0x426f6f58    ('BooX')
+ * r4 = pointer to boot_infos
+ * r5 = NULL
+ *
+ * Data and instruction translation disabled, interrupts
+ * disabled, kernel loaded at physical 0x00000000 on PCI
+ * machines (will be different on NuBus).
+ */
+
+#define BOOT_INFO_VERSION               5
+#define BOOT_INFO_COMPATIBLE_VERSION    1
+
+/* Bit in the architecture flag mask. More to be defined in
+   future versions. Note that either BOOT_ARCH_PCI or
+   BOOT_ARCH_NUBUS is set. The other BOOT_ARCH_NUBUS_xxx are
+   set additionally when BOOT_ARCH_NUBUS is set.
+ */
+#define BOOT_ARCH_PCI                   0x00000001UL
+#define BOOT_ARCH_NUBUS                 0x00000002UL
+#define BOOT_ARCH_NUBUS_PDM             0x00000010UL
+#define BOOT_ARCH_NUBUS_PERFORMA        0x00000020UL
+#define BOOT_ARCH_NUBUS_POWERBOOK       0x00000040UL
+
+/*  Maximum number of ranges in phys memory map */
+#define MAX_MEM_MAP_SIZE                                26
+
+/* This is the format of an element in the physical memory map. Note that
+   the map is optional and current BootX will only build it for pre-PCI
+   machines */
+typedef struct boot_info_map_entry
+{
+    __u32       physAddr;                /* Physical starting address */
+    __u32       size;                    /* Size in bytes */
+} boot_info_map_entry_t;
+
+
+/* Here are the boot informations that are passed to the bootstrap
+ * Note that the kernel arguments and the device tree are appended
+ * at the end of this structure. */
+typedef struct boot_infos
+{
+    /* Version of this structure */
+    __u32       version;
+    /* backward compatible down to version: */
+    __u32       compatible_version;
+
+    /* NEW (vers. 2) this holds the current _logical_ base addr of
+       the frame buffer (for use by early boot message) */
+    __u8*       logicalDisplayBase;
+
+    /* NEW (vers. 4) Apple's machine identification */
+    __u32       machineID;
+
+    /* NEW (vers. 4) Detected hw architecture */
+    __u32       architecture;
+
+    /* The device tree (internal addresses relative to the beginning of the tree,
+     * device tree offset relative to the beginning of this structure).
+     * On pre-PCI macintosh (BOOT_ARCH_PCI bit set to 0 in architecture), this
+     * field is 0.
+     */
+    __u32       deviceTreeOffset;        /* Device tree offset */
+    __u32       deviceTreeSize;          /* Size of the device tree */
+
+    /* Some infos about the current MacOS display */
+    __u32       dispDeviceRect[4];       /* left,top,right,bottom */
+    __u32       dispDeviceDepth;         /* (8, 16 or 32) */
+    __u8*       dispDeviceBase;          /* base address (physical) */
+    __u32       dispDeviceRowBytes;      /* rowbytes (in bytes) */
+    __u32       dispDeviceColorsOffset;  /* Colormap (8 bits only) or 0 (*) */
+    /* Optional offset in the registry to the current
+     * MacOS display. (Can be 0 when not detected) */
+     __u32      dispDeviceRegEntryOffset;
+
+    /* Optional pointer to boot ramdisk (offset from this structure) */
+    __u32       ramDisk;
+    __u32       ramDiskSize;             /* size of ramdisk image */
+
+    /* Kernel command line arguments (offset from this structure) */
+    __u32       kernelParamsOffset;
+
+    /* ALL BELOW NEW (vers. 4) */
+
+    /* This defines the physical memory. Valid with BOOT_ARCH_NUBUS flag
+       (non-PCI) only. On PCI, memory is contiguous and it's size is in the
+       device-tree. */
+    boot_info_map_entry_t
+                physMemoryMap[MAX_MEM_MAP_SIZE]; /* Where the phys memory is */
+    __u32       physMemoryMapSize;               /* How many entries in map */
+
+
+    /* The framebuffer size (optional, currently 0) */
+    __u32       frameBufferSize;         /* Represents a max size, can be 0. */
+
+    /* NEW (vers. 5) */
+
+    /* Total params size (args + colormap + device tree + ramdisk) */
+    __u32       totalParamsSize;
+
+} boot_infos_t;
+
+#ifdef __KERNEL__
+/* (*) The format of the colormap is 256 * 3 * 2 bytes. Each color index
+ * is represented by 3 short words containing a 16 bits (unsigned) color
+ * component. Later versions may contain the gamma table for direct-color
+ * devices here.
+ */
+#define BOOTX_COLORTABLE_SIZE    (256UL*3UL*2UL)
+
+/* BootX passes the device-tree using a format that comes from earlier
+ * ppc32 kernels. This used to match what is in prom.h, but not anymore
+ * so we now define it here
+ */
+struct bootx_dt_prop {
+        u32     name;
+        int     length;
+        u32     value;
+        u32     next;
+};
+
+struct bootx_dt_node {
+        u32     unused0;
+        u32     unused1;
+        u32     phandle;        /* not really available */
+        u32     unused2;
+        u32     unused3;
+        u32     unused4;
+        u32     unused5;
+        u32     full_name;
+        u32     properties;
+        u32     parent;
+        u32     child;
+        u32     sibling;
+        u32     next;
+        u32     allnext;
+};
+
+extern void bootx_init(unsigned long r4, unsigned long phys);
+
+#endif /* __KERNEL__ */
+
+#ifdef macintosh
+#pragma options align=reset
+#endif
+
+#endif
diff --git a/include/asm-powerpc/btext.h b/include/asm-powerpc/btext.h
index 71cce36bc630..906f46e31006 100644
--- a/include/asm-powerpc/btext.h
+++ b/include/asm-powerpc/btext.h
@@ -7,21 +7,22 @@
 #define __PPC_BTEXT_H
 #ifdef __KERNEL__
 
-extern void btext_clearscreen(void);
-extern void btext_flushscreen(void);
-
-extern int boot_text_mapped;
-
-extern int btext_initialize(struct device_node *np);
-
-extern void map_boot_text(void);
-extern void init_boot_display(void);
+extern int btext_find_display(int allow_nonstdout);
 extern void btext_update_display(unsigned long phys, int width, int height,
                                  int depth, int pitch);
+extern void btext_setup_display(int width, int height, int depth, int pitch,
+                                unsigned long address);
+extern void btext_prepare_BAT(void);
+extern void btext_unmap(void);
 
 extern void btext_drawchar(char c);
 extern void btext_drawstring(const char *str);
 extern void btext_drawhex(unsigned long v);
+extern void btext_drawtext(const char *c, unsigned int len);
+
+extern void btext_clearscreen(void);
+extern void btext_flushscreen(void);
+extern void btext_flushline(void);
 
 #endif /* __KERNEL__ */
 #endif /* __PPC_BTEXT_H */
diff --git a/include/asm-powerpc/bug.h b/include/asm-powerpc/bug.h
index b001ecb3cd99..99817a802ca4 100644
--- a/include/asm-powerpc/bug.h
+++ b/include/asm-powerpc/bug.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_BUG_H
 #define _ASM_POWERPC_BUG_H
+#ifdef __KERNEL__
 
 #include <asm/asm-compat.h>
 /*
@@ -67,4 +68,5 @@ struct bug_entry *find_bug(unsigned long bugaddr);
 
 #include <asm-generic/bug.h>
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_BUG_H */
diff --git a/include/asm-powerpc/cache.h b/include/asm-powerpc/cache.h
index 26ce502e76e8..6379c2df5c40 100644
--- a/include/asm-powerpc/cache.h
+++ b/include/asm-powerpc/cache.h
@@ -19,7 +19,6 @@
 #define L1_CACHE_BYTES          (1 << L1_CACHE_SHIFT)
 
 #define SMP_CACHE_BYTES         L1_CACHE_BYTES
-#define L1_CACHE_SHIFT_MAX      7 /* largest L1 which this arch supports */
 
 #if defined(__powerpc64__) && !defined(__ASSEMBLY__)
 struct ppc64_caches {
diff --git a/include/asm-powerpc/checksum.h b/include/asm-powerpc/checksum.h
index d8354d8a49ce..609ecbbd7210 100644
--- a/include/asm-powerpc/checksum.h
+++ b/include/asm-powerpc/checksum.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_CHECKSUM_H
 #define _ASM_POWERPC_CHECKSUM_H
+#ifdef __KERNEL__
 
 /*
  * This program is free software; you can redistribute it and/or
@@ -129,4 +130,5 @@ static inline unsigned long csum_tcpudp_nofold(unsigned long saddr,
 }
 
 #endif
+#endif /* __KERNEL__ */
 #endif
diff --git a/include/asm-powerpc/compat.h b/include/asm-powerpc/compat.h
index 4db4360c4d4a..accb80c9a339 100644
--- a/include/asm-powerpc/compat.h
+++ b/include/asm-powerpc/compat.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_COMPAT_H
 #define _ASM_POWERPC_COMPAT_H
+#ifdef __KERNEL__
 /*
  * Architecture specific compatibility types
  */
@@ -202,4 +203,5 @@ struct compat_shmid64_ds {
         compat_ulong_t __unused6;
 };
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_COMPAT_H */
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index d1cfa3f515ea..64210549f56b 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -1,7 +1,6 @@
 #ifndef __ASM_POWERPC_CPUTABLE_H
 #define __ASM_POWERPC_CPUTABLE_H
 
-#include <linux/config.h>
 #include <asm/asm-compat.h>
 
 #define PPC_FEATURE_32                  0x80000000
@@ -20,6 +19,7 @@
 #define PPC_FEATURE_POWER5              0x00040000
 #define PPC_FEATURE_POWER5_PLUS         0x00020000
 #define PPC_FEATURE_CELL                0x00010000
+#define PPC_FEATURE_BOOKE               0x00008000
 
 #ifdef __KERNEL__
 #ifndef __ASSEMBLY__
@@ -28,10 +28,17 @@
  * via the mkdefs mechanism.
  */
 struct cpu_spec;
-struct op_powerpc_model;
 
 typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec);
 
+enum powerpc_oprofile_type {
+        PPC_OPROFILE_INVALID = 0,
+        PPC_OPROFILE_RS64 = 1,
+        PPC_OPROFILE_POWER4 = 2,
+        PPC_OPROFILE_G4 = 3,
+        PPC_OPROFILE_BOOKE = 4,
+};
+
 struct cpu_spec {
         /* CPU is matched via (PVR & pvr_mask) == pvr_value */
         unsigned int    pvr_mask;
@@ -57,7 +64,10 @@ struct cpu_spec {
         char            *oprofile_cpu_type;
 
         /* Processor specific oprofile operations */
-        struct op_powerpc_model *oprofile_model;
+        enum powerpc_oprofile_type oprofile_type;
+
+        /* Name of processor class, for the ELF AT_PLATFORM entry */
+        char            *platform;
 };
 
 extern struct cpu_spec          *cur_cpu_spec;
@@ -106,6 +116,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTR_LOCKLESS_TLBIE          ASM_CONST(0x0000040000000000)
 #define CPU_FTR_MMCRA_SIHV              ASM_CONST(0x0000080000000000)
 #define CPU_FTR_CI_LARGE_PAGE           ASM_CONST(0x0000100000000000)
+#define CPU_FTR_PAUSE_ZERO              ASM_CONST(0x0000200000000000)
 #else
 /* ensure on 32b processors the flags are available for compiling but
  * don't do anything */
@@ -305,12 +316,18 @@ enum {
             CPU_FTR_MMCRA_SIHV,
         CPU_FTRS_CELL = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
             CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 |
-            CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT,
+            CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT |
+            CPU_FTR_CTRL | CPU_FTR_PAUSE_ZERO,
         CPU_FTRS_COMPATIBLE = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
             CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2,
 #endif
 
         CPU_FTRS_POSSIBLE =
+#ifdef __powerpc64__
+            CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 |
+            CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_CELL |
+            CPU_FTR_CI_LARGE_PAGE |
+#else
 #if CLASSIC_PPC
             CPU_FTRS_PPC601 | CPU_FTRS_603 | CPU_FTRS_604 | CPU_FTRS_740_NOTAU |
             CPU_FTRS_740 | CPU_FTRS_750 | CPU_FTRS_750FX1 |
@@ -344,14 +361,14 @@ enum {
 #ifdef CONFIG_E500
             CPU_FTRS_E500 | CPU_FTRS_E500_2 |
 #endif
-#ifdef __powerpc64__
-            CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 |
-            CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_CELL |
-            CPU_FTR_CI_LARGE_PAGE |
-#endif
+#endif /* __powerpc64__ */
             0,
 
         CPU_FTRS_ALWAYS =
+#ifdef __powerpc64__
+            CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 &
+            CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_CELL &
+#else
 #if CLASSIC_PPC
             CPU_FTRS_PPC601 & CPU_FTRS_603 & CPU_FTRS_604 & CPU_FTRS_740_NOTAU &
             CPU_FTRS_740 & CPU_FTRS_750 & CPU_FTRS_750FX1 &
@@ -385,10 +402,7 @@ enum {
 #ifdef CONFIG_E500
             CPU_FTRS_E500 & CPU_FTRS_E500_2 &
 #endif
-#ifdef __powerpc64__
-            CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 &
-            CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_CELL &
-#endif
+#endif /* __powerpc64__ */
             CPU_FTRS_POSSIBLE,
 };
 
diff --git a/include/asm-powerpc/current.h b/include/asm-powerpc/current.h
index 82cd4a9ca99a..1938d6abd255 100644
--- a/include/asm-powerpc/current.h
+++ b/include/asm-powerpc/current.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_CURRENT_H
 #define _ASM_POWERPC_CURRENT_H
+#ifdef __KERNEL__
 
 /*
  * This program is free software; you can redistribute it and/or
@@ -24,4 +25,5 @@ register struct task_struct *current asm ("r2");
 
 #endif
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_CURRENT_H */
diff --git a/include/asm-powerpc/delay.h b/include/asm-powerpc/delay.h
index 54fe1f4f8fd0..057a60955474 100644
--- a/include/asm-powerpc/delay.h
+++ b/include/asm-powerpc/delay.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_DELAY_H
 #define _ASM_POWERPC_DELAY_H
+#ifdef __KERNEL__
 
 /*
  * Copyright 1996, Paul Mackerras.
@@ -16,4 +17,5 @@
 extern void __delay(unsigned long loops);
 extern void udelay(unsigned long usecs);
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_DELAY_H */
diff --git a/include/asm-powerpc/dma-mapping.h b/include/asm-powerpc/dma-mapping.h
index 59a80163f75f..837756ab7dc7 100644
--- a/include/asm-powerpc/dma-mapping.h
+++ b/include/asm-powerpc/dma-mapping.h
@@ -6,6 +6,7 @@
  */
 #ifndef _ASM_DMA_MAPPING_H
 #define _ASM_DMA_MAPPING_H
+#ifdef __KERNEL__
 
 #include <linux/config.h>
 #include <linux/types.h>
@@ -229,7 +230,7 @@ static inline int dma_get_cache_alignment(void)
 #ifdef CONFIG_PPC64
         /* no easy way to get cache size on all processors, so return
          * the maximum possible, to be safe */
-        return (1 << L1_CACHE_SHIFT_MAX);
+        return (1 << INTERNODE_CACHE_SHIFT);
 #else
         /*
          * Each processor family will define its own L1_CACHE_SHIFT,
@@ -282,4 +283,5 @@ struct dma_mapping_ops {
         int             (*dac_dma_supported)(struct device *dev, u64 mask);
 };
 
+#endif /* __KERNEL__ */
 #endif  /* _ASM_DMA_MAPPING_H */
diff --git a/include/asm-powerpc/dma.h b/include/asm-powerpc/dma.h
index 926378d2cd94..4bb57fe37097 100644
--- a/include/asm-powerpc/dma.h
+++ b/include/asm-powerpc/dma.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_DMA_H
 #define _ASM_POWERPC_DMA_H
+#ifdef __KERNEL__
 
 /*
  * Defines for using and allocating dma channels.
@@ -387,4 +388,5 @@ extern int isa_dma_bridge_buggy;
 
 #endif  /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */
 
+#endif /* __KERNEL__ */
 #endif  /* _ASM_POWERPC_DMA_H */
diff --git a/include/asm-powerpc/eeh.h b/include/asm-powerpc/eeh.h
index f8633aafe4ba..b263fb2fa6e4 100644
--- a/include/asm-powerpc/eeh.h
+++ b/include/asm-powerpc/eeh.h
@@ -19,6 +19,7 @@
 
 #ifndef _PPC64_EEH_H
 #define _PPC64_EEH_H
+#ifdef __KERNEL__
 
 #include <linux/config.h>
 #include <linux/init.h>
@@ -33,9 +34,11 @@ struct device_node;
 extern int eeh_subsystem_enabled;
 
 /* Values for eeh_mode bits in device_node */
-#define EEH_MODE_SUPPORTED      (1<<0)
-#define EEH_MODE_NOCHECK        (1<<1)
-#define EEH_MODE_ISOLATED       (1<<2)
+#define EEH_MODE_SUPPORTED     (1<<0)
+#define EEH_MODE_NOCHECK       (1<<1)
+#define EEH_MODE_ISOLATED      (1<<2)
+#define EEH_MODE_RECOVERING    (1<<3)
+#define EEH_MODE_IRQ_DISABLED  (1<<4)
 
 /* Max number of EEH freezes allowed before we consider the device
  * to be permanently disabled. */
@@ -57,6 +60,7 @@ void __init pci_addr_cache_build(void);
  * to finish the eeh setup for this device.
  */
 void eeh_add_device_early(struct device_node *);
+void eeh_add_device_tree_early(struct device_node *);
 void eeh_add_device_late(struct pci_dev *);
 
 /**
@@ -72,6 +76,15 @@ void eeh_add_device_late(struct pci_dev *);
 void eeh_remove_device(struct pci_dev *);
 
 /**
+ * eeh_remove_device_recursive - undo EEH for device & children.
+ * @dev: pci device to be removed
+ *
+ * As above, this removes the device; it also removes child
+ * pci devices as well.
+ */
+void eeh_remove_bus_device(struct pci_dev *);
+
+/**
  * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure.
  *
  * If this macro yields TRUE, the caller relays to eeh_check_failure()
@@ -107,6 +120,9 @@ static inline void eeh_add_device_late(struct pci_dev *dev) { }
 
 static inline void eeh_remove_device(struct pci_dev *dev) { }
 
+static inline void eeh_add_device_tree_early(struct device_node *dn) { }
+
+static inline void eeh_remove_bus_device(struct pci_dev *dev) { }
 #define EEH_POSSIBLE_ERROR(val, type) (0)
 #define EEH_IO_ERROR_VALUE(size) (-1UL)
 #endif /* CONFIG_EEH */
@@ -363,4 +379,5 @@ static inline void eeh_insl_ns(unsigned long port, void * buf, int nl)
                 eeh_check_failure((void __iomem *)(port), *(u32*)buf);
 }
 
+#endif /* __KERNEL__ */
 #endif /* _PPC64_EEH_H */
diff --git a/include/asm-powerpc/eeh_event.h b/include/asm-powerpc/eeh_event.h
index d168a30b3866..93d55a2bebfd 100644
--- a/include/asm-powerpc/eeh_event.h
+++ b/include/asm-powerpc/eeh_event.h
@@ -20,6 +20,7 @@
 
 #ifndef ASM_PPC64_EEH_EVENT_H
 #define ASM_PPC64_EEH_EVENT_H
+#ifdef __KERNEL__
 
 /** EEH event -- structure holding pci controller data that describes
  *  a change in the isolation status of a PCI slot.  A pointer
@@ -29,7 +30,7 @@ struct eeh_event {
         struct list_head     list;
         struct device_node      *dn;   /* struct device node */
         struct pci_dev       *dev;  /* affected device */
-        int                  state;
+        enum pci_channel_state state; /* PCI bus state for the affected device */
         int time_unavail;    /* milliseconds until device might be available */
 };
 
@@ -46,7 +47,11 @@ struct eeh_event {
  */
 int eeh_send_failure_event (struct device_node *dn,
                             struct pci_dev *dev,
-                            int reset_state,
+                            enum pci_channel_state state,
                             int time_unavail);
 
+/* Main recovery function */
+void handle_eeh_events (struct eeh_event *);
+
+#endif /* __KERNEL__ */
 #endif /* ASM_PPC64_EEH_EVENT_H */
diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h
index 3dcd65edf978..94d228f9c6ac 100644
--- a/include/asm-powerpc/elf.h
+++ b/include/asm-powerpc/elf.h
@@ -1,7 +1,10 @@
 #ifndef _ASM_POWERPC_ELF_H
 #define _ASM_POWERPC_ELF_H
 
+#ifdef __KERNEL__
 #include <linux/sched.h>        /* for task_struct */
+#endif
+
 #include <asm/types.h>
 #include <asm/ptrace.h>
 #include <asm/cputable.h>
@@ -89,7 +92,6 @@
  * as published by the Free Software Foundation; either version
  * 2 of the License, or (at your option) any later version.
  */
-#include <asm/ptrace.h>
 
 #define ELF_NGREG       48      /* includes nip, msr, lr, etc. */
 #define ELF_NFPREG      33      /* includes fpscr */
@@ -219,20 +221,18 @@ extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
    instruction set this cpu supports.  This could be done in userspace,
    but it's not easy, and we've already done it here.  */
 # define ELF_HWCAP      (cur_cpu_spec->cpu_user_features)
-#ifdef __powerpc64__
-# define ELF_PLAT_INIT(_r, load_addr)   do {    \
-        _r->gpr[2] = load_addr;                 \
-} while (0)
-#endif /* __powerpc64__ */
 
 /* This yields a string that ld.so will use to load implementation
    specific libraries for optimization.  This is more specific in
-   intent than poking at uname or /proc/cpuinfo.
+   intent than poking at uname or /proc/cpuinfo.  */
 
-   For the moment, we have only optimizations for the Intel generations,
-   but that could change... */
+#define ELF_PLATFORM    (cur_cpu_spec->platform)
 
-#define ELF_PLATFORM    (NULL)
+#ifdef __powerpc64__
+# define ELF_PLAT_INIT(_r, load_addr)   do {    \
+        _r->gpr[2] = load_addr;                 \
+} while (0)
+#endif /* __powerpc64__ */
 
 #ifdef __KERNEL__
 
diff --git a/include/asm-powerpc/firmware.h b/include/asm-powerpc/firmware.h
index 12fabbcb04f0..f804b34cf06a 100644
--- a/include/asm-powerpc/firmware.h
+++ b/include/asm-powerpc/firmware.h
@@ -98,6 +98,12 @@ typedef struct {
 extern firmware_feature_t firmware_features_table[];
 #endif
 
+extern void system_reset_fwnmi(void);
+extern void machine_check_fwnmi(void);
+
+/* This is true if we are using the firmware NMI handler (typically LPAR) */
+extern int fwnmi_active;
+
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL__ */
 #endif /* __ASM_POWERPC_FIRMWARE_H */
diff --git a/include/asm-powerpc/floppy.h b/include/asm-powerpc/floppy.h
index 64276a3f6153..e258778ca429 100644
--- a/include/asm-powerpc/floppy.h
+++ b/include/asm-powerpc/floppy.h
@@ -9,6 +9,7 @@
  */
 #ifndef __ASM_POWERPC_FLOPPY_H
 #define __ASM_POWERPC_FLOPPY_H
+#ifdef __KERNEL__
 
 #include <linux/config.h>
 #include <asm/machdep.h>
@@ -102,4 +103,5 @@ static int FDC2 = -1;
 
 #define EXTRA_FLOPPY_PARAMS
 
+#endif /* __KERNEL__ */
 #endif /* __ASM_POWERPC_FLOPPY_H */
diff --git a/include/asm-powerpc/futex.h b/include/asm-powerpc/futex.h
index f0319d50b129..39e85f320a76 100644
--- a/include/asm-powerpc/futex.h
+++ b/include/asm-powerpc/futex.h
@@ -11,7 +11,7 @@
 
 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
   __asm__ __volatile ( \
-        SYNC_ON_SMP \
+        LWSYNC_ON_SMP \
 "1:     lwarx   %0,0,%2\n" \
         insn \
         PPC405_ERR77(0, %2) \
diff --git a/include/asm-powerpc/grackle.h b/include/asm-powerpc/grackle.h
index 563c7a5e64c9..bd7812a519d4 100644
--- a/include/asm-powerpc/grackle.h
+++ b/include/asm-powerpc/grackle.h
@@ -1,3 +1,6 @@
+#ifndef _ASM_POWERPC_GRACKLE_H
+#define _ASM_POWERPC_GRACKLE_H
+#ifdef __KERNEL__
 /*
  * Functions for setting up and using a MPC106 northbridge
  */
@@ -5,3 +8,5 @@
 #include <asm/pci-bridge.h>
 
 extern void setup_grackle(struct pci_controller *hose);
+#endif /* __KERNEL__ */
+#endif /* _ASM_POWERPC_GRACKLE_H */
diff --git a/include/asm-powerpc/hardirq.h b/include/asm-powerpc/hardirq.h
index 3b3e3b49ec12..288e14d53b7f 100644
--- a/include/asm-powerpc/hardirq.h
+++ b/include/asm-powerpc/hardirq.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_HARDIRQ_H
 #define _ASM_POWERPC_HARDIRQ_H
+#ifdef __KERNEL__
 
 #include <asm/irq.h>
 #include <asm/bug.h>
@@ -24,4 +25,5 @@ static inline void ack_bad_irq(int irq)
         BUG();
 }
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_HARDIRQ_H */
diff --git a/include/asm-powerpc/heathrow.h b/include/asm-powerpc/heathrow.h
index 22ac179856b9..93f54958a9d1 100644
--- a/include/asm-powerpc/heathrow.h
+++ b/include/asm-powerpc/heathrow.h
@@ -1,3 +1,6 @@
+#ifndef _ASM_POWERPC_HEATHROW_H
+#define _ASM_POWERPC_HEATHROW_H
+#ifdef __KERNEL__
 /*
  * heathrow.h: definitions for using the "Heathrow" I/O controller chip.
  *
@@ -60,3 +63,5 @@
 /* Looks like Heathrow has some sort of GPIOs as well... */
 #define HRW_GPIO_MODEM_RESET    0x6d
 
+#endif /* __KERNEL__ */
+#endif /* _ASM_POWERPC_HEATHROW_H */
diff --git a/include/asm-powerpc/hvcall.h b/include/asm-powerpc/hvcall.h
index d36da61dbc53..38ca9ad6110d 100644
--- a/include/asm-powerpc/hvcall.h
+++ b/include/asm-powerpc/hvcall.h
@@ -1,11 +1,15 @@
 #ifndef _ASM_POWERPC_HVCALL_H
 #define _ASM_POWERPC_HVCALL_H
+#ifdef __KERNEL__
 
 #define HVSC                    .long 0x44000022
 
 #define H_Success       0
 #define H_Busy          1       /* Hardware busy -- retry later */
+#define H_Closed        2       /* Resource closed */
 #define H_Constrained   4       /* Resource request constrained to max allowed */
+#define H_InProgress   14       /* Kind of like busy */
+#define H_Continue     18       /* Returned from H_Join on success */
 #define H_LongBusyStartRange   9900  /* Start of long busy range */
 #define H_LongBusyOrder1msec   9900  /* Long busy, hint that 1msec is a good time to retry */
 #define H_LongBusyOrder10msec  9901  /* Long busy, hint that 10msec is a good time to retry */
@@ -113,6 +117,8 @@
 #define H_REGISTER_VTERM        0x154
 #define H_FREE_VTERM            0x158
 #define H_POLL_PENDING          0x1D8
+#define H_JOIN                  0x298
+#define H_ENABLE_CRQ            0x2B0
 
 #ifndef __ASSEMBLY__
 
@@ -170,4 +176,5 @@ long plpar_hcall_4out(unsigned long opcode,
                       unsigned long *out4);
 
 #endif /* __ASSEMBLY__ */
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_HVCALL_H */
diff --git a/include/asm-powerpc/hvconsole.h b/include/asm-powerpc/hvconsole.h
index 6da93ce74dc0..34daf7b9b62f 100644
--- a/include/asm-powerpc/hvconsole.h
+++ b/include/asm-powerpc/hvconsole.h
@@ -21,6 +21,7 @@
 
 #ifndef _PPC64_HVCONSOLE_H
 #define _PPC64_HVCONSOLE_H
+#ifdef __KERNEL__
 
 /*
  * This is the max number of console adapters that can/will be found as
@@ -46,4 +47,5 @@ extern struct hvc_struct * __devinit hvc_alloc(uint32_t vtermno, int irq,
                                                  struct hv_ops *ops);
 /* remove a vterm from hvc tty operation (modele_exit or hotplug remove) */
 extern int __devexit hvc_remove(struct hvc_struct *hp);
+#endif /* __KERNEL__ */
 #endif /* _PPC64_HVCONSOLE_H */
diff --git a/include/asm-powerpc/hvcserver.h b/include/asm-powerpc/hvcserver.h
index aecba9665796..67d7da3a4da4 100644
--- a/include/asm-powerpc/hvcserver.h
+++ b/include/asm-powerpc/hvcserver.h
@@ -21,6 +21,7 @@
 
 #ifndef _PPC64_HVCSERVER_H
 #define _PPC64_HVCSERVER_H
+#ifdef __KERNEL__
 
 #include <linux/list.h>
 
@@ -54,4 +55,5 @@ extern int hvcs_register_connection(uint32_t unit_address,
                 uint32_t p_partition_ID, uint32_t p_unit_address);
 extern int hvcs_free_connection(uint32_t unit_address);
 
+#endif /* __KERNEL__ */
 #endif /* _PPC64_HVCSERVER_H */
diff --git a/include/asm-powerpc/i8259.h b/include/asm-powerpc/i8259.h
index fc4bfee124d7..0392159e16e4 100644
--- a/include/asm-powerpc/i8259.h
+++ b/include/asm-powerpc/i8259.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_I8259_H
 #define _ASM_POWERPC_I8259_H
+#ifdef __KERNEL__
 
 #include <linux/irq.h>
 
@@ -9,4 +10,5 @@ extern void i8259_init(unsigned long intack_addr, int offset);
 extern int i8259_irq(struct pt_regs *regs);
 extern int i8259_irq_cascade(struct pt_regs *regs, void *unused);
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_I8259_H */
diff --git a/include/asm-powerpc/ibmebus.h b/include/asm-powerpc/ibmebus.h
new file mode 100644
index 000000000000..7a42723d107c
--- /dev/null
+++ b/include/asm-powerpc/ibmebus.h
@@ -0,0 +1,85 @@
+/*
+ * IBM PowerPC eBus Infrastructure Support.
+ *
+ * Copyright (c) 2005 IBM Corporation
+ *  Heiko J Schick <schickhj@de.ibm.com>
+ *    
+ * All rights reserved.
+ *
+ * This source code is distributed under a dual license of GPL v2.0 and OpenIB 
+ * BSD. 
+ *
+ * OpenIB BSD License
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions are met: 
+ *
+ * Redistributions of source code must retain the above copyright notice, this 
+ * list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice, 
+ * this list of conditions and the following disclaimer in the documentation 
+ * and/or other materials
+ * provided with the distribution. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _ASM_EBUS_H
+#define _ASM_EBUS_H
+#ifdef __KERNEL__
+
+#include <linux/device.h>
+#include <linux/interrupt.h>
+#include <linux/mod_devicetable.h>
+#include <asm/of_device.h>
+
+extern struct dma_mapping_ops ibmebus_dma_ops;
+extern struct bus_type ibmebus_bus_type;
+
+struct ibmebus_dev {    
+        char *name;
+        struct of_device ofdev;
+};
+
+struct ibmebus_driver { 
+        char *name;
+        struct of_device_id *id_table;
+        int (*probe) (struct ibmebus_dev *dev, const struct of_device_id *id);
+        int (*remove) (struct ibmebus_dev *dev);
+        struct device_driver driver;
+};
+
+int ibmebus_register_driver(struct ibmebus_driver *drv);
+void ibmebus_unregister_driver(struct ibmebus_driver *drv);
+
+int ibmebus_request_irq(struct ibmebus_dev *dev,
+                        u32 ist, 
+                        irqreturn_t (*handler)(int, void*, struct pt_regs *),
+                        unsigned long irq_flags, const char * devname,
+                        void *dev_id);
+void ibmebus_free_irq(struct ibmebus_dev *dev, u32 ist, void *dev_id);
+
+static inline struct ibmebus_driver *to_ibmebus_driver(struct device_driver *drv)
+{
+        return container_of(drv, struct ibmebus_driver, driver);
+}
+
+static inline struct ibmebus_dev *to_ibmebus_dev(struct device *dev)
+{
+        return container_of(dev, struct ibmebus_dev, ofdev.dev);
+}
+
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_IBMEBUS_H */
diff --git a/include/asm-powerpc/io.h b/include/asm-powerpc/io.h
index 48938d84d055..68efbea379c9 100644
--- a/include/asm-powerpc/io.h
+++ b/include/asm-powerpc/io.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_IO_H
 #define _ASM_POWERPC_IO_H
+#ifdef __KERNEL__
 
 /* 
  * This program is free software; you can redistribute it and/or
@@ -186,7 +187,6 @@ extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, int nl);
 #define IO_SPACE_LIMIT ~(0UL)
 
 
-#ifdef __KERNEL__
 extern int __ioremap_explicit(unsigned long p_addr, unsigned long v_addr,
                               unsigned long size, unsigned long flags);
 extern void __iomem *__ioremap(unsigned long address, unsigned long size,
@@ -256,8 +256,6 @@ static inline void * phys_to_virt(unsigned long address)
  */
 #define BIO_VMERGE_BOUNDARY     0
 
-#endif /* __KERNEL__ */
-
 static inline void iosync(void)
 {
         __asm__ __volatile__ ("sync" : : : "memory");
@@ -405,8 +403,6 @@ static inline void out_be64(volatile unsigned long __iomem *addr, unsigned long
 #include <asm/eeh.h>
 #endif
 
-#ifdef __KERNEL__
-
 /**
  *      check_signature         -       find BIOS signatures
  *      @io_addr: mmio address to check
diff --git a/include/asm-powerpc/iommu.h b/include/asm-powerpc/iommu.h
index f89f06050893..d5677cbec200 100644
--- a/include/asm-powerpc/iommu.h
+++ b/include/asm-powerpc/iommu.h
@@ -20,6 +20,7 @@
 
 #ifndef _ASM_IOMMU_H
 #define _ASM_IOMMU_H
+#ifdef __KERNEL__
 
 #include <linux/config.h>
 #include <asm/types.h>
@@ -56,32 +57,13 @@ struct device_node;
 
 /* Walks all buses and creates iommu tables */
 extern void iommu_setup_pSeries(void);
-extern void iommu_setup_u3(void);
+extern void iommu_setup_dart(void);
 
 /* Frees table for an individual device node */
 extern void iommu_free_table(struct device_node *dn);
 
 #endif /* CONFIG_PPC_MULTIPLATFORM */
 
-#ifdef CONFIG_PPC_PSERIES
-
-/* Creates table for an individual device node */
-extern void iommu_devnode_init_pSeries(struct device_node *dn);
-
-#endif /* CONFIG_PPC_PSERIES */
-
-#ifdef CONFIG_PPC_ISERIES
-
-/* Creates table for an individual device node */
-extern void iommu_devnode_init_iSeries(struct device_node *dn);
-/* Get table parameters from HV */
-extern void iommu_table_getparms_iSeries(unsigned long busno,
-                                         unsigned char slotno,
-                                         unsigned char virtbus,
-                                         struct iommu_table* tbl);
-
-#endif /* CONFIG_PPC_ISERIES */
-
 /* Initializes an iommu_table based in values set in the passed-in
  * structure
  */
@@ -104,7 +86,7 @@ extern void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle,
 
 extern void iommu_init_early_pSeries(void);
 extern void iommu_init_early_iSeries(void);
-extern void iommu_init_early_u3(void);
+extern void iommu_init_early_dart(void);
 
 #ifdef CONFIG_PCI
 extern void pci_iommu_init(void);
@@ -113,6 +95,7 @@ extern void pci_direct_iommu_init(void);
 static inline void pci_iommu_init(void) { }
 #endif
 
-extern void alloc_u3_dart_table(void);
+extern void alloc_dart_table(void);
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_IOMMU_H */
diff --git a/include/asm-powerpc/ipic.h b/include/asm-powerpc/ipic.h
new file mode 100644
index 000000000000..0fe396a2b666
--- /dev/null
+++ b/include/asm-powerpc/ipic.h
@@ -0,0 +1,85 @@
+/*
+ * include/asm-ppc/ipic.h
+ *
+ * IPIC external definitions and structure.
+ *
+ * Maintainer: Kumar Gala <galak@kernel.crashing.org>
+ *
+ * Copyright 2005 Freescale Semiconductor, Inc
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#ifdef __KERNEL__
+#ifndef __ASM_IPIC_H__
+#define __ASM_IPIC_H__
+
+#include <linux/irq.h>
+
+/* Flags when we init the IPIC */
+#define IPIC_SPREADMODE_GRP_A   0x00000001
+#define IPIC_SPREADMODE_GRP_D   0x00000002
+#define IPIC_SPREADMODE_MIX_A   0x00000004
+#define IPIC_SPREADMODE_MIX_B   0x00000008
+#define IPIC_DISABLE_MCP_OUT    0x00000010
+#define IPIC_IRQ0_MCP           0x00000020
+
+/* IPIC registers offsets */
+#define IPIC_SICFR      0x00    /* System Global Interrupt Configuration Register */
+#define IPIC_SIVCR      0x04    /* System Global Interrupt Vector Register */
+#define IPIC_SIPNR_H    0x08    /* System Internal Interrupt Pending Register (HIGH) */
+#define IPIC_SIPNR_L    0x0C    /* System Internal Interrupt Pending Register (LOW) */
+#define IPIC_SIPRR_A    0x10    /* System Internal Interrupt group A Priority Register */
+#define IPIC_SIPRR_B    0x14    /* System Internal Interrupt group B Priority Register */
+#define IPIC_SIPRR_C    0x18    /* System Internal Interrupt group C Priority Register */
+#define IPIC_SIPRR_D    0x1C    /* System Internal Interrupt group D Priority Register */
+#define IPIC_SIMSR_H    0x20    /* System Internal Interrupt Mask Register (HIGH) */
+#define IPIC_SIMSR_L    0x24    /* System Internal Interrupt Mask Register (LOW) */
+#define IPIC_SICNR      0x28    /* System Internal Interrupt Control Register */
+#define IPIC_SEPNR      0x2C    /* System External Interrupt Pending Register */
+#define IPIC_SMPRR_A    0x30    /* System Mixed Interrupt group A Priority Register */
+#define IPIC_SMPRR_B    0x34    /* System Mixed Interrupt group B Priority Register */
+#define IPIC_SEMSR      0x38    /* System External Interrupt Mask Register */
+#define IPIC_SECNR      0x3C    /* System External Interrupt Control Register */
+#define IPIC_SERSR      0x40    /* System Error Status Register */
+#define IPIC_SERMR      0x44    /* System Error Mask Register */
+#define IPIC_SERCR      0x48    /* System Error Control Register */
+#define IPIC_SIFCR_H    0x50    /* System Internal Interrupt Force Register (HIGH) */
+#define IPIC_SIFCR_L    0x54    /* System Internal Interrupt Force Register (LOW) */
+#define IPIC_SEFCR      0x58    /* System External Interrupt Force Register */
+#define IPIC_SERFR      0x5C    /* System Error Force Register */
+#define IPIC_SCVCR      0x60    /* System Critical Interrupt Vector Register */
+#define IPIC_SMVCR      0x64    /* System Management Interrupt Vector Register */
+
+enum ipic_prio_grp {
+        IPIC_INT_GRP_A = IPIC_SIPRR_A,
+        IPIC_INT_GRP_D = IPIC_SIPRR_D,
+        IPIC_MIX_GRP_A = IPIC_SMPRR_A,
+        IPIC_MIX_GRP_B = IPIC_SMPRR_B,
+};
+
+enum ipic_mcp_irq {
+        IPIC_MCP_IRQ0 = 0,
+        IPIC_MCP_WDT  = 1,
+        IPIC_MCP_SBA  = 2,
+        IPIC_MCP_PCI1 = 5,
+        IPIC_MCP_PCI2 = 6,
+        IPIC_MCP_MU   = 7,
+};
+
+extern void ipic_init(phys_addr_t phys_addr, unsigned int flags,
+                unsigned int irq_offset,
+                unsigned char *senses, unsigned int senses_count);
+extern int ipic_set_priority(unsigned int irq, unsigned int priority);
+extern void ipic_set_highest_priority(unsigned int irq);
+extern void ipic_set_default_priority(void);
+extern void ipic_enable_mcp(enum ipic_mcp_irq mcp_irq);
+extern void ipic_disable_mcp(enum ipic_mcp_irq mcp_irq);
+extern u32 ipic_get_mcp_status(void);
+extern void ipic_clear_mcp_status(u32 mask);
+extern int ipic_get_irq(struct pt_regs *regs);
+
+#endif /* __ASM_IPIC_H__ */
+#endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/iseries/hv_call.h b/include/asm-powerpc/iseries/hv_call.h
index e9f831c9a5e5..162d653ad51f 100644
--- a/include/asm-powerpc/iseries/hv_call.h
+++ b/include/asm-powerpc/iseries/hv_call.h
@@ -1,5 +1,4 @@
 /*
- * HvCall.h
  * Copyright (C) 2001  Mike Corrigan IBM Corporation
  *
  * This program is free software; you can redistribute it and/or modify
@@ -15,8 +14,7 @@
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
- */
-/*
+ *
  * This file contains the "hypervisor call" interface which is used to
  * drive the hypervisor from the OS.
  */
diff --git a/include/asm-powerpc/iseries/hv_call_event.h b/include/asm-powerpc/iseries/hv_call_event.h
index 46763a30590a..4cec4762076d 100644
--- a/include/asm-powerpc/iseries/hv_call_event.h
+++ b/include/asm-powerpc/iseries/hv_call_event.h
@@ -1,5 +1,4 @@
 /*
- * HvCallEvent.h
  * Copyright (C) 2001  Mike Corrigan IBM Corporation
  *
  * This program is free software; you can redistribute it and/or modify
@@ -15,8 +14,7 @@
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
- */
-/*
+ *
  * This file contains the "hypervisor call" interface which is used to
  * drive the hypervisor from the OS.
  */
@@ -33,32 +31,9 @@ typedef u8 HvLpEvent_Type;
 typedef u8 HvLpEvent_AckInd;
 typedef u8 HvLpEvent_AckType;
 
-struct  HvCallEvent_PackedParms {
-        u8              xAckType:1;
-        u8              xAckInd:1;
-        u8              xRsvd:1;
-        u8              xTargetLp:5;
-        u8              xType;
-        u16             xSubtype;
-        HvLpInstanceId  xSourceInstId;
-        HvLpInstanceId  xTargetInstId;
-};
-
 typedef u8 HvLpDma_Direction;
 typedef u8 HvLpDma_AddressType;
 
-struct  HvCallEvent_PackedDmaParms {
-        u8              xDirection:1;
-        u8              xLocalAddrType:1;
-        u8              xRemoteAddrType:1;
-        u8              xRsvd1:5;
-        HvLpIndex       xRemoteLp;
-        u8              xType;
-        u8              xRsvd2;
-        HvLpInstanceId  xLocalInstId;
-        HvLpInstanceId  xRemoteInstId;
-};
-
 typedef u64 HvLpEvent_Rc;
 typedef u64 HvLpDma_Rc;
 
@@ -92,11 +67,8 @@ static inline void HvCallEvent_setInterLpQueueIndex(u8 queueIndex)
 static inline void HvCallEvent_setLpEventStack(u8 queueIndex,
                 char *eventStackAddr, u32 eventStackSize)
 {
-        u64 abs_addr;
-
-        abs_addr = virt_to_abs(eventStackAddr);
-        HvCall3(HvCallEventSetLpEventStack, queueIndex, abs_addr,
-                        eventStackSize);
+        HvCall3(HvCallEventSetLpEventStack, queueIndex,
+                        virt_to_abs(eventStackAddr), eventStackSize);
 }
 
 static inline void HvCallEvent_setLpEventQueueInterruptProc(u8 queueIndex,
@@ -108,14 +80,7 @@ static inline void HvCallEvent_setLpEventQueueInterruptProc(u8 queueIndex,
 
 static inline HvLpEvent_Rc HvCallEvent_signalLpEvent(struct HvLpEvent *event)
 {
-        u64 abs_addr;
-
-#ifdef DEBUG_SENDEVENT
-        printk("HvCallEvent_signalLpEvent: *event = %016lx\n ",
-                        (unsigned long)event);
-#endif
-        abs_addr = virt_to_abs(event);
-        return HvCall1(HvCallEventSignalLpEvent, abs_addr);
+        return HvCall1(HvCallEventSignalLpEvent, virt_to_abs(event));
 }
 
 static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp,
@@ -127,17 +92,21 @@ static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp,
 {
         /* Pack the misc bits into a single Dword to pass to PLIC */
         union {
-                struct HvCallEvent_PackedParms  parms;
+                struct {
+                        u8              ack_and_target;
+                        u8              type;
+                        u16             subtype;
+                        HvLpInstanceId  src_inst;
+                        HvLpInstanceId  target_inst;
+                } parms;
                 u64             dword;
         } packed;
-        packed.parms.xAckType   = ackType;
-        packed.parms.xAckInd    = ackInd;
-        packed.parms.xRsvd      = 0;
-        packed.parms.xTargetLp  = targetLp;
-        packed.parms.xType      = type;
-        packed.parms.xSubtype   = subtype;
-        packed.parms.xSourceInstId      = sourceInstanceId;
-        packed.parms.xTargetInstId      = targetInstanceId;
+
+        packed.parms.ack_and_target = (ackType << 7) | (ackInd << 6) | targetLp;
+        packed.parms.type = type;
+        packed.parms.subtype = subtype;
+        packed.parms.src_inst = sourceInstanceId;
+        packed.parms.target_inst = targetInstanceId;
 
         return HvCall7(HvCallEventSignalLpEventParms, packed.dword,
                         correlationToken, eventData1, eventData2,
@@ -146,18 +115,12 @@ static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp,
 
 static inline HvLpEvent_Rc HvCallEvent_ackLpEvent(struct HvLpEvent *event)
 {
-        u64 abs_addr;
-
-        abs_addr = virt_to_abs(event);
-        return HvCall1(HvCallEventAckLpEvent, abs_addr);
+        return HvCall1(HvCallEventAckLpEvent, virt_to_abs(event));
 }
 
 static inline HvLpEvent_Rc HvCallEvent_cancelLpEvent(struct HvLpEvent *event)
 {
-        u64 abs_addr;
-
-        abs_addr = virt_to_abs(event);
-        return HvCall1(HvCallEventCancelLpEvent, abs_addr);
+        return HvCall1(HvCallEventCancelLpEvent, virt_to_abs(event));
 }
 
 static inline HvLpInstanceId HvCallEvent_getSourceLpInstanceId(
@@ -195,59 +158,34 @@ static inline HvLpDma_Rc HvCallEvent_dmaBufList(HvLpEvent_Type type,
 {
         /* Pack the misc bits into a single Dword to pass to PLIC */
         union {
-                struct HvCallEvent_PackedDmaParms       parms;
+                struct {
+                        u8              flags;
+                        HvLpIndex       remote;
+                        u8              type;
+                        u8              reserved;
+                        HvLpInstanceId  local_inst;
+                        HvLpInstanceId  remote_inst;
+                } parms;
                 u64             dword;
         } packed;
 
-        packed.parms.xDirection         = direction;
-        packed.parms.xLocalAddrType     = localAddressType;
-        packed.parms.xRemoteAddrType    = remoteAddressType;
-        packed.parms.xRsvd1             = 0;
-        packed.parms.xRemoteLp          = remoteLp;
-        packed.parms.xType              = type;
-        packed.parms.xRsvd2             = 0;
-        packed.parms.xLocalInstId       = localInstanceId;
-        packed.parms.xRemoteInstId      = remoteInstanceId;
+        packed.parms.flags = (direction << 7) |
+                (localAddressType << 6) | (remoteAddressType << 5);
+        packed.parms.remote = remoteLp;
+        packed.parms.type = type;
+        packed.parms.reserved = 0;
+        packed.parms.local_inst = localInstanceId;
+        packed.parms.remote_inst = remoteInstanceId;
 
         return HvCall4(HvCallEventDmaBufList, packed.dword, localBufList,
                         remoteBufList, transferLength);
 }
 
-static inline HvLpDma_Rc HvCallEvent_dmaSingle(HvLpEvent_Type type,
-                HvLpIndex remoteLp, HvLpDma_Direction direction,
-                HvLpInstanceId localInstanceId,
-                HvLpInstanceId remoteInstanceId,
-                HvLpDma_AddressType localAddressType,
-                HvLpDma_AddressType remoteAddressType,
-                u64 localAddrOrTce, u64 remoteAddrOrTce, u32 transferLength)
-{
-        /* Pack the misc bits into a single Dword to pass to PLIC */
-        union {
-                struct HvCallEvent_PackedDmaParms       parms;
-                u64             dword;
-        } packed;
-
-        packed.parms.xDirection         = direction;
-        packed.parms.xLocalAddrType     = localAddressType;
-        packed.parms.xRemoteAddrType    = remoteAddressType;
-        packed.parms.xRsvd1             = 0;
-        packed.parms.xRemoteLp          = remoteLp;
-        packed.parms.xType              = type;
-        packed.parms.xRsvd2             = 0;
-        packed.parms.xLocalInstId       = localInstanceId;
-        packed.parms.xRemoteInstId      = remoteInstanceId;
-
-        return (HvLpDma_Rc)HvCall4(HvCallEventDmaSingle, packed.dword,
-                        localAddrOrTce, remoteAddrOrTce, transferLength);
-}
-
 static inline HvLpDma_Rc HvCallEvent_dmaToSp(void *local, u32 remote,
                 u32 length, HvLpDma_Direction dir)
 {
-        u64 abs_addr;
-
-        abs_addr = virt_to_abs(local);
-        return HvCall4(HvCallEventDmaToSp, abs_addr, remote, length, dir);
+        return HvCall4(HvCallEventDmaToSp, virt_to_abs(local), remote,
+                        length, dir);
 }
 
 #endif /* _ASM_POWERPC_ISERIES_HV_CALL_EVENT_H */
diff --git a/include/asm-powerpc/iseries/hv_call_sc.h b/include/asm-powerpc/iseries/hv_call_sc.h
index dec7e9d9ab78..f5d210959250 100644
--- a/include/asm-powerpc/iseries/hv_call_sc.h
+++ b/include/asm-powerpc/iseries/hv_call_sc.h
@@ -1,5 +1,4 @@
 /*
- * HvCallSc.h
  * Copyright (C) 2001  Mike Corrigan IBM Corporation
  *
  * This program is free software; you can redistribute it and/or modify
diff --git a/include/asm-powerpc/iseries/hv_lp_config.h b/include/asm-powerpc/iseries/hv_lp_config.h
index bc00f036bca0..df8b20739719 100644
--- a/include/asm-powerpc/iseries/hv_lp_config.h
+++ b/include/asm-powerpc/iseries/hv_lp_config.h
@@ -1,5 +1,4 @@
 /*
- * HvLpConfig.h
  * Copyright (C) 2001  Mike Corrigan IBM Corporation
  *
  * This program is free software; you can redistribute it and/or modify
diff --git a/include/asm-powerpc/iseries/hv_lp_event.h b/include/asm-powerpc/iseries/hv_lp_event.h
index 499ab1ad0185..4065a4de4935 100644
--- a/include/asm-powerpc/iseries/hv_lp_event.h
+++ b/include/asm-powerpc/iseries/hv_lp_event.h
@@ -1,5 +1,4 @@
 /*
- * HvLpEvent.h
  * Copyright (C) 2001  Mike Corrigan IBM Corporation
  *
  * This program is free software; you can redistribute it and/or modify
@@ -32,17 +31,8 @@
  * partitions through PLIC.
  */
 
-struct HvEventFlags {
-        u8      xValid:1;       /* Indicates a valid request    x00-x00 */
-        u8      xRsvd1:4;       /* Reserved                     ... */
-        u8      xAckType:1;     /* Immediate or deferred        ... */
-        u8      xAckInd:1;      /* Indicates if ACK required    ... */
-        u8      xFunction:1;    /* Interrupt or Acknowledge     ... */
-};
-
-
 struct HvLpEvent {
-        struct HvEventFlags xFlags;     /* Event flags                x00-x00 */
+        u8      flags;                  /* Event flags                x00-x00 */
         u8      xType;                  /* Type of message            x01-x01 */
         u16     xSubtype;               /* Subtype for event          x02-x03 */
         u8      xSourceLp;              /* Source LP                  x04-x04 */
@@ -126,6 +116,11 @@ extern int HvLpEvent_closePath(HvLpEvent_Type eventType, HvLpIndex lpIndex);
 #define HvLpEvent_AckType_ImmediateAck 0
 #define HvLpEvent_AckType_DeferredAck 1
 
+#define HV_LP_EVENT_INT                 0x01
+#define HV_LP_EVENT_DO_ACK              0x02
+#define HV_LP_EVENT_DEFERRED_ACK        0x04
+#define HV_LP_EVENT_VALID               0x80
+
 #define HvLpDma_Direction_LocalToRemote 0
 #define HvLpDma_Direction_RemoteToLocal 1
 
@@ -139,4 +134,29 @@ extern int HvLpEvent_closePath(HvLpEvent_Type eventType, HvLpIndex lpIndex);
 #define HvLpDma_Rc_InvalidAddress 4
 #define HvLpDma_Rc_InvalidLength 5
 
+static inline int hvlpevent_is_valid(struct HvLpEvent *h)
+{
+        return h->flags & HV_LP_EVENT_VALID;
+}
+
+static inline void hvlpevent_invalidate(struct HvLpEvent *h)
+{
+        h->flags &= ~ HV_LP_EVENT_VALID;
+}
+
+static inline int hvlpevent_is_int(struct HvLpEvent *h)
+{
+        return h->flags & HV_LP_EVENT_INT;
+}
+
+static inline int hvlpevent_is_ack(struct HvLpEvent *h)
+{
+        return !hvlpevent_is_int(h);
+}
+
+static inline int hvlpevent_need_ack(struct HvLpEvent *h)
+{
+        return h->flags & HV_LP_EVENT_DO_ACK;
+}
+
 #endif /* _ASM_POWERPC_ISERIES_HV_LP_EVENT_H */
diff --git a/include/asm-powerpc/iseries/hv_types.h b/include/asm-powerpc/iseries/hv_types.h
index c38f7e3d01dc..c3e6d2a1d1c3 100644
--- a/include/asm-powerpc/iseries/hv_types.h
+++ b/include/asm-powerpc/iseries/hv_types.h
@@ -1,5 +1,4 @@
 /*
- * HvTypes.h
  * Copyright (C) 2001  Mike Corrigan IBM Corporation
  *
  * This program is free software; you can redistribute it and/or modify
diff --git a/include/asm-powerpc/iseries/iseries_io.h b/include/asm-powerpc/iseries/iseries_io.h
index 56b2113ff0f5..496aa852b617 100644
--- a/include/asm-powerpc/iseries/iseries_io.h
+++ b/include/asm-powerpc/iseries/iseries_io.h
@@ -6,7 +6,7 @@
 #ifdef CONFIG_PPC_ISERIES
 #include <linux/types.h>
 /*
- * File iSeries_io.h created by Allan Trautman on Thu Dec 28 2000.
+ * Created by Allan Trautman on Thu Dec 28 2000.
  *
  * Remaps the io.h for the iSeries Io
  * Copyright (C) 2000  Allan H Trautman, IBM Corporation
@@ -32,6 +32,7 @@
  * End Change Activity
  */
 
+#ifdef CONFIG_PCI
 extern u8   iSeries_Read_Byte(const volatile void __iomem * IoAddress);
 extern u16  iSeries_Read_Word(const volatile void __iomem * IoAddress);
 extern u32  iSeries_Read_Long(const volatile void __iomem * IoAddress);
@@ -44,6 +45,17 @@ extern void iSeries_memcpy_toio(volatile void __iomem *dest, void *source,
                 size_t n);
 extern void iSeries_memcpy_fromio(void *dest,
                 const volatile void __iomem *source, size_t n);
+#else
+static inline u8 iSeries_Read_Byte(const volatile void __iomem *IoAddress)
+{
+        return 0xff;
+}
+
+static inline void iSeries_Write_Byte(u8 IoData,
+                volatile void __iomem *IoAddress)
+{
+}
+#endif  /* CONFIG_PCI */
 
 #endif /* CONFIG_PPC_ISERIES */
 #endif /* _ASM_POWERPC_ISERIES_ISERIES_IO_H */
diff --git a/include/asm-powerpc/iseries/it_exp_vpd_panel.h b/include/asm-powerpc/iseries/it_exp_vpd_panel.h
index 66a17a230c52..304a609ae21a 100644
--- a/include/asm-powerpc/iseries/it_exp_vpd_panel.h
+++ b/include/asm-powerpc/iseries/it_exp_vpd_panel.h
@@ -1,5 +1,4 @@
 /*
- * ItExtVpdPanel.h
  * Copyright (C) 2002  Dave Boutcher IBM Corporation
  *
  * This program is free software; you can redistribute it and/or modify
diff --git a/include/asm-powerpc/iseries/it_lp_naca.h b/include/asm-powerpc/iseries/it_lp_naca.h
index c3ef1de45d82..4fdcf052927f 100644
--- a/include/asm-powerpc/iseries/it_lp_naca.h
+++ b/include/asm-powerpc/iseries/it_lp_naca.h
@@ -1,5 +1,4 @@
 /*
- * ItLpNaca.h
  * Copyright (C) 2001  Mike Corrigan IBM Corporation
  *
  * This program is free software; you can redistribute it and/or modify
@@ -37,17 +36,13 @@ struct ItLpNaca {
         u8      xLpIndex;               // LP Index                     x0B-x0B
         u16     xMaxLpQueues;           // Number of allocated queues   x0C-x0D
         u16     xLpQueueOffset;         // Offset to start of LP queues x0E-x0F
-        u8      xPirEnvironMode:8;      // Piranha or hardware          x10-x10
-        u8      xPirConsoleMode:8;      // Piranha console indicator    x11-x11
-        u8      xPirDasdMode:8;         // Piranha dasd indicator       x12-x12
+        u8      xPirEnvironMode;        // Piranha or hardware          x10-x10
+        u8      xPirConsoleMode;        // Piranha console indicator    x11-x11
+        u8      xPirDasdMode;           // Piranha dasd indicator       x12-x12
         u8      xRsvd1_0[5];            // Reserved for Piranha related x13-x17
-        u8      xLparInstalled:1;       // Is LPAR installed on system  x18-x1F
-        u8      xSysPartitioned:1;      // Is the system partitioned    ...
-        u8      xHwSyncedTBs:1;         // Hardware synced TBs          ...
-        u8      xIntProcUtilHmt:1;      // Utilize HMT for interrupts   ...
-        u8      xRsvd1_1:4;             // Reserved                     ...
-        u8      xSpVpdFormat:8;         // VPD areas are in CSP format  ...
-        u8      xIntProcRatio:8;        // Ratio of int procs to procs  ...
+        u8      flags;                  // flags, see below             x18-x1F
+        u8      xSpVpdFormat;           // VPD areas are in CSP format  ...
+        u8      xIntProcRatio;          // Ratio of int procs to procs  ...
         u8      xRsvd1_2[5];            // Reserved                     ...
         u16     xRsvd1_3;               // Reserved                     x20-x21
         u16     xPlicVrmIndex;          // VRM index of PLIC            x22-x23
@@ -77,4 +72,9 @@ struct ItLpNaca {
 
 extern struct ItLpNaca          itLpNaca;
 
+#define ITLPNACA_LPAR           0x80    /* Is LPAR installed on the system */
+#define ITLPNACA_PARTITIONED    0x40    /* Is the system partitioned */
+#define ITLPNACA_HWSYNCEDTBS    0x20    /* Hardware synced TBs */
+#define ITLPNACA_HMTINT         0x10    /* Utilize MHT for interrupts */
+
 #endif /* _ASM_POWERPC_ISERIES_IT_LP_NACA_H */
diff --git a/include/asm-powerpc/iseries/it_lp_queue.h b/include/asm-powerpc/iseries/it_lp_queue.h
index a60d03afbf95..b7c6fc12cce2 100644
--- a/include/asm-powerpc/iseries/it_lp_queue.h
+++ b/include/asm-powerpc/iseries/it_lp_queue.h
@@ -1,5 +1,4 @@
 /*
- * ItLpQueue.h
  * Copyright (C) 2001  Mike Corrigan IBM Corporation
  *
  * This program is free software; you can redistribute it and/or modify
diff --git a/include/asm-powerpc/iseries/it_lp_reg_save.h b/include/asm-powerpc/iseries/it_lp_reg_save.h
index 288044b702de..5403b756f654 100644
--- a/include/asm-powerpc/iseries/it_lp_reg_save.h
+++ b/include/asm-powerpc/iseries/it_lp_reg_save.h
@@ -1,5 +1,4 @@
 /*
- * ItLpRegSave.h
  * Copyright (C) 2001  Mike Corrigan IBM Corporation
  *
  * This program is free software; you can redistribute it and/or modify
@@ -81,4 +80,6 @@ struct ItLpRegSave {
         u8      xRsvd3[176];    // Reserved                     350-3FF
 };
 
-#endif /* _ITLPREGSAVE_H */
+extern struct ItLpRegSave iseries_reg_save[];
+
+#endif /* _ASM_POWERPC_ISERIES_IT_LP_REG_SAVE_H */
diff --git a/include/asm-powerpc/iseries/lpar_map.h b/include/asm-powerpc/iseries/lpar_map.h
index 84fc321615bf..2ec384d66abb 100644
--- a/include/asm-powerpc/iseries/lpar_map.h
+++ b/include/asm-powerpc/iseries/lpar_map.h
@@ -1,5 +1,4 @@
 /*
- * LparMap.h
  * Copyright (C) 2001  Mike Corrigan IBM Corporation
  *
  * This program is free software; you can redistribute it and/or modify
diff --git a/include/asm-powerpc/iseries/mf.h b/include/asm-powerpc/iseries/mf.h
index e7bd57a03fb1..857e5202fc78 100644
--- a/include/asm-powerpc/iseries/mf.h
+++ b/include/asm-powerpc/iseries/mf.h
@@ -1,5 +1,4 @@
 /*
- * mf.h
  * Copyright (C) 2001  Troy D. Armstrong IBM Corporation
  * Copyright (C) 2004  Stephen Rothwell IBM Corporation
  *
diff --git a/include/asm-powerpc/iseries/vio.h b/include/asm-powerpc/iseries/vio.h
index 7e3a469420dd..72a97d37aac3 100644
--- a/include/asm-powerpc/iseries/vio.h
+++ b/include/asm-powerpc/iseries/vio.h
@@ -1,5 +1,4 @@
 /* -*- linux-c -*-
- *  drivers/char/vio.h
  *
  *  iSeries Virtual I/O Message Path header
  *
diff --git a/include/asm-powerpc/kdebug.h b/include/asm-powerpc/kdebug.h
index 9dcbac674811..7c16265568e0 100644
--- a/include/asm-powerpc/kdebug.h
+++ b/include/asm-powerpc/kdebug.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_KDEBUG_H
 #define _ASM_POWERPC_KDEBUG_H
+#ifdef __KERNEL__
 
 /* nearly identical to x86_64/i386 code */
 
@@ -39,4 +40,5 @@ static inline int notify_die(enum die_val val,char *str,struct pt_regs *regs,lon
         return notifier_call_chain(&powerpc_die_chain, val, &args);
 }
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_KDEBUG_H */
diff --git a/include/asm-powerpc/kdump.h b/include/asm-powerpc/kdump.h
new file mode 100644
index 000000000000..a87aed00d61f
--- /dev/null
+++ b/include/asm-powerpc/kdump.h
@@ -0,0 +1,13 @@
+#ifndef _PPC64_KDUMP_H
+#define _PPC64_KDUMP_H
+
+/* How many bytes to reserve at zero for kdump. The reserve limit should
+ * be greater or equal to the trampoline's end address. */
+#define KDUMP_RESERVE_LIMIT     0x8000
+
+#define KDUMP_TRAMPOLINE_START  0x0100
+#define KDUMP_TRAMPOLINE_END    0x3000
+
+extern void kdump_setup(void);
+
+#endif /* __PPC64_KDUMP_H */
diff --git a/include/asm-powerpc/kexec.h b/include/asm-powerpc/kexec.h
index c72ffc709ea8..640a6459f2f4 100644
--- a/include/asm-powerpc/kexec.h
+++ b/include/asm-powerpc/kexec.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_KEXEC_H
 #define _ASM_POWERPC_KEXEC_H
+#ifdef __KERNEL__
 
 /*
  * Maximum page that is mapped directly into kernel memory.
@@ -30,21 +31,97 @@
 #define KEXEC_ARCH KEXEC_ARCH_PPC
 #endif
 
-#ifndef __ASSEMBLY__
+#ifdef CONFIG_KEXEC
 
-#define MAX_NOTE_BYTES 1024
-typedef u32 note_buf_t[MAX_NOTE_BYTES / sizeof(u32)];
+#ifdef __powerpc64__
+/*
+ * This function is responsible for capturing register states if coming
+ * via panic or invoking dump using sysrq-trigger.
+ */
+static inline void crash_setup_regs(struct pt_regs *newregs,
+                                        struct pt_regs *oldregs)
+{
+        if (oldregs)
+                memcpy(newregs, oldregs, sizeof(*newregs));
+        else {
+                /* FIXME Merge this with xmon_save_regs ?? */
+                unsigned long tmp1, tmp2;
+                __asm__ __volatile__ (
+                        "std    0,0(%2)\n"
+                        "std    1,8(%2)\n"
+                        "std    2,16(%2)\n"
+                        "std    3,24(%2)\n"
+                        "std    4,32(%2)\n"
+                        "std    5,40(%2)\n"
+                        "std    6,48(%2)\n"
+                        "std    7,56(%2)\n"
+                        "std    8,64(%2)\n"
+                        "std    9,72(%2)\n"
+                        "std    10,80(%2)\n"
+                        "std    11,88(%2)\n"
+                        "std    12,96(%2)\n"
+                        "std    13,104(%2)\n"
+                        "std    14,112(%2)\n"
+                        "std    15,120(%2)\n"
+                        "std    16,128(%2)\n"
+                        "std    17,136(%2)\n"
+                        "std    18,144(%2)\n"
+                        "std    19,152(%2)\n"
+                        "std    20,160(%2)\n"
+                        "std    21,168(%2)\n"
+                        "std    22,176(%2)\n"
+                        "std    23,184(%2)\n"
+                        "std    24,192(%2)\n"
+                        "std    25,200(%2)\n"
+                        "std    26,208(%2)\n"
+                        "std    27,216(%2)\n"
+                        "std    28,224(%2)\n"
+                        "std    29,232(%2)\n"
+                        "std    30,240(%2)\n"
+                        "std    31,248(%2)\n"
+                        "mfmsr  %0\n"
+                        "std    %0, 264(%2)\n"
+                        "mfctr  %0\n"
+                        "std    %0, 280(%2)\n"
+                        "mflr   %0\n"
+                        "std    %0, 288(%2)\n"
+                        "bl     1f\n"
+                "1:     mflr   %1\n"
+                        "std    %1, 256(%2)\n"
+                        "mtlr   %0\n"
+                        "mfxer  %0\n"
+                        "std    %0, 296(%2)\n"
+                        : "=&r" (tmp1), "=&r" (tmp2)
+                        : "b" (newregs));
+        }
+}
+#else
+/*
+ * Provide a dummy definition to avoid build failures. Will remain
+ * empty till crash dump support is enabled.
+ */
+static inline void crash_setup_regs(struct pt_regs *newregs,
+                                        struct pt_regs *oldregs) { }
+#endif /* !__powerpc64 __ */
 
-extern note_buf_t crash_notes[];
+#ifndef __ASSEMBLY__
+#define MAX_NOTE_BYTES 1024
 
 #ifdef __powerpc64__
 extern void kexec_smp_wait(void);       /* get and clear naca physid, wait for
                                           master to copy new code to 0 */
 extern void __init kexec_setup(void);
-#else
+extern int crashing_cpu;
+extern void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *));
+#endif /* __powerpc64 __ */
+
 struct kimage;
-extern void machine_kexec_simple(struct kimage *image);
-#endif
+struct pt_regs;
+extern void default_machine_kexec(struct kimage *image);
+extern int default_machine_kexec_prepare(struct kimage *image);
+extern void default_machine_crash_shutdown(struct pt_regs *regs);
 
 #endif /* ! __ASSEMBLY__ */
+#endif /* CONFIG_KEXEC */
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_KEXEC_H */
diff --git a/include/asm-powerpc/keylargo.h b/include/asm-powerpc/keylargo.h
index a669a3f0f5a2..d8520ef121f9 100644
--- a/include/asm-powerpc/keylargo.h
+++ b/include/asm-powerpc/keylargo.h
@@ -1,3 +1,6 @@
+#ifndef _ASM_POWERPC_KEYLARGO_H
+#define _ASM_POWERPC_KEYLARGO_H
+#ifdef __KERNEL__
 /*
  * keylargo.h: definitions for using the "KeyLargo" I/O controller chip.
  *
@@ -232,10 +235,12 @@
 #define K2_FCR1_I2S0_RESET              0x00000800
 #define K2_FCR1_I2S0_CLK_ENABLE_BIT     0x00001000
 #define K2_FCR1_I2S0_ENABLE             0x00002000
-
 #define K2_FCR1_PCI1_CLK_ENABLE         0x00004000
 #define K2_FCR1_FW_CLK_ENABLE           0x00008000
 #define K2_FCR1_FW_RESET_N              0x00010000
+#define K2_FCR1_I2S1_CELL_ENABLE        0x00020000
+#define K2_FCR1_I2S1_CLK_ENABLE_BIT     0x00080000
+#define K2_FCR1_I2S1_ENABLE             0x00100000
 #define K2_FCR1_GMAC_CLK_ENABLE         0x00400000
 #define K2_FCR1_GMAC_POWER_DOWN         0x00800000
 #define K2_FCR1_GMAC_RESET_N            0x01000000
@@ -246,3 +251,11 @@
 #define K2_FCR1_UATA_RESET_N            0x40000000
 #define K2_FCR1_UATA_CHOOSE_CLK66       0x80000000
 
+/* Shasta definitions */
+#define SH_FCR1_I2S2_CELL_ENABLE        0x00000010
+#define SH_FCR1_I2S2_CLK_ENABLE_BIT     0x00000040
+#define SH_FCR1_I2S2_ENABLE             0x00000080
+#define SH_FCR3_I2S2_CLK18_ENABLE       0x00008000
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_POWERPC_KEYLARGO_H */
diff --git a/include/asm-powerpc/kprobes.h b/include/asm-powerpc/kprobes.h
index 6cd0a3bfa280..f466bc804f41 100644
--- a/include/asm-powerpc/kprobes.h
+++ b/include/asm-powerpc/kprobes.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_KPROBES_H
 #define _ASM_POWERPC_KPROBES_H
+#ifdef __KERNEL__
 /*
  *  Kernel Probes (KProbes)
  *
@@ -29,7 +30,10 @@
 #include <linux/ptrace.h>
 #include <linux/percpu.h>
 
+#define  __ARCH_WANT_KPROBES_INSN_SLOT
+
 struct pt_regs;
+struct kprobe;
 
 typedef unsigned int kprobe_opcode_t;
 #define BREAKPOINT_INSTRUCTION  0x7fe00008      /* trap */
@@ -47,6 +51,7 @@ typedef unsigned int kprobe_opcode_t;
 
 #define ARCH_SUPPORTS_KRETPROBES
 void kretprobe_trampoline(void);
+extern void arch_remove_kprobe(struct kprobe *p);
 
 /* Architecture specific copy of original instruction */
 struct arch_specific_insn {
@@ -68,14 +73,7 @@ struct kprobe_ctlblk {
         struct prev_kprobe prev_kprobe;
 };
 
-#ifdef CONFIG_KPROBES
 extern int kprobe_exceptions_notify(struct notifier_block *self,
-                                    unsigned long val, void *data);
-#else                           /* !CONFIG_KPROBES */
-static inline int kprobe_exceptions_notify(struct notifier_block *self,
-                                           unsigned long val, void *data)
-{
-        return 0;
-}
-#endif
+                                        unsigned long val, void *data);
+#endif /* __KERNEL__ */
 #endif  /* _ASM_POWERPC_KPROBES_H */
diff --git a/include/asm-powerpc/lmb.h b/include/asm-powerpc/lmb.h
index ea0afe343545..d3546c4c9f46 100644
--- a/include/asm-powerpc/lmb.h
+++ b/include/asm-powerpc/lmb.h
@@ -1,5 +1,6 @@
 #ifndef _PPC64_LMB_H
 #define _PPC64_LMB_H
+#ifdef __KERNEL__
 
 /*
  * Definitions for talking to the Open Firmware PROM on
@@ -78,4 +79,5 @@ lmb_end_pfn(struct lmb_region *type, unsigned long region_nr)
                lmb_size_pages(type, region_nr);
 }
 
+#endif /* __KERNEL__ */
 #endif /* _PPC64_LMB_H */
diff --git a/include/asm-powerpc/lppaca.h b/include/asm-powerpc/lppaca.h
index c1bedab1515b..4dc514aabfe7 100644
--- a/include/asm-powerpc/lppaca.h
+++ b/include/asm-powerpc/lppaca.h
@@ -18,6 +18,7 @@
  */
 #ifndef _ASM_POWERPC_LPPACA_H
 #define _ASM_POWERPC_LPPACA_H
+#ifdef __KERNEL__
 
 //=============================================================================
 //
@@ -28,6 +29,8 @@
 //----------------------------------------------------------------------------
 #include <asm/types.h>
 
+/* The Hypervisor barfs if the lppaca crosses a page boundary.  A 1k
+ * alignment is sufficient to prevent this */
 struct lppaca {
 //=============================================================================
 // CACHE_LINE_1 0x0000 - 0x007F Contains read-only data
@@ -126,6 +129,9 @@ struct lppaca {
 // CACHE_LINE_4-5 0x0100 - 0x01FF Contains PMC interrupt data
 //=============================================================================
         u8      pmc_save_area[256];     // PMC interrupt Area           x00-xFF
-};
+} __attribute__((__aligned__(0x400)));
 
+extern struct lppaca lppaca[];
+
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_LPPACA_H */
diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h
index c011abb8b600..5348b820788c 100644
--- a/include/asm-powerpc/machdep.h
+++ b/include/asm-powerpc/machdep.h
@@ -27,6 +27,9 @@ struct device_node;
 struct iommu_table;
 struct rtc_time;
 struct file;
+#ifdef CONFIG_KEXEC
+struct kimage;
+#endif
 
 #ifdef CONFIG_SMP
 struct smp_ops_t {
@@ -131,7 +134,7 @@ struct machdep_calls {
         void            (*nvram_sync)(void);
 
         /* Exception handlers */
-        void            (*system_reset_exception)(struct pt_regs *regs);
+        int             (*system_reset_exception)(struct pt_regs *regs);
         int             (*machine_check_exception)(struct pt_regs *regs);
 
         /* Motherboard/chipset features. This is a kind of general purpose
@@ -207,19 +210,19 @@ struct machdep_calls {
 
         /* this is for modules, since _machine can be a define -- Cort */
         int ppc_machine;
+#endif /* CONFIG_PPC32 */
 
-#ifdef CONFIG_KEXEC
         /* Called to shutdown machine specific hardware not already controlled
          * by other drivers.
-         * XXX Should we move this one out of kexec scope?
          */
         void (*machine_shutdown)(void);
 
+#ifdef CONFIG_KEXEC
         /* Called to do the minimal shutdown needed to run a kexec'd kernel
          * to run successfully.
          * XXX Should we move this one out of kexec scope?
          */
-        void (*machine_crash_shutdown)(void);
+        void (*machine_crash_shutdown)(struct pt_regs *regs);
 
         /* Called to do what every setup is needed on image and the
          * reboot code buffer. Returns 0 on success.
@@ -237,7 +240,6 @@ struct machdep_calls {
          */
         void (*machine_kexec)(struct kimage *image);
 #endif /* CONFIG_KEXEC */
-#endif /* CONFIG_PPC32 */
 };
 
 extern void default_idle(void);
diff --git a/include/asm-powerpc/macio.h b/include/asm-powerpc/macio.h
index b553dd4b139e..3a6cb1a513b7 100644
--- a/include/asm-powerpc/macio.h
+++ b/include/asm-powerpc/macio.h
@@ -1,5 +1,6 @@
 #ifndef __MACIO_ASIC_H__
 #define __MACIO_ASIC_H__
+#ifdef __KERNEL__
 
 #include <asm/of_device.h>
 
@@ -137,4 +138,5 @@ struct macio_driver
 extern int macio_register_driver(struct macio_driver *);
 extern void macio_unregister_driver(struct macio_driver *);
 
+#endif /* __KERNEL__ */
 #endif /* __MACIO_ASIC_H__ */
diff --git a/include/asm-powerpc/mmu.h b/include/asm-powerpc/mmu.h
index 29b0bb0086d3..d096d9e76ad7 100644
--- a/include/asm-powerpc/mmu.h
+++ b/include/asm-powerpc/mmu.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_MMU_H_
 #define _ASM_POWERPC_MMU_H_
+#ifdef __KERNEL__
 
 #ifndef CONFIG_PPC64
 #include <asm-ppc/mmu.h>
@@ -33,7 +34,8 @@
 
 /* Location of cpu0's segment table */
 #define STAB0_PAGE      0x6
-#define STAB0_PHYS_ADDR (STAB0_PAGE<<12)
+#define STAB0_OFFSET    (STAB0_PAGE << 12)
+#define STAB0_PHYS_ADDR (STAB0_OFFSET + PHYSICAL_START)
 
 #ifndef __ASSEMBLY__
 extern char initial_stab[];
@@ -394,7 +396,12 @@ static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
 #define VSID_SCRAMBLE(pvsid)    (((pvsid) * VSID_MULTIPLIER) % VSID_MODULUS)
 #define KERNEL_VSID(ea)         VSID_SCRAMBLE(GET_ESID(ea))
 
+/* Physical address used by some IO functions */
+typedef unsigned long phys_addr_t;
+
+
 #endif /* __ASSEMBLY */
 
 #endif /* CONFIG_PPC64 */
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_MMU_H_ */
diff --git a/include/asm-powerpc/mmu_context.h b/include/asm-powerpc/mmu_context.h
index ea6798c7d5fc..1b8a25fd48f3 100644
--- a/include/asm-powerpc/mmu_context.h
+++ b/include/asm-powerpc/mmu_context.h
@@ -1,5 +1,6 @@
 #ifndef __ASM_POWERPC_MMU_CONTEXT_H
 #define __ASM_POWERPC_MMU_CONTEXT_H
+#ifdef __KERNEL__
 
 #ifndef CONFIG_PPC64
 #include <asm-ppc/mmu_context.h>
@@ -86,4 +87,5 @@ static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
 }
 
 #endif /* CONFIG_PPC64 */
+#endif /* __KERNEL__ */
 #endif /* __ASM_POWERPC_MMU_CONTEXT_H */
diff --git a/include/asm-powerpc/mmzone.h b/include/asm-powerpc/mmzone.h
index 54958d6cae04..88d70bae7769 100644
--- a/include/asm-powerpc/mmzone.h
+++ b/include/asm-powerpc/mmzone.h
@@ -6,6 +6,7 @@
  */
 #ifndef _ASM_MMZONE_H_
 #define _ASM_MMZONE_H_
+#ifdef __KERNEL__
 
 #include <linux/config.h>
 
@@ -47,4 +48,5 @@ extern unsigned long max_pfn;
 extern int __init early_pfn_to_nid(unsigned long pfn);
 #endif
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_MMZONE_H_ */
diff --git a/include/asm-powerpc/module.h b/include/asm-powerpc/module.h
index 7ecd05e03051..584fabfb4f08 100644
--- a/include/asm-powerpc/module.h
+++ b/include/asm-powerpc/module.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_MODULE_H
 #define _ASM_POWERPC_MODULE_H
+#ifdef __KERNEL__
 
 /*
  * This program is free software; you can redistribute it and/or
@@ -74,4 +75,5 @@ struct exception_table_entry;
 void sort_ex_table(struct exception_table_entry *start,
                    struct exception_table_entry *finish);
 
+#endif /* __KERNEL__ */
 #endif  /* _ASM_POWERPC_MODULE_H */
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
index 7083d1f74260..6b9e78142f4f 100644
--- a/include/asm-powerpc/mpic.h
+++ b/include/asm-powerpc/mpic.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_MPIC_H
 #define _ASM_POWERPC_MPIC_H
+#ifdef __KERNEL__
 
 #include <linux/irq.h>
 
@@ -117,7 +118,9 @@ typedef int (*mpic_cascade_t)(struct pt_regs *regs, void *data);
 struct mpic_irq_fixup
 {
         u8 __iomem      *base;
-        unsigned int   irq;
+        u8 __iomem      *applebase;
+        u32             data;
+        unsigned int    index;
 };
 #endif /* CONFIG_MPIC_BROKEN_U3 */
 
@@ -284,4 +287,5 @@ extern int mpic_get_irq(struct pt_regs *regs);
 /* global mpic for pSeries */
 extern struct mpic *pSeries_mpic;
 
+#endif /* __KERNEL__ */
 #endif  /* _ASM_POWERPC_MPIC_H */
diff --git a/include/asm-powerpc/mutex.h b/include/asm-powerpc/mutex.h
new file mode 100644
index 000000000000..458c1f7fbc18
--- /dev/null
+++ b/include/asm-powerpc/mutex.h
@@ -0,0 +1,9 @@
+/*
+ * Pull in the generic implementation for the mutex fastpath.
+ *
+ * TODO: implement optimized primitives instead, or leave the generic
+ * implementation in place, or pick the atomic_xchg() based generic
+ * implementation. (see asm-generic/mutex-xchg.h for details)
+ */
+
+#include <asm-generic/mutex-dec.h>
diff --git a/include/asm-powerpc/numnodes.h b/include/asm-powerpc/numnodes.h
index 795533aca095..e138edae09dd 100644
--- a/include/asm-powerpc/numnodes.h
+++ b/include/asm-powerpc/numnodes.h
@@ -1,7 +1,9 @@
 #ifndef _ASM_POWERPC_MAX_NUMNODES_H
 #define _ASM_POWERPC_MAX_NUMNODES_H
+#ifdef __KERNEL__
 
 /* Max 16 Nodes */
 #define NODES_SHIFT     4
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_MAX_NUMNODES_H */
diff --git a/include/asm-powerpc/nvram.h b/include/asm-powerpc/nvram.h
index 24bd8c2388ea..f3563e11e260 100644
--- a/include/asm-powerpc/nvram.h
+++ b/include/asm-powerpc/nvram.h
@@ -55,6 +55,7 @@ struct nvram_header {
         char name[12];
 };
 
+#ifdef __KERNEL__
 struct nvram_partition {
         struct list_head partition;
         struct nvram_header header;
@@ -69,6 +70,7 @@ extern struct nvram_partition *nvram_find_partition(int sig, const char *name);
 
 extern int pSeries_nvram_init(void);
 extern int mmio_nvram_init(void);
+#endif /* __KERNEL__ */
 
 /* PowerMac specific nvram stuffs */
 
@@ -78,6 +80,7 @@ enum {
         pmac_nvram_NR           /* MacOS Name Registry partition */
 };
 
+#ifdef __KERNEL__
 /* Return partition offset in nvram */
 extern int      pmac_get_partition(int partition);
 
@@ -91,6 +94,7 @@ extern void	nvram_sync(void);
 /* Normal access to NVRAM */
 extern unsigned char nvram_read_byte(int i);
 extern void nvram_write_byte(unsigned char c, int i);
+#endif
 
 /* Some offsets in XPRAM */
 #define PMAC_XPRAM_MACHINE_LOC  0xe4
diff --git a/include/asm-powerpc/of_device.h b/include/asm-powerpc/of_device.h
index ddb16aae0bd6..6249a7c39639 100644
--- a/include/asm-powerpc/of_device.h
+++ b/include/asm-powerpc/of_device.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_OF_DEVICE_H
 #define _ASM_POWERPC_OF_DEVICE_H
+#ifdef __KERNEL__
 
 #include <linux/device.h>
 #include <linux/mod_devicetable.h>
@@ -61,4 +62,5 @@ extern struct of_device *of_platform_device_create(struct device_node *np,
                                                    struct device *parent);
 extern void of_release_dev(struct device *dev);
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_OF_DEVICE_H */
diff --git a/include/asm-powerpc/ohare.h b/include/asm-powerpc/ohare.h
index 023b59772231..0d030f9dea24 100644
--- a/include/asm-powerpc/ohare.h
+++ b/include/asm-powerpc/ohare.h
@@ -1,3 +1,6 @@
+#ifndef _ASM_POWERPC_OHARE_H
+#define _ASM_POWERPC_OHARE_H
+#ifdef __KERNEL__
 /*
  * ohare.h: definitions for using the "O'Hare" I/O controller chip.
  *
@@ -46,3 +49,6 @@
  * Contributed by Harry Eaton.
  */
 #define STARMAX_FEATURES        0xbeff7a
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_POWERPC_OHARE_H */
diff --git a/include/asm-powerpc/oprofile_impl.h b/include/asm-powerpc/oprofile_impl.h
index 8013cd273ced..338e6a7cff4a 100644
--- a/include/asm-powerpc/oprofile_impl.h
+++ b/include/asm-powerpc/oprofile_impl.h
@@ -11,6 +11,7 @@
 
 #ifndef _ASM_POWERPC_OPROFILE_IMPL_H
 #define _ASM_POWERPC_OPROFILE_IMPL_H
+#ifdef __KERNEL__
 
 #define OP_MAX_COUNTER 8
 
@@ -22,24 +23,22 @@ struct op_counter_config {
         unsigned long enabled;
         unsigned long event;
         unsigned long count;
+        /* Classic doesn't support per-counter user/kernel selection */
         unsigned long kernel;
-#ifdef __powerpc64__
-        /* We dont support per counter user/kernel selection */
-#endif
         unsigned long user;
         unsigned long unit_mask;
 };
 
 /* System-wide configuration as set via oprofilefs.  */
 struct op_system_config {
-#ifdef __powerpc64__
+#ifdef CONFIG_PPC64
         unsigned long mmcr0;
         unsigned long mmcr1;
         unsigned long mmcra;
 #endif
         unsigned long enable_kernel;
         unsigned long enable_user;
-#ifdef __powerpc64__
+#ifdef CONFIG_PPC64
         unsigned long backtrace_spinlocks;
 #endif
 };
@@ -49,9 +48,7 @@ struct op_powerpc_model {
         void (*reg_setup) (struct op_counter_config *,
                            struct op_system_config *,
                            int num_counters);
-#ifdef __powerpc64__
         void (*cpu_setup) (void *);
-#endif
         void (*start) (struct op_counter_config *);
         void (*stop) (void);
         void (*handle_interrupt) (struct pt_regs *,
@@ -59,10 +56,19 @@ struct op_powerpc_model {
         int num_counters;
 };
 
-#ifdef __powerpc64__
+#ifdef CONFIG_FSL_BOOKE
+extern struct op_powerpc_model op_model_fsl_booke;
+#else /* Otherwise, it's classic */
+
+#ifdef CONFIG_PPC64
 extern struct op_powerpc_model op_model_rs64;
 extern struct op_powerpc_model op_model_power4;
 
+#else /* Otherwise, CONFIG_PPC32 */
+extern struct op_powerpc_model op_model_7450;
+#endif
+
+/* All the classic PPC parts use these */
 static inline unsigned int ctr_read(unsigned int i)
 {
         switch(i) {
@@ -78,10 +84,14 @@ static inline unsigned int ctr_read(unsigned int i)
                 return mfspr(SPRN_PMC5);
         case 5:
                 return mfspr(SPRN_PMC6);
+
+/* No PPC32 chip has more than 6 so far */
+#ifdef CONFIG_PPC64
         case 6:
                 return mfspr(SPRN_PMC7);
         case 7:
                 return mfspr(SPRN_PMC8);
+#endif
         default:
                 return 0;
         }
@@ -108,16 +118,21 @@ static inline void ctr_write(unsigned int i, unsigned int val)
         case 5:
                 mtspr(SPRN_PMC6, val);
                 break;
+
+/* No PPC32 chip has more than 6, yet */
+#ifdef CONFIG_PPC64
         case 6:
                 mtspr(SPRN_PMC7, val);
                 break;
         case 7:
                 mtspr(SPRN_PMC8, val);
                 break;
+#endif
         default:
                 break;
         }
 }
-#endif /* __powerpc64__ */
+#endif /* !CONFIG_FSL_BOOKE */
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_OPROFILE_IMPL_H */
diff --git a/include/asm-powerpc/pSeries_reconfig.h b/include/asm-powerpc/pSeries_reconfig.h
index c0db1ea7f7d1..ea6cfb8efb84 100644
--- a/include/asm-powerpc/pSeries_reconfig.h
+++ b/include/asm-powerpc/pSeries_reconfig.h
@@ -1,5 +1,6 @@
 #ifndef _PPC64_PSERIES_RECONFIG_H
 #define _PPC64_PSERIES_RECONFIG_H
+#ifdef __KERNEL__
 
 #include <linux/notifier.h>
 
@@ -22,4 +23,5 @@ static inline int pSeries_reconfig_notifier_register(struct notifier_block *nb)
 static inline void pSeries_reconfig_notifier_unregister(struct notifier_block *nb) { }
 #endif /* CONFIG_PPC_PSERIES */
 
+#endif /* __KERNEL__ */
 #endif /* _PPC64_PSERIES_RECONFIG_H */
diff --git a/include/asm-powerpc/paca.h b/include/asm-powerpc/paca.h
index 92c765c35bd0..c9add8f1ad94 100644
--- a/include/asm-powerpc/paca.h
+++ b/include/asm-powerpc/paca.h
@@ -14,15 +14,16 @@
  */
 #ifndef _ASM_POWERPC_PACA_H
 #define _ASM_POWERPC_PACA_H
+#ifdef __KERNEL__
 
 #include        <linux/config.h>
 #include        <asm/types.h>
 #include        <asm/lppaca.h>
-#include        <asm/iseries/it_lp_reg_save.h>
 #include        <asm/mmu.h>
 
 register struct paca_struct *local_paca asm("r13");
 #define get_paca()      local_paca
+#define get_lppaca()    (get_paca()->lppaca_ptr)
 
 struct task_struct;
 
@@ -31,9 +32,9 @@ struct task_struct;
  *
  * This structure is not directly accessed by firmware or the service
  * processor except for the first two pointers that point to the
- * lppaca area and the ItLpRegSave area for this CPU.  Both the
- * lppaca and ItLpRegSave objects are currently contained within the
- * PACA but they do not need to be.
+ * lppaca area and the ItLpRegSave area for this CPU.  The lppaca
+ * object is currently contained within the PACA but it doesn't need
+ * to be.
  */
 struct paca_struct {
         /*
@@ -48,7 +49,9 @@ struct paca_struct {
          * accessed by the firmware
          */
         struct lppaca *lppaca_ptr;      /* Pointer to LpPaca for PLIC */
-        struct ItLpRegSave *reg_save_ptr; /* Pointer to LpRegSave for PLIC */
+#ifdef CONFIG_PPC_ISERIES
+        void *reg_save_ptr; /* Pointer to LpRegSave for PLIC */
+#endif /* CONFIG_PPC_ISERIES */
 
         /*
          * MAGIC: the spinlock functions in arch/ppc64/lib/locks.c
@@ -59,11 +62,11 @@ struct paca_struct {
         u16 lock_token;                 /* Constant 0x8000, used in locks */
         u16 paca_index;                 /* Logical processor number */
 
-        u32 default_decr;               /* Default decrementer value */
         u64 kernel_toc;                 /* Kernel TOC address */
         u64 stab_real;                  /* Absolute address of segment table */
         u64 stab_addr;                  /* Virtual address of segment table */
         void *emergency_sp;             /* pointer to emergency stack */
+        u64 data_offset;                /* per cpu data offset */
         s16 hw_cpu_id;                  /* Physical processor number */
         u8 cpu_start;                   /* At startup, processor spins until */
                                         /* this becomes non-zero. */
@@ -90,31 +93,12 @@ struct paca_struct {
         struct task_struct *__current;  /* Pointer to current */
         u64 kstack;                     /* Saved Kernel stack addr */
         u64 stab_rr;                    /* stab/slb round-robin counter */
-        u64 next_jiffy_update_tb;       /* TB value for next jiffy update */
         u64 saved_r1;                   /* r1 save for RTAS calls */
         u64 saved_msr;                  /* MSR saved here by enter_rtas */
         u8 proc_enabled;                /* irq soft-enable flag */
-
-        /* not yet used */
-        u64 exdsi[8];           /* used for linear mapping hash table misses */
-
-        /*
-         * iSeries structure which the hypervisor knows about -
-         * this structure should not cross a page boundary.
-         * The vpa_init/register_vpa call is now known to fail if the
-         * lppaca structure crosses a page boundary.
-         * The lppaca is also used on POWER5 pSeries boxes.
-         * The lppaca is 640 bytes long, and cannot readily change
-         * since the hypervisor knows its layout, so a 1kB
-         * alignment will suffice to ensure that it doesn't
-         * cross a page boundary.
-         */
-        struct lppaca lppaca __attribute__((__aligned__(0x400)));
-#ifdef CONFIG_PPC_ISERIES
-        struct ItLpRegSave reg_save;
-#endif
 };
 
 extern struct paca_struct paca[];
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_PACA_H */
diff --git a/include/asm-powerpc/page.h b/include/asm-powerpc/page.h
index 18c1e5ee81a3..0b82df483f7f 100644
--- a/include/asm-powerpc/page.h
+++ b/include/asm-powerpc/page.h
@@ -37,8 +37,30 @@
  */
 #define PAGE_MASK      (~((1 << PAGE_SHIFT) - 1))
 
+/*
+ * KERNELBASE is the virtual address of the start of the kernel, it's often
+ * the same as PAGE_OFFSET, but _might not be_.
+ *
+ * The kdump dump kernel is one example where KERNELBASE != PAGE_OFFSET.
+ *
+ * To get a physical address from a virtual one you subtract PAGE_OFFSET,
+ * _not_ KERNELBASE.
+ *
+ * If you want to know something's offset from the start of the kernel you
+ * should subtract KERNELBASE.
+ *
+ * If you want to test if something's a kernel address, use is_kernel_addr().
+ */
+
+#ifdef CONFIG_CRASH_DUMP
+/* Kdump kernel runs at 32 MB, change at your peril. */
+#define PHYSICAL_START  0x2000000
+#else
+#define PHYSICAL_START  0x0
+#endif
+
 #define PAGE_OFFSET     ASM_CONST(CONFIG_KERNEL_START)
-#define KERNELBASE      PAGE_OFFSET
+#define KERNELBASE      (PAGE_OFFSET + PHYSICAL_START)
 
 #ifdef CONFIG_DISCONTIGMEM
 #define page_to_pfn(page)       discontigmem_page_to_pfn(page)
@@ -56,7 +78,7 @@
 #define pfn_to_kaddr(pfn)       __va((pfn) << PAGE_SHIFT)
 #define virt_addr_valid(kaddr)  pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
 
-#define __va(x) ((void *)((unsigned long)(x) + KERNELBASE))
+#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET))
 #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET)
 
 /*
@@ -86,6 +108,12 @@
 /* to align the pointer to the (next) page boundary */
 #define PAGE_ALIGN(addr)        _ALIGN(addr, PAGE_SIZE)
 
+/*
+ * Don't compare things with KERNELBASE or PAGE_OFFSET to test for
+ * "kernelness", use is_kernel_addr() - it should do what you want.
+ */
+#define is_kernel_addr(x)       ((x) >= PAGE_OFFSET)
+
 #ifndef __ASSEMBLY__
 
 #undef STRICT_MM_TYPECHECKS
@@ -150,7 +178,7 @@ typedef unsigned long pmd_t;
 #define pmd_val(x)      (x)
 #define __pmd(x)        (x)
 
-#ifndef CONFIG_PPC_64K_PAGES
+#if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_64K_PAGES)
 typedef unsigned long pud_t;
 #define pud_val(x)      (x)
 #define __pud(x)        (x)
diff --git a/include/asm-powerpc/page_32.h b/include/asm-powerpc/page_32.h
index 7259cfd85da9..2677bad70f40 100644
--- a/include/asm-powerpc/page_32.h
+++ b/include/asm-powerpc/page_32.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_PAGE_32_H
 #define _ASM_POWERPC_PAGE_32_H
+#ifdef __KERNEL__
 
 #define VM_DATA_DEFAULT_FLAGS   VM_DATA_DEFAULT_FLAGS32
 
@@ -37,4 +38,5 @@ extern __inline__ int get_order(unsigned long size)
 
 #endif /* __ASSEMBLY__ */
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_PAGE_32_H */
diff --git a/include/asm-powerpc/page_64.h b/include/asm-powerpc/page_64.h
index 6642c0125001..3fb061bab9ec 100644
--- a/include/asm-powerpc/page_64.h
+++ b/include/asm-powerpc/page_64.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_PAGE_64_H
 #define _ASM_POWERPC_PAGE_64_H
+#ifdef __KERNEL__
 
 /*
  * Copyright (C) 2001 PPC64 Team, IBM Corp
@@ -25,16 +26,6 @@
  */
 #define PAGE_FACTOR             (PAGE_SHIFT - HW_PAGE_SHIFT)
 
-#define REGION_SIZE   4UL
-#define REGION_SHIFT  60UL
-#define REGION_MASK   (((1UL<<REGION_SIZE)-1UL)<<REGION_SHIFT)
-
-#define VMALLOCBASE             ASM_CONST(0xD000000000000000)
-#define VMALLOC_REGION_ID       (VMALLOCBASE >> REGION_SHIFT)
-#define KERNEL_REGION_ID        (KERNELBASE >> REGION_SHIFT)
-#define USER_REGION_ID          (0UL)
-#define REGION_ID(ea)           (((unsigned long)(ea)) >> REGION_SHIFT)
-
 /* Segment size */
 #define SID_SHIFT               28
 #define SID_MASK                0xfffffffffUL
@@ -180,4 +171,5 @@ extern unsigned int HPAGE_SHIFT;
 
 #include <asm-generic/page.h>
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_PAGE_64_H */
diff --git a/include/asm-powerpc/param.h b/include/asm-powerpc/param.h
index bdc724f70884..094f63d4d5ca 100644
--- a/include/asm-powerpc/param.h
+++ b/include/asm-powerpc/param.h
@@ -1,8 +1,6 @@
 #ifndef _ASM_POWERPC_PARAM_H
 #define _ASM_POWERPC_PARAM_H
 
-#include <linux/config.h>
-
 #ifdef __KERNEL__
 #define HZ              CONFIG_HZ       /* internal kernel timer frequency */
 #define USER_HZ         100             /* for user interfaces in "ticks" */
diff --git a/include/asm-powerpc/parport.h b/include/asm-powerpc/parport.h
index d86b410a6f8b..3fca21ddf546 100644
--- a/include/asm-powerpc/parport.h
+++ b/include/asm-powerpc/parport.h
@@ -8,11 +8,37 @@
 
 #ifndef _ASM_POWERPC_PARPORT_H
 #define _ASM_POWERPC_PARPORT_H
+#ifdef __KERNEL__
+
+#include <asm/prom.h>
+
+extern struct parport *parport_pc_probe_port (unsigned long int base,
+                                              unsigned long int base_hi,
+                                              int irq, int dma,
+                                              struct pci_dev *dev);
 
-static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma);
 static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
 {
-        return parport_pc_find_isa_ports (autoirq, autodma);
+        struct device_node *np;
+        u32 *prop;
+        u32 io1, io2;
+        int propsize;
+        int count = 0;
+        for (np = NULL; (np = of_find_compatible_node(np,
+                                                      "parallel",
+                                                      "pnpPNP,400")) != NULL;) {
+                prop = (u32 *)get_property(np, "reg", &propsize);
+                if (!prop || propsize > 6*sizeof(u32))
+                        continue;
+                io1 = prop[1]; io2 = prop[2];
+                prop = (u32 *)get_property(np, "interrupts", NULL);
+                if (!prop)
+                        continue;
+                if (parport_pc_probe_port(io1, io2, prop[0], autodma, NULL) != NULL)
+                        count++;
+        }
+        return count;
 }
 
+#endif /* __KERNEL__ */
 #endif /* !(_ASM_POWERPC_PARPORT_H) */
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index 223ec7bd81da..38de92d41a14 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_PCI_BRIDGE_H
 #define _ASM_POWERPC_PCI_BRIDGE_H
+#ifdef __KERNEL__
 
 #ifndef CONFIG_PPC64
 #include <asm-ppc/pci-bridge.h>
@@ -60,16 +61,17 @@ struct pci_controller;
 struct iommu_table;
 
 struct pci_dn {
-        int     busno;                  /* for pci devices */
-        int     bussubno;               /* for pci devices */
-        int     devfn;                  /* for pci devices */
+        int     busno;                  /* pci bus number */
+        int     bussubno;               /* pci subordinate bus number */
+        int     devfn;                  /* pci device and function number */
+        int     class_code;             /* pci device class */
 
 #ifdef CONFIG_PPC_PSERIES
         int     eeh_mode;               /* See eeh.h for possible EEH_MODEs */
         int     eeh_config_addr;
+        int     eeh_pe_config_addr; /* new-style partition endpoint address */
         int     eeh_check_count;        /* # times driver ignored error */
         int     eeh_freeze_count;       /* # times this device froze up. */
-        int     eeh_is_bridge;          /* device is pci-to-pci bridge */
 #endif
         int     pci_ext_config_space;   /* for pci devices */
         struct  pci_controller *phb;    /* for pci devices */
@@ -125,12 +127,20 @@ static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
                 return bus->sysdata; /* Must be root bus (PHB) */
 }
 
+/** Find the bus corresponding to the indicated device node */
+struct pci_bus * pcibios_find_pci_bus(struct device_node *dn);
+
 extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
                                          struct device_node *dev, int primary);
 
-extern int pcibios_remove_root_bus(struct pci_controller *phb);
+/** Remove all of the PCI devices under this bus */
+void pcibios_remove_pci_devices(struct pci_bus *bus);
 
-extern void phbs_remap_io(void);
+/** Discover new pci devices under this bus, and add them */
+void pcibios_add_pci_devices(struct pci_bus * bus);
+void pcibios_fixup_new_pci_devices(struct pci_bus *bus, int fix_bus);
+
+extern int pcibios_remove_root_bus(struct pci_controller *phb);
 
 static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
 {
@@ -140,14 +150,27 @@ static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
         return PCI_DN(busdn)->phb;
 }
 
+extern struct pci_controller*
+pci_find_hose_for_OF_device(struct device_node* node);
+
 extern struct pci_controller *
 pcibios_alloc_controller(struct device_node *dev);
 extern void pcibios_free_controller(struct pci_controller *phb);
 
+#ifdef CONFIG_PCI
+extern unsigned long pci_address_to_pio(phys_addr_t address);
+#else
+static inline unsigned long pci_address_to_pio(phys_addr_t address)
+{
+        return (unsigned long)-1;
+}
+#endif
+
 /* Return values for ppc_md.pci_probe_mode function */
 #define PCI_PROBE_NONE          -1      /* Don't look at this bus at all */
 #define PCI_PROBE_NORMAL        0       /* Do normal PCI probing */
 #define PCI_PROBE_DEVTREE       1       /* Instantiate from device tree */
 
 #endif /* CONFIG_PPC64 */
+#endif /* __KERNEL__ */
 #endif
diff --git a/include/asm-powerpc/pci.h b/include/asm-powerpc/pci.h
index d5934a076bd0..5d2c9e6c4be2 100644
--- a/include/asm-powerpc/pci.h
+++ b/include/asm-powerpc/pci.h
@@ -216,6 +216,8 @@ extern int remap_bus_range(struct pci_bus *bus);
 extern void pcibios_fixup_device_resources(struct pci_dev *dev,
                         struct pci_bus *bus);
 
+extern void pcibios_claim_one_bus(struct pci_bus *b);
+
 extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
 
 extern struct pci_dev *of_create_pci_dev(struct device_node *node,
diff --git a/include/asm-powerpc/percpu.h b/include/asm-powerpc/percpu.h
index 06a959d67234..e31922c50e53 100644
--- a/include/asm-powerpc/percpu.h
+++ b/include/asm-powerpc/percpu.h
@@ -1 +1,57 @@
+#ifndef _ASM_POWERPC_PERCPU_H_
+#define _ASM_POWERPC_PERCPU_H_
+#ifdef __powerpc64__
+#include <linux/compiler.h>
+
+/*
+ * Same as asm-generic/percpu.h, except that we store the per cpu offset
+ * in the paca. Based on the x86-64 implementation.
+ */
+
+#ifdef CONFIG_SMP
+
+#include <asm/paca.h>
+
+#define __per_cpu_offset(cpu) (paca[cpu].data_offset)
+#define __my_cpu_offset() get_paca()->data_offset
+
+/* Separate out the type, so (int[3], foo) works. */
+#define DEFINE_PER_CPU(type, name) \
+    __attribute__((__section__(".data.percpu"))) __typeof__(type) per_cpu__##name
+
+/* var is in discarded region: offset to particular copy we want */
+#define per_cpu(var, cpu) (*RELOC_HIDE(&per_cpu__##var, __per_cpu_offset(cpu)))
+#define __get_cpu_var(var) (*RELOC_HIDE(&per_cpu__##var, __my_cpu_offset()))
+
+/* A macro to avoid #include hell... */
+#define percpu_modcopy(pcpudst, src, size)                      \
+do {                                                            \
+        unsigned int __i;                                       \
+        for (__i = 0; __i < NR_CPUS; __i++)                     \
+                if (cpu_possible(__i))                          \
+                        memcpy((pcpudst)+__per_cpu_offset(__i), \
+                               (src), (size));                  \
+} while (0)
+
+extern void setup_per_cpu_areas(void);
+
+#else /* ! SMP */
+
+#define DEFINE_PER_CPU(type, name) \
+    __typeof__(type) per_cpu__##name
+
+#define per_cpu(var, cpu)                       (*((void)(cpu), &per_cpu__##var))
+#define __get_cpu_var(var)                      per_cpu__##var
+
+#endif  /* SMP */
+
+#define DECLARE_PER_CPU(type, name) extern __typeof__(type) per_cpu__##name
+
+#define EXPORT_PER_CPU_SYMBOL(var) EXPORT_SYMBOL(per_cpu__##var)
+#define EXPORT_PER_CPU_SYMBOL_GPL(var) EXPORT_SYMBOL_GPL(per_cpu__##var)
+
+#else
 #include <asm-generic/percpu.h>
+#endif
+
+#endif /* _ASM_POWERPC_PERCPU_H_ */
diff --git a/include/asm-powerpc/pgalloc.h b/include/asm-powerpc/pgalloc.h
index bfc2113b3630..9f5b052784a5 100644
--- a/include/asm-powerpc/pgalloc.h
+++ b/include/asm-powerpc/pgalloc.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_PGALLOC_H
 #define _ASM_POWERPC_PGALLOC_H
+#ifdef __KERNEL__
 
 #ifndef CONFIG_PPC64
 #include <asm-ppc/pgalloc.h>
@@ -153,4 +154,5 @@ extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf);
 #define check_pgt_cache()       do { } while (0)
 
 #endif /* CONFIG_PPC64 */
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_PGALLOC_H */
diff --git a/include/asm-powerpc/pgtable-64k.h b/include/asm-powerpc/pgtable-64k.h
index 154f1840ece4..653915014dcd 100644
--- a/include/asm-powerpc/pgtable-64k.h
+++ b/include/asm-powerpc/pgtable-64k.h
@@ -1,3 +1,7 @@
+#ifndef _ASM_POWERPC_PGTABLE_64K_H
+#define _ASM_POWERPC_PGTABLE_64K_H
+#ifdef __KERNEL__
+
 #include <asm-generic/pgtable-nopud.h>
 
 
@@ -88,3 +92,5 @@
 
 
 #endif /*  __ASSEMBLY__ */
+#endif /* __KERNEL__ */
+#endif /* _ASM_POWERPC_PGTABLE_64K_H */
diff --git a/include/asm-powerpc/pgtable.h b/include/asm-powerpc/pgtable.h
index 0303f57366c1..e38931379a72 100644
--- a/include/asm-powerpc/pgtable.h
+++ b/include/asm-powerpc/pgtable.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_PGTABLE_H
 #define _ASM_POWERPC_PGTABLE_H
+#ifdef __KERNEL__
 
 #ifndef CONFIG_PPC64
 #include <asm-ppc/pgtable.h>
@@ -58,6 +59,17 @@ struct mm_struct;
 #define IMALLOC_END     (VMALLOC_START + PGTABLE_RANGE)
 
 /*
+ * Region IDs
+ */
+#define REGION_SHIFT            60UL
+#define REGION_MASK             (0xfUL << REGION_SHIFT)
+#define REGION_ID(ea)           (((unsigned long)(ea)) >> REGION_SHIFT)
+
+#define VMALLOC_REGION_ID       (REGION_ID(VMALLOC_START))
+#define KERNEL_REGION_ID        (REGION_ID(PAGE_OFFSET))
+#define USER_REGION_ID          (0UL)
+
+/*
  * Common bits in a linux-style PTE.  These match the bits in the
  * (hardware-defined) PowerPC PTE as closely as possible. Additional
  * bits may be defined in pgtable-*.h
@@ -521,4 +533,5 @@ void pgtable_cache_init(void);
 #endif /* __ASSEMBLY__ */
 
 #endif /* CONFIG_PPC64 */
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_PGTABLE_H */
diff --git a/include/asm-powerpc/pmac_feature.h b/include/asm-powerpc/pmac_feature.h
index e9683bcff19b..3221628130c4 100644
--- a/include/asm-powerpc/pmac_feature.h
+++ b/include/asm-powerpc/pmac_feature.h
@@ -121,6 +121,7 @@
 #define PMAC_TYPE_IMAC_G5               0x152   /* iMac G5 */
 #define PMAC_TYPE_XSERVE_G5             0x153   /* Xserve G5 */
 #define PMAC_TYPE_UNKNOWN_K2            0x19f   /* Any other K2 based */
+#define PMAC_TYPE_UNKNOWN_SHASTA        0x19e   /* Any other Shasta based */
 
 /*
  * Motherboard flags
@@ -317,10 +318,6 @@ extern void pmac_register_agp_pm(struct pci_dev *bridge,
 extern void pmac_suspend_agp_for_card(struct pci_dev *dev);
 extern void pmac_resume_agp_for_card(struct pci_dev *dev);
 
-/* Used by the via-pmu driver for suspend/resume
- */
-extern void pmac_tweak_clock_spreading(int enable);
-
 /*
  * The part below is for use by macio_asic.c only, do not rely
  * on the data structures or constants below in a normal driver
@@ -341,6 +338,7 @@ enum {
         macio_pangea,
         macio_intrepid,
         macio_keylargo2,
+        macio_shasta,
 };
 
 struct macio_chip
@@ -376,5 +374,24 @@ extern struct macio_chip* macio_find(struct device_node* child, int type);
 #define MACIO_IN8(r)            (in_8(MACIO_FCR8(macio,r)))
 #define MACIO_OUT8(r,v)         (out_8(MACIO_FCR8(macio,r), (v)))
 
+/*
+ * Those are exported by pmac feature for internal use by arch code
+ * only like the platform function callbacks, do not use directly in drivers
+ */
+extern spinlock_t feature_lock;
+extern struct device_node *uninorth_node;
+extern u32 __iomem *uninorth_base;
+
+/*
+ * Uninorth reg. access. Note that Uni-N regs are big endian
+ */
+
+#define UN_REG(r)       (uninorth_base + ((r) >> 2))
+#define UN_IN(r)        (in_be32(UN_REG(r)))
+#define UN_OUT(r,v)     (out_be32(UN_REG(r), (v)))
+#define UN_BIS(r,v)     (UN_OUT((r), UN_IN(r) | (v)))
+#define UN_BIC(r,v)     (UN_OUT((r), UN_IN(r) & ~(v)))
+
+
 #endif /* __PPC_ASM_PMAC_FEATURE_H */
 #endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/pmac_low_i2c.h b/include/asm-powerpc/pmac_low_i2c.h
index 809a5963d5e7..131011bd7e76 100644
--- a/include/asm-powerpc/pmac_low_i2c.h
+++ b/include/asm-powerpc/pmac_low_i2c.h
@@ -11,33 +11,97 @@
  */
 #ifndef __PMAC_LOW_I2C_H__
 #define __PMAC_LOW_I2C_H__
+#ifdef __KERNEL__
 
 /* i2c mode (based on the platform functions format) */
 enum {
-        pmac_low_i2c_mode_dumb          = 1,
-        pmac_low_i2c_mode_std           = 2,
-        pmac_low_i2c_mode_stdsub        = 3,
-        pmac_low_i2c_mode_combined      = 4,
+        pmac_i2c_mode_dumb      = 1,
+        pmac_i2c_mode_std       = 2,
+        pmac_i2c_mode_stdsub    = 3,
+        pmac_i2c_mode_combined  = 4,
 };
 
 /* RW bit in address */
 enum {
-        pmac_low_i2c_read               = 0x01,
-        pmac_low_i2c_write              = 0x00
+        pmac_i2c_read           = 0x01,
+        pmac_i2c_write          = 0x00
 };
 
+/* i2c bus type */
+enum {
+        pmac_i2c_bus_keywest    = 0,
+        pmac_i2c_bus_pmu        = 1,
+        pmac_i2c_bus_smu        = 2,
+};
+
+/* i2c bus features */
+enum {
+        /* can_largesub : supports >1 byte subaddresses (SMU only) */
+        pmac_i2c_can_largesub   = 0x00000001u,
+
+        /* multibus : device node holds multiple busses, bus number is
+         * encoded in bits 0xff00 of "reg" of a given device
+         */
+        pmac_i2c_multibus       = 0x00000002u,
+};
+
+/* i2c busses in the system */
+struct pmac_i2c_bus;
+struct i2c_adapter;
+
 /* Init, called early during boot */
-extern void pmac_init_low_i2c(void);
+extern int pmac_i2c_init(void);
+
+/* Lookup an i2c bus for a device-node. The node can be either the bus
+ * node itself or a device below it. In the case of a multibus, the bus
+ * node itself is the controller node, else, it's a child of the controller
+ * node
+ */
+extern struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node);
+
+/* Get the address for an i2c device. This strips the bus number if
+ * necessary. The 7 bits address is returned 1 bit right shifted so that the
+ * direction can be directly ored in
+ */
+extern u8 pmac_i2c_get_dev_addr(struct device_node *device);
+
+/* Get infos about a bus */
+extern struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus);
+extern struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus);
+extern int pmac_i2c_get_type(struct pmac_i2c_bus *bus);
+extern int pmac_i2c_get_flags(struct pmac_i2c_bus *bus);
+extern int pmac_i2c_get_channel(struct pmac_i2c_bus *bus);
+
+/* i2c layer adapter attach/detach */
+extern void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus,
+                                    struct i2c_adapter *adapter);
+extern void pmac_i2c_detach_adapter(struct pmac_i2c_bus *bus,
+                                    struct i2c_adapter *adapter);
+extern struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus);
+extern struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter);
+
+/* March a device or bus with an i2c adapter structure, to be used by drivers
+ * to match device-tree nodes with i2c adapters during adapter discovery
+ * callbacks
+ */
+extern int pmac_i2c_match_adapter(struct device_node *dev,
+                                  struct i2c_adapter *adapter);
+
 
-/* Locking functions exposed to i2c-keywest */
-int pmac_low_i2c_lock(struct device_node *np);
-int pmac_low_i2c_unlock(struct device_node *np);
+/* (legacy) Locking functions exposed to i2c-keywest */
+extern int pmac_low_i2c_lock(struct device_node *np);
+extern int pmac_low_i2c_unlock(struct device_node *np);
 
 /* Access functions for platform code */
-int pmac_low_i2c_open(struct device_node *np, int channel);
-int pmac_low_i2c_close(struct device_node *np);
-int pmac_low_i2c_setmode(struct device_node *np, int mode);
-int pmac_low_i2c_xfer(struct device_node *np, u8 addrdir, u8 subaddr, u8 *data, int len);
+extern int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled);
+extern void pmac_i2c_close(struct pmac_i2c_bus *bus);
+extern int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode);
+extern int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
+                         u32 subaddr, u8 *data,  int len);
 
+/* Suspend/resume code called by via-pmu directly for now */
+extern void pmac_pfunc_i2c_suspend(void);
+extern void pmac_pfunc_i2c_resume(void);
 
+#endif /* __KERNEL__ */
 #endif /* __PMAC_LOW_I2C_H__ */
diff --git a/include/asm-powerpc/pmac_pfunc.h b/include/asm-powerpc/pmac_pfunc.h
new file mode 100644
index 000000000000..d9728c80f86d
--- /dev/null
+++ b/include/asm-powerpc/pmac_pfunc.h
@@ -0,0 +1,253 @@
+#ifndef __PMAC_PFUNC_H__
+#define __PMAC_PFUNC_H__
+
+#include <linux/types.h>
+#include <linux/list.h>
+
+/* Flags in command lists */
+#define PMF_FLAGS_ON_INIT               0x80000000u
+#define PMF_FLGAS_ON_TERM               0x40000000u
+#define PMF_FLAGS_ON_SLEEP              0x20000000u
+#define PMF_FLAGS_ON_WAKE               0x10000000u
+#define PMF_FLAGS_ON_DEMAND             0x08000000u
+#define PMF_FLAGS_INT_GEN               0x04000000u
+#define PMF_FLAGS_HIGH_SPEED            0x02000000u
+#define PMF_FLAGS_LOW_SPEED             0x01000000u
+#define PMF_FLAGS_SIDE_EFFECTS          0x00800000u
+
+/*
+ * Arguments to a platform function call.
+ *
+ * NOTE: By convention, pointer arguments point to an u32
+ */
+struct pmf_args {
+        union {
+                u32 v;
+                u32 *p;
+        } u[4];
+        unsigned int count;
+};
+
+/*
+ * A driver capable of interpreting commands provides a handlers
+ * structure filled with whatever handlers are implemented by this
+ * driver. Non implemented handlers are left NULL.
+ *
+ * PMF_STD_ARGS are the same arguments that are passed to the parser
+ * and that gets passed back to the various handlers.
+ *
+ * Interpreting a given function always start with a begin() call which
+ * returns an instance data to be passed around subsequent calls, and
+ * ends with an end() call. This allows the low level driver to implement
+ * locking policy or per-function instance data.
+ *
+ * For interrupt capable functions, irq_enable() is called when a client
+ * registers, and irq_disable() is called when the last client unregisters
+ * Note that irq_enable & irq_disable are called within a semaphore held
+ * by the core, thus you should not try to register yourself to some other
+ * pmf interrupt during those calls.
+ */
+
+#define PMF_STD_ARGS    struct pmf_function *func, void *instdata, \
+                        struct pmf_args *args
+
+struct pmf_function;
+
+struct pmf_handlers {
+        void * (*begin)(struct pmf_function *func, struct pmf_args *args);
+        void (*end)(struct pmf_function *func, void *instdata);
+
+        int (*irq_enable)(struct pmf_function *func);
+        int (*irq_disable)(struct pmf_function *func);
+
+        int (*write_gpio)(PMF_STD_ARGS, u8 value, u8 mask);
+        int (*read_gpio)(PMF_STD_ARGS, u8 mask, int rshift, u8 xor);
+
+        int (*write_reg32)(PMF_STD_ARGS, u32 offset, u32 value, u32 mask);
+        int (*read_reg32)(PMF_STD_ARGS, u32 offset);
+        int (*write_reg16)(PMF_STD_ARGS, u32 offset, u16 value, u16 mask);
+        int (*read_reg16)(PMF_STD_ARGS, u32 offset);
+        int (*write_reg8)(PMF_STD_ARGS, u32 offset, u8 value, u8 mask);
+        int (*read_reg8)(PMF_STD_ARGS, u32 offset);
+
+        int (*delay)(PMF_STD_ARGS, u32 duration);
+
+        int (*wait_reg32)(PMF_STD_ARGS, u32 offset, u32 value, u32 mask);
+        int (*wait_reg16)(PMF_STD_ARGS, u32 offset, u16 value, u16 mask);
+        int (*wait_reg8)(PMF_STD_ARGS, u32 offset, u8 value, u8 mask);
+
+        int (*read_i2c)(PMF_STD_ARGS, u32 len);
+        int (*write_i2c)(PMF_STD_ARGS, u32 len, const u8 *data);
+        int (*rmw_i2c)(PMF_STD_ARGS, u32 masklen, u32 valuelen, u32 totallen,
+                       const u8 *maskdata, const u8 *valuedata);
+
+        int (*read_cfg)(PMF_STD_ARGS, u32 offset, u32 len);
+        int (*write_cfg)(PMF_STD_ARGS, u32 offset, u32 len, const u8 *data);
+        int (*rmw_cfg)(PMF_STD_ARGS, u32 offset, u32 masklen, u32 valuelen,
+                       u32 totallen, const u8 *maskdata, const u8 *valuedata);
+
+        int (*read_i2c_sub)(PMF_STD_ARGS, u8 subaddr, u32 len);
+        int (*write_i2c_sub)(PMF_STD_ARGS, u8 subaddr, u32 len, const u8 *data);
+        int (*set_i2c_mode)(PMF_STD_ARGS, int mode);
+        int (*rmw_i2c_sub)(PMF_STD_ARGS, u8 subaddr, u32 masklen, u32 valuelen,
+                           u32 totallen, const u8 *maskdata,
+                           const u8 *valuedata);
+
+        int (*read_reg32_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift,
+                               u32 xor);
+        int (*read_reg16_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift,
+                               u32 xor);
+        int (*read_reg8_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift,
+                              u32 xor);
+
+        int (*write_reg32_slm)(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask);
+        int (*write_reg16_slm)(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask);
+        int (*write_reg8_slm)(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask);
+
+        int (*mask_and_compare)(PMF_STD_ARGS, u32 len, const u8 *maskdata,
+                                const u8 *valuedata);
+
+        struct module *owner;
+};
+
+
+/*
+ * Drivers who expose platform functions register at init time, this
+ * causes the platform functions for that device node to be parsed in
+ * advance and associated with the device. The data structures are
+ * partially public so a driver can walk the list of platform functions
+ * and eventually inspect the flags
+ */
+struct pmf_device;
+
+struct pmf_function {
+        /* All functions for a given driver are linked */
+        struct list_head        link;
+
+        /* Function node & driver data */
+        struct device_node      *node;
+        void                    *driver_data;
+
+        /* For internal use by core */
+        struct pmf_device       *dev;
+
+        /* The name is the "xxx" in "platform-do-xxx", this is how
+         * platform functions are identified by this code. Some functions
+         * only operate for a given target, in which case the phandle is
+         * here (or 0 if the filter doesn't apply)
+         */
+        const char              *name;
+        u32                     phandle;
+
+        /* The flags for that function. You can have several functions
+         * with the same name and different flag
+         */
+        u32                     flags;
+
+        /* The actual tokenized function blob */
+        const void              *data;
+        unsigned int            length;
+
+        /* Interrupt clients */
+        struct list_head        irq_clients;
+
+        /* Refcounting */
+        struct kref             ref;
+};
+
+/*
+ * For platform functions that are interrupts, one can register
+ * irq_client structures. You canNOT use the same structure twice
+ * as it contains a link member. Also, the callback is called with
+ * a spinlock held, you must not call back into any of the pmf_* functions
+ * from within that callback
+ */
+struct pmf_irq_client {
+        void                    (*handler)(void *data);
+        void                    *data;
+        struct module           *owner;
+        struct list_head        link;
+};
+
+
+/*
+ * Register/Unregister a function-capable driver and its handlers
+ */
+extern int pmf_register_driver(struct device_node *np,
+                              struct pmf_handlers *handlers,
+                              void *driverdata);
+
+extern void pmf_unregister_driver(struct device_node *np);
+
+
+/*
+ * Register/Unregister interrupt clients
+ */
+extern int pmf_register_irq_client(struct device_node *np,
+                                   const char *name,
+                                   struct pmf_irq_client *client);
+
+extern void pmf_unregister_irq_client(struct device_node *np,
+                                      const char *name,
+                                      struct pmf_irq_client *client);
+
+/*
+ * Called by the handlers when an irq happens
+ */
+extern void pmf_do_irq(struct pmf_function *func);
+
+
+/*
+ * Low level call to platform functions.
+ *
+ * The phandle can filter on the target object for functions that have
+ * multiple targets, the flags allow you to restrict the call to a given
+ * combination of flags.
+ *
+ * The args array contains as many arguments as is required by the function,
+ * this is dependent on the function you are calling, unfortunately Apple
+ * mecanism provides no way to encode that so you have to get it right at
+ * the call site. Some functions require no args, in which case, you can
+ * pass NULL.
+ *
+ * You can also pass NULL to the name. This will match any function that has
+ * the appropriate combination of flags & phandle or you can pass 0 to the
+ * phandle to match any
+ */
+extern int pmf_do_functions(struct device_node *np, const char *name,
+                            u32 phandle, u32 flags, struct pmf_args *args);
+
+
+
+/*
+ * High level call to a platform function.
+ *
+ * This one looks for the platform-xxx first so you should call it to the
+ * actual target if any. It will fallback to platform-do-xxx if it can't
+ * find one. It will also exclusively target functions that have
+ * the "OnDemand" flag.
+ */
+
+extern int pmf_call_function(struct device_node *target, const char *name,
+                             struct pmf_args *args);
+
+
+/*
+ * For low latency interrupt usage, you can lookup for on-demand functions
+ * using the functions below
+ */
+
+extern struct pmf_function *pmf_find_function(struct device_node *target,
+                                              const char *name);
+
+extern struct pmf_function * pmf_get_function(struct pmf_function *func);
+extern void pmf_put_function(struct pmf_function *func);
+
+extern int pmf_call_one(struct pmf_function *func, struct pmf_args *args);
+
+
+/* Suspend/resume code called by via-pmu directly for now */
+extern void pmac_pfunc_base_suspend(void);
+extern void pmac_pfunc_base_resume(void);
+
+#endif /* __PMAC_PFUNC_H__ */
diff --git a/include/asm-powerpc/pmc.h b/include/asm-powerpc/pmc.h
index 5f41f3a2b293..07d6a4279319 100644
--- a/include/asm-powerpc/pmc.h
+++ b/include/asm-powerpc/pmc.h
@@ -18,6 +18,7 @@
  */
 #ifndef _POWERPC_PMC_H
 #define _POWERPC_PMC_H
+#ifdef __KERNEL__
 
 #include <asm/ptrace.h>
 
@@ -44,4 +45,5 @@ void dump_pmcs(void);
 extern struct op_powerpc_model op_model_fsl_booke;
 #endif
 
+#endif /* __KERNEL__ */
 #endif /* _POWERPC_PMC_H */
diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h
index 36cdc869e580..f80482c7231f 100644
--- a/include/asm-powerpc/ppc-pci.h
+++ b/include/asm-powerpc/ppc-pci.h
@@ -8,6 +8,7 @@
  */
 #ifndef _ASM_POWERPC_PPC_PCI_H
 #define _ASM_POWERPC_PPC_PCI_H
+#ifdef __KERNEL__
 
 #include <linux/pci.h>
 #include <asm/pci-bridge.h>
@@ -51,6 +52,21 @@ extern unsigned long pci_probe_only;
 
 /* ---- EEH internal-use-only related routines ---- */
 #ifdef CONFIG_EEH
+
+void pci_addr_cache_insert_device(struct pci_dev *dev);
+void pci_addr_cache_remove_device(struct pci_dev *dev);
+void pci_addr_cache_build(void);
+struct pci_dev *pci_get_device_by_addr(unsigned long addr);
+
+/**
+ * eeh_slot_error_detail -- record and EEH error condition to the log
+ * @severity: 1 if temporary, 2 if permanent failure.
+ *
+ * Obtains the the EEH error details from the RTAS subsystem,
+ * and then logs these details with the RTAS error log system.
+ */
+void eeh_slot_error_detail (struct pci_dn *pdn, int severity);
+
 /**
  * rtas_set_slot_reset -- unfreeze a frozen slot
  *
@@ -58,8 +74,10 @@ extern unsigned long pci_probe_only;
  * does this by asserting the PCI #RST line for 1/8th of
  * a second; this routine will sleep while the adapter is
  * being reset.
+ *
+ * Returns a non-zero value if the reset failed.
  */
-void rtas_set_slot_reset (struct pci_dn *);
+int rtas_set_slot_reset (struct pci_dn *);
 
 /** 
  * eeh_restore_bars - Restore device configuration info.
@@ -83,6 +101,7 @@ void eeh_restore_bars(struct pci_dn *);
 void rtas_configure_bridge(struct pci_dn *);
 
 int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
+int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
 
 /**
  * mark and clear slots: find "partition endpoint" PE and set or 
@@ -91,6 +110,10 @@ int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
 void eeh_mark_slot (struct device_node *dn, int mode_flag);
 void eeh_clear_slot (struct device_node *dn, int mode_flag);
 
+/* Find the associated "Partiationable Endpoint" PE */
+struct device_node * find_device_pe(struct device_node *dn);
+
 #endif
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_PPC_PCI_H */
diff --git a/include/asm-powerpc/ppc_asm.h b/include/asm-powerpc/ppc_asm.h
index c27baa0563fe..ab8688d39024 100644
--- a/include/asm-powerpc/ppc_asm.h
+++ b/include/asm-powerpc/ppc_asm.h
@@ -94,6 +94,7 @@
 #define RFDI            .long 0x4c00004e        /* rfdi instruction */
 #define RFMCI           .long 0x4c00004c        /* rfmci instruction */
 
+#ifdef __KERNEL__
 #ifdef CONFIG_PPC64
 
 #define XGLUE(a,b) a##b
@@ -155,52 +156,56 @@ n:
 #endif
 
 /* 
- * LOADADDR( rn, name )
- *   loads the address of 'name' into 'rn'
+ * LOAD_REG_IMMEDIATE(rn, expr)
+ *   Loads the value of the constant expression 'expr' into register 'rn'
+ *   using immediate instructions only.  Use this when it's important not
+ *   to reference other data (i.e. on ppc64 when the TOC pointer is not
+ *   valid).
  *
- * LOADBASE( rn, name )
- *   loads the address (possibly without the low 16 bits) of 'name' into 'rn'
- *   suitable for base+disp addressing
+ * LOAD_REG_ADDR(rn, name)
+ *   Loads the address of label 'name' into register 'rn'.  Use this when
+ *   you don't particularly need immediate instructions only, but you need
+ *   the whole address in one register (e.g. it's a structure address and
+ *   you want to access various offsets within it).  On ppc32 this is
+ *   identical to LOAD_REG_IMMEDIATE.
+ *
+ * LOAD_REG_ADDRBASE(rn, name)
+ * ADDROFF(name)
+ *   LOAD_REG_ADDRBASE loads part of the address of label 'name' into
+ *   register 'rn'.  ADDROFF(name) returns the remainder of the address as
+ *   a constant expression.  ADDROFF(name) is a signed expression < 16 bits
+ *   in size, so is suitable for use directly as an offset in load and store
+ *   instructions.  Use this when loading/storing a single word or less as:
+ *      LOAD_REG_ADDRBASE(rX, name)
+ *      ld      rY,ADDROFF(name)(rX)
  */
 #ifdef __powerpc64__
-#define LOADADDR(rn,name) \
-        lis     rn,name##@highest;      \
-        ori     rn,rn,name##@higher;    \
-        rldicr  rn,rn,32,31;            \
-        oris    rn,rn,name##@h;         \
-        ori     rn,rn,name##@l
-
-#define LOADBASE(rn,name)               \
-        ld      rn,name@got(r2)
-
-#define OFF(name)       0
-
-#define SET_REG_TO_CONST(reg, value)                    \
-        lis     reg,(((value)>>48)&0xFFFF);             \
-        ori     reg,reg,(((value)>>32)&0xFFFF);         \
-        rldicr  reg,reg,32,31;                          \
-        oris    reg,reg,(((value)>>16)&0xFFFF);         \
-        ori     reg,reg,((value)&0xFFFF);
-
-#define SET_REG_TO_LABEL(reg, label)                    \
-        lis     reg,(label)@highest;                    \
-        ori     reg,reg,(label)@higher;                 \
-        rldicr  reg,reg,32,31;                          \
-        oris    reg,reg,(label)@h;                      \
-        ori     reg,reg,(label)@l;
+#define LOAD_REG_IMMEDIATE(reg,expr)            \
+        lis     (reg),(expr)@highest;           \
+        ori     (reg),(reg),(expr)@higher;      \
+        rldicr  (reg),(reg),32,31;              \
+        oris    (reg),(reg),(expr)@h;           \
+        ori     (reg),(reg),(expr)@l;
+
+#define LOAD_REG_ADDR(reg,name)                 \
+        ld      (reg),name@got(r2)
+
+#define LOAD_REG_ADDRBASE(reg,name)     LOAD_REG_ADDR(reg,name)
+#define ADDROFF(name)                   0
 
 /* offsets for stack frame layout */
 #define LRSAVE  16
 
 #else /* 32-bit */
-#define LOADADDR(rn,name) \
-        lis     rn,name@ha;     \
-        addi    rn,rn,name@l
 
-#define LOADBASE(rn,name)       \
-        lis     rn,name@ha
+#define LOAD_REG_IMMEDIATE(reg,expr)            \
+        lis     (reg),(expr)@ha;                \
+        addi    (reg),(reg),(expr)@l;
 
-#define OFF(name)       name@l
+#define LOAD_REG_ADDR(reg,name)         LOAD_REG_IMMEDIATE(reg, name)
+
+#define LOAD_REG_ADDRBASE(reg, name)    lis     (reg),name@ha
+#define ADDROFF(name)                   name@l
 
 /* offsets for stack frame layout */
 #define LRSAVE  4
@@ -325,6 +330,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
 #define CLR_TOP32(r)
 #endif
 
+#endif /* __KERNEL__ */
+
 /* The boring bits... */
 
 /* Condition Register Bit Fields */
diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h
index d12382d292d4..415fa393b00c 100644
--- a/include/asm-powerpc/processor.h
+++ b/include/asm-powerpc/processor.h
@@ -10,7 +10,6 @@
  * 2 of the License, or (at your option) any later version.
  */
 
-#include <linux/config.h>
 #include <asm/reg.h>
 
 #ifndef __ASSEMBLY__
@@ -50,6 +49,7 @@
 #define _CHRP_IBM       0x05    /* IBM chrp, the longtrail and longtrail 2 */
 #define _CHRP_Pegasos   0x06    /* Genesi/bplan's Pegasos and Pegasos2 */
 
+#ifdef __KERNEL__
 #define platform_is_pseries()   (_machine == PLATFORM_PSERIES || \
                                  _machine == PLATFORM_PSERIES_LPAR)
 #define platform_is_lpar()      (!!(_machine & PLATFORM_LPAR))
@@ -68,7 +68,6 @@ extern int _chrp_type;
  * vendor. Board revision is also made available. This will be moved
  * elsewhere soon
  */
-extern unsigned char ucSystemType;
 extern unsigned char ucBoardRev;
 extern unsigned char ucBoardRevMaj, ucBoardRevMin;
 
@@ -82,7 +81,7 @@ extern unsigned char ucBoardRevMaj, ucBoardRevMin;
 #else
 #define _machine 0
 #endif /* CONFIG_PPC_MULTIPLATFORM */
-
+#endif /* __KERNEL__ */
 /*
  * Default implementation of macro that returns current
  * instruction pointer ("program counter").
diff --git a/include/asm-powerpc/prom.h b/include/asm-powerpc/prom.h
index f999df1c5c90..5b2bd4eefb01 100644
--- a/include/asm-powerpc/prom.h
+++ b/include/asm-powerpc/prom.h
@@ -65,49 +65,11 @@ struct boot_param_header
 typedef u32 phandle;
 typedef u32 ihandle;
 
-struct address_range {
-        unsigned long space;
-        unsigned long address;
-        unsigned long size;
-};
-
 struct interrupt_info {
         int     line;
         int     sense;          /* +ve/-ve logic, edge or level, etc. */
 };
 
-struct pci_address {
-        u32 a_hi;
-        u32 a_mid;
-        u32 a_lo;
-};
-
-struct isa_address {
-        u32 a_hi;
-        u32 a_lo;
-};
-
-struct isa_range {
-        struct isa_address isa_addr;
-        struct pci_address pci_addr;
-        unsigned int size;
-};
-
-struct reg_property {
-        unsigned long address;
-        unsigned long size;
-};
-
-struct reg_property32 {
-        unsigned int address;
-        unsigned int size;
-};
-
-struct reg_property64 {
-        u64 address;
-        u64 size;
-};
-
 struct property {
         char    *name;
         int     length;
@@ -120,13 +82,12 @@ struct device_node {
         char    *type;
         phandle node;
         phandle linux_phandle;
-        int     n_addrs;
-        struct  address_range *addrs;
         int     n_intrs;
         struct  interrupt_info *intrs;
         char    *full_name;
 
         struct  property *properties;
+        struct  property *deadprops; /* removed properties */
         struct  device_node *parent;
         struct  device_node *child;
         struct  device_node *sibling;
@@ -175,6 +136,9 @@ extern struct device_node *of_find_all_nodes(struct device_node *prev);
 extern struct device_node *of_get_parent(const struct device_node *node);
 extern struct device_node *of_get_next_child(const struct device_node *node,
                                              struct device_node *prev);
+extern struct property *of_find_property(struct device_node *np,
+                                         const char *name,
+                                         int *lenp);
 extern struct device_node *of_node_get(struct device_node *node);
 extern void of_node_put(struct device_node *node);
 
@@ -204,6 +168,10 @@ extern int prom_n_size_cells(struct device_node* np);
 extern int prom_n_intr_cells(struct device_node* np);
 extern void prom_get_irq_senses(unsigned char *senses, int off, int max);
 extern int prom_add_property(struct device_node* np, struct property* prop);
+extern int prom_remove_property(struct device_node *np, struct property *prop);
+extern int prom_update_property(struct device_node *np,
+                                struct property *newprop,
+                                struct property *oldprop);
 
 #ifdef CONFIG_PPC32
 /*
@@ -223,5 +191,36 @@ extern struct resource *request_OF_resource(struct device_node* node,
                                 int index, const char* name_postfix);
 extern int release_OF_resource(struct device_node* node, int index);
 
+
+/*
+ * OF address retreival & translation
+ */
+
+
+/* Translate an OF address block into a CPU physical address
+ */
+#define OF_BAD_ADDR     ((u64)-1)
+extern u64 of_translate_address(struct device_node *np, u32 *addr);
+
+/* Extract an address from a device, returns the region size and
+ * the address space flags too. The PCI version uses a BAR number
+ * instead of an absolute index
+ */
+extern u32 *of_get_address(struct device_node *dev, int index,
+                           u64 *size, unsigned int *flags);
+extern u32 *of_get_pci_address(struct device_node *dev, int bar_no,
+                               u64 *size, unsigned int *flags);
+
+/* Get an address as a resource. Note that if your address is
+ * a PIO address, the conversion will fail if the physical address
+ * can't be internally converted to an IO token with
+ * pci_address_to_pio(), that is because it's either called to early
+ * or it can't be matched to any host bridge IO space
+ */
+extern int of_address_to_resource(struct device_node *dev, int index,
+                                  struct resource *r);
+extern int of_pci_address_to_resource(struct device_node *dev, int bar,
+                                      struct resource *r);
+
 #endif /* __KERNEL__ */
 #endif /* _POWERPC_PROM_H */
diff --git a/include/asm-powerpc/ptrace.h b/include/asm-powerpc/ptrace.h
index 1f7ecdb0b6ce..9c550b314823 100644
--- a/include/asm-powerpc/ptrace.h
+++ b/include/asm-powerpc/ptrace.h
@@ -87,7 +87,7 @@ extern unsigned long profile_pc(struct pt_regs *regs);
 
 #define force_successful_syscall_return()   \
         do { \
-                current_thread_info()->syscall_noerror = 1; \
+                set_thread_flag(TIF_NOERROR); \
         } while(0)
 
 /*
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index eb392d038ed7..12ecc9b9f285 100644
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -145,6 +145,10 @@
 #define SPRN_CTR        0x009   /* Count Register */
 #define SPRN_CTRLF      0x088
 #define SPRN_CTRLT      0x098
+#define   CTRL_CT       0xc0000000      /* current thread */
+#define   CTRL_CT0      0x80000000      /* thread 0 */
+#define   CTRL_CT1      0x40000000      /* thread 1 */
+#define   CTRL_TE       0x00c00000      /* thread enable */
 #define   CTRL_RUNLATCH 0x1
 #define SPRN_DABR       0x3F5   /* Data Address Breakpoint Register */
 #define   DABR_TRANSLATION      (1UL << 2)
@@ -257,11 +261,11 @@
 #define SPRN_HID6       0x3F9   /* BE HID 6 */
 #define   HID6_LB       (0x0F<<12) /* Concurrent Large Page Modes */
 #define   HID6_DLP      (1<<20) /* Disable all large page modes (4K only) */
-#define SPRN_TSCR       0x399   /* Thread switch control on BE */
-#define SPRN_TTR        0x39A   /* Thread switch timeout on BE */
-#define   TSCR_DEC_ENABLE       0x200000 /* Decrementer Interrupt */
-#define   TSCR_EE_ENABLE        0x100000 /* External Interrupt */
-#define   TSCR_EE_BOOST         0x080000 /* External Interrupt Boost */
+#define SPRN_TSC_CELL   0x399   /* Thread switch control on Cell */
+#define   TSC_CELL_DEC_ENABLE_0 0x400000 /* Decrementer Interrupt */
+#define   TSC_CELL_DEC_ENABLE_1 0x200000 /* Decrementer Interrupt */
+#define   TSC_CELL_EE_ENABLE    0x100000 /* External Interrupt */
+#define   TSC_CELL_EE_BOOST     0x080000 /* External Interrupt Boost */
 #define SPRN_TSC        0x3FD   /* Thread switch control on others */
 #define SPRN_TST        0x3FC   /* Thread switch timeout on others */
 #if !defined(SPRN_IAC1) && !defined(SPRN_IAC2)
@@ -375,6 +379,14 @@
 #define SPRN_SPRG7      0x117   /* Special Purpose Register General 7 */
 #define SPRN_SRR0       0x01A   /* Save/Restore Register 0 */
 #define SPRN_SRR1       0x01B   /* Save/Restore Register 1 */
+#define   SRR1_WAKEMASK         0x00380000 /* reason for wakeup */
+#define   SRR1_WAKERESET        0x00380000 /* System reset */
+#define   SRR1_WAKESYSERR       0x00300000 /* System error */
+#define   SRR1_WAKEEE           0x00200000 /* External interrupt */
+#define   SRR1_WAKEMT           0x00280000 /* mtctrl */
+#define   SRR1_WAKEDEC          0x00180000 /* Decrementer interrupt */
+#define   SRR1_WAKETHERM        0x00100000 /* Thermal management interrupt */
+
 #ifndef SPRN_SVR
 #define SPRN_SVR        0x11E   /* System Version Register */
 #endif
@@ -443,12 +455,35 @@
 #define SPRN_SDAR       781
 
 #else /* 32-bit */
-#define SPRN_MMCR0      0x3B8   /* Monitor Mode Control Register 0 */
-#define SPRN_MMCR1      0x3BC   /* Monitor Mode Control Register 1 */
-#define SPRN_PMC1       0x3B9   /* Performance Counter Register 1 */
-#define SPRN_PMC2       0x3BA   /* Performance Counter Register 2 */
-#define SPRN_PMC3       0x3BD   /* Performance Counter Register 3 */
-#define SPRN_PMC4       0x3BE   /* Performance Counter Register 4 */
+#define SPRN_MMCR0      952     /* Monitor Mode Control Register 0 */
+#define   MMCR0_FC      0x80000000UL /* freeze counters */
+#define   MMCR0_FCS     0x40000000UL /* freeze in supervisor state */
+#define   MMCR0_FCP     0x20000000UL /* freeze in problem state */
+#define   MMCR0_FCM1    0x10000000UL /* freeze counters while MSR mark = 1 */
+#define   MMCR0_FCM0    0x08000000UL /* freeze counters while MSR mark = 0 */
+#define   MMCR0_PMXE    0x04000000UL /* performance monitor exception enable */
+#define   MMCR0_FCECE   0x02000000UL /* freeze ctrs on enabled cond or event */
+#define   MMCR0_TBEE    0x00400000UL /* time base exception enable */
+#define   MMCR0_PMC1CE  0x00008000UL /* PMC1 count enable*/
+#define   MMCR0_PMCnCE  0x00004000UL /* count enable for all but PMC 1*/
+#define   MMCR0_TRIGGER 0x00002000UL /* TRIGGER enable */
+#define   MMCR0_PMC1SEL 0x00001fc0UL /* PMC 1 Event */
+#define   MMCR0_PMC2SEL 0x0000003fUL /* PMC 2 Event */
+
+#define SPRN_MMCR1      956
+#define   MMCR1_PMC3SEL 0xf8000000UL /* PMC 3 Event */
+#define   MMCR1_PMC4SEL 0x07c00000UL /* PMC 4 Event */
+#define   MMCR1_PMC5SEL 0x003e0000UL /* PMC 5 Event */
+#define   MMCR1_PMC6SEL 0x0001f800UL /* PMC 6 Event */
+#define SPRN_MMCR2      944
+#define SPRN_PMC1       953     /* Performance Counter Register 1 */
+#define SPRN_PMC2       954     /* Performance Counter Register 2 */
+#define SPRN_PMC3       957     /* Performance Counter Register 3 */
+#define SPRN_PMC4       958     /* Performance Counter Register 4 */
+#define SPRN_PMC5       945     /* Performance Counter Register 5 */
+#define SPRN_PMC6       946     /* Performance Counter Register 6 */
+
+#define SPRN_SIAR       955     /* Sampled Instruction Address Register */
 
 /* Bit definitions for MMCR0 and PMC1 / PMC2. */
 #define MMCR0_PMC1_CYCLES       (1 << 7)
@@ -458,7 +493,6 @@
 #define MMCR0_PMC2_CYCLES       0x1
 #define MMCR0_PMC2_ITLB         0x7
 #define MMCR0_PMC2_LOADMISSTIME 0x5
-#define MMCR0_PMXE      (1 << 26)
 #endif
 
 /* Processor Version Register (PVR) field extraction */
diff --git a/include/asm-powerpc/rtas.h b/include/asm-powerpc/rtas.h
index d1bb611ea626..f43c6835e62a 100644
--- a/include/asm-powerpc/rtas.h
+++ b/include/asm-powerpc/rtas.h
@@ -1,5 +1,6 @@
 #ifndef _POWERPC_RTAS_H
 #define _POWERPC_RTAS_H
+#ifdef __KERNEL__
 
 #include <linux/spinlock.h>
 #include <asm/page.h>
@@ -160,7 +161,6 @@ extern struct rtas_t rtas;
 extern void enter_rtas(unsigned long);
 extern int rtas_token(const char *service);
 extern int rtas_call(int token, int, int, int *, ...);
-extern void call_rtas_display_status(unsigned char);
 extern void rtas_restart(char *cmd);
 extern void rtas_power_off(void);
 extern void rtas_halt(void);
@@ -229,4 +229,5 @@ extern unsigned long rtas_rmo_buf;
 
 #define GLOBAL_INTERRUPT_QUEUE 9005
 
+#endif /* __KERNEL__ */
 #endif /* _POWERPC_RTAS_H */
diff --git a/include/asm-powerpc/seccomp.h b/include/asm-powerpc/seccomp.h
index 1e1cfe12882b..853765eb1f65 100644
--- a/include/asm-powerpc/seccomp.h
+++ b/include/asm-powerpc/seccomp.h
@@ -1,6 +1,10 @@
 #ifndef _ASM_POWERPC_SECCOMP_H
+#define _ASM_POWERPC_SECCOMP_H
 
+#ifdef __KERNEL__
 #include <linux/thread_info.h>
+#endif
+
 #include <linux/unistd.h>
 
 #define __NR_seccomp_read __NR_read
diff --git a/include/asm-powerpc/sections.h b/include/asm-powerpc/sections.h
index 47be2ac2a925..916018e425c4 100644
--- a/include/asm-powerpc/sections.h
+++ b/include/asm-powerpc/sections.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_SECTIONS_H
 #define _ASM_POWERPC_SECTIONS_H
+#ifdef __KERNEL__
 
 #include <asm-generic/sections.h>
 
@@ -17,4 +18,5 @@ static inline int in_kernel_text(unsigned long addr)
 
 #endif
 
+#endif /* __KERNEL__ */
 #endif  /* _ASM_POWERPC_SECTIONS_H */
diff --git a/include/asm-powerpc/serial.h b/include/asm-powerpc/serial.h
index b273d630b32f..3e8589b43cb2 100644
--- a/include/asm-powerpc/serial.h
+++ b/include/asm-powerpc/serial.h
@@ -15,4 +15,10 @@
 /* Default baud base if not found in device-tree */
 #define BASE_BAUD ( 1843200 / 16 )
 
+#ifdef CONFIG_PPC_UDBG_16550
+extern void find_legacy_serial_ports(void);
+#else
+#define find_legacy_serial_ports()      do { } while (0)
+#endif
+
 #endif /* _PPC64_SERIAL_H */
diff --git a/include/asm-powerpc/signal.h b/include/asm-powerpc/signal.h
index 694c8d2dab87..a4d8f8648541 100644
--- a/include/asm-powerpc/signal.h
+++ b/include/asm-powerpc/signal.h
@@ -2,10 +2,13 @@
 #define _ASM_POWERPC_SIGNAL_H
 
 #include <linux/types.h>
-#include <linux/config.h>
 
 #define _NSIG           64
-#define _NSIG_BPW       BITS_PER_LONG
+#ifdef __powerpc64__
+#define _NSIG_BPW       64
+#else
+#define _NSIG_BPW       32
+#endif
 #define _NSIG_WORDS     (_NSIG / _NSIG_BPW)
 
 typedef unsigned long old_sigset_t;             /* at least 32 bits */
diff --git a/include/asm-powerpc/smu.h b/include/asm-powerpc/smu.h
index 76c29a9784dd..82ce47607774 100644
--- a/include/asm-powerpc/smu.h
+++ b/include/asm-powerpc/smu.h
@@ -4,9 +4,11 @@
 /*
  * Definitions for talking to the SMU chip in newer G5 PowerMacs
  */
-
+#ifdef __KERNEL__
 #include <linux/config.h>
 #include <linux/list.h>
+#endif
+#include <linux/types.h>
 
 /*
  * Known SMU commands
@@ -20,7 +22,7 @@
 /*
  * Partition info commands
  *
- * These commands are used to retreive the sdb-partition-XX datas from
+ * These commands are used to retrieve the sdb-partition-XX datas from
  * the SMU. The lenght is always 2. First byte is the subcommand code
  * and second byte is the partition ID.
  *
@@ -223,7 +225,7 @@
  *
  * SMU_CMD_MISC_ee_GET_DATABLOCK_REC is used, among others, to
  * transfer blocks of data from the SMU. So far, I've decrypted it's
- * usage to retreive partition data. In order to do that, you have to
+ * usage to retrieve partition data. In order to do that, you have to
  * break your transfer in "chunks" since that command cannot transfer
  * more than a chunk at a time. The chunk size used by OF is 0xe bytes,
  * but it seems that the darwin driver will let you do 0x1e bytes if
@@ -356,6 +358,9 @@ extern unsigned long smu_cmdbuf_abs;
  * Kenrel asynchronous i2c interface
  */
 
+#define SMU_I2C_READ_MAX        0x1d
+#define SMU_I2C_WRITE_MAX       0x15
+
 /* SMU i2c header, exactly matches i2c header on wire */
 struct smu_i2c_param
 {
@@ -366,12 +371,9 @@ struct smu_i2c_param
         u8      subaddr[3];     /* subaddress */
         u8      caddr;          /* combined address, filled by SMU driver */
         u8      datalen;        /* length of transfer */
-        u8      data[7];        /* data */
+        u8      data[SMU_I2C_READ_MAX]; /* data */
 };
 
-#define SMU_I2C_READ_MAX        0x0d
-#define SMU_I2C_WRITE_MAX       0x05
-
 struct smu_i2c_cmd
 {
         /* public */
@@ -385,7 +387,7 @@ struct smu_i2c_cmd
         int                     read;
         int                     stage;
         int                     retries;
-        u8                      pdata[0x10];
+        u8                      pdata[32];
         struct list_head        link;
 };
 
@@ -487,8 +489,8 @@ struct smu_sdbp_slotspow {
 #define SMU_SDB_SENSORTREE_ID           0x25
 
 struct smu_sdbp_sensortree {
-        u8      model_id;
-        u8      unknown[3];
+        __u8    model_id;
+        __u8    unknown[3];
 };
 
 /* This partition contains CPU thermal control PID informations. So far
@@ -498,13 +500,13 @@ struct smu_sdbp_sensortree {
 #define SMU_SDB_CPUPIDDATA_ID           0x17
 
 struct smu_sdbp_cpupiddata {
-        u8      unknown1;
-        u8      target_temp_delta;
-        u8      unknown2;
-        u8      history_len;
-        s16     power_adj;
-        u16     max_power;
-        s32     gp,gr,gd;
+        __u8    unknown1;
+        __u8    target_temp_delta;
+        __u8    unknown2;
+        __u8    history_len;
+        __s16   power_adj;
+        __u16   max_power;
+        __s32   gp,gr,gd;
 };
 
 
@@ -517,7 +519,7 @@ struct smu_sdbp_cpupiddata {
  * if not found. The data format is described below
  */
 extern struct smu_sdbp_header *smu_get_sdb_partition(int id,
-                                                     unsigned int *size);
+                                        unsigned int *size);
 
 #endif /* __KERNEL__ */
 
@@ -554,7 +556,7 @@ struct smu_user_cmd_hdr
         __u32           cmdtype;
 #define SMU_CMDTYPE_SMU                 0       /* SMU command */
 #define SMU_CMDTYPE_WANTS_EVENTS        1       /* switch fd to events mode */
-#define SMU_CMDTYPE_GET_PARTITION       2       /* retreive an sdb partition */
+#define SMU_CMDTYPE_GET_PARTITION       2       /* retrieve an sdb partition */
 
         __u8            cmd;                    /* SMU command byte */
         __u8            pad[3];                 /* padding */
diff --git a/include/asm-powerpc/sparsemem.h b/include/asm-powerpc/sparsemem.h
index ba1b34fdb967..38b1ea3b58fd 100644
--- a/include/asm-powerpc/sparsemem.h
+++ b/include/asm-powerpc/sparsemem.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_SPARSEMEM_H
 #define _ASM_POWERPC_SPARSEMEM_H 1
+#ifdef __KERNEL__
 
 #ifdef CONFIG_SPARSEMEM
 /*
@@ -13,8 +14,17 @@
 
 #ifdef CONFIG_MEMORY_HOTPLUG
 extern void create_section_mapping(unsigned long start, unsigned long end);
+#ifdef CONFIG_NUMA
+extern int hot_add_scn_to_nid(unsigned long scn_addr);
+#else
+static inline int hot_add_scn_to_nid(unsigned long scn_addr)
+{
+        return 0;
+}
+#endif /* CONFIG_NUMA */
 #endif /* CONFIG_MEMORY_HOTPLUG */
 
 #endif /* CONFIG_SPARSEMEM */
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_SPARSEMEM_H */
diff --git a/include/asm-powerpc/spinlock.h b/include/asm-powerpc/spinlock.h
index caa4b14e0e94..895cb6d3a42a 100644
--- a/include/asm-powerpc/spinlock.h
+++ b/include/asm-powerpc/spinlock.h
@@ -1,5 +1,6 @@
 #ifndef __ASM_SPINLOCK_H
 #define __ASM_SPINLOCK_H
+#ifdef __KERNEL__
 
 /*
  * Simple spin lock operations.  
@@ -45,7 +46,7 @@ static __inline__ unsigned long __spin_trylock(raw_spinlock_t *lock)
 
         token = LOCK_TOKEN;
         __asm__ __volatile__(
-"1:     lwarx           %0,0,%2         # __spin_trylock\n\
+"1:     lwarx           %0,0,%2\n\
         cmpwi           0,%0,0\n\
         bne-            2f\n\
         stwcx.          %1,0,%2\n\
@@ -79,7 +80,7 @@ static int __inline__ __raw_spin_trylock(raw_spinlock_t *lock)
 
 #if defined(CONFIG_PPC_SPLPAR) || defined(CONFIG_PPC_ISERIES)
 /* We only yield to the hypervisor if we are in shared processor mode */
-#define SHARED_PROCESSOR (get_paca()->lppaca.shared_proc)
+#define SHARED_PROCESSOR (get_lppaca()->shared_proc)
 extern void __spin_yield(raw_spinlock_t *lock);
 extern void __rw_yield(raw_rwlock_t *lock);
 #else /* SPLPAR || ISERIES */
@@ -123,8 +124,8 @@ static void __inline__ __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long
 
 static __inline__ void __raw_spin_unlock(raw_spinlock_t *lock)
 {
-        __asm__ __volatile__(SYNC_ON_SMP"       # __raw_spin_unlock"
-                             : : :"memory");
+        __asm__ __volatile__("# __raw_spin_unlock\n\t"
+                                LWSYNC_ON_SMP: : :"memory");
         lock->slock = 0;
 }
 
@@ -166,7 +167,7 @@ static long __inline__ __read_trylock(raw_rwlock_t *rw)
         long tmp;
 
         __asm__ __volatile__(
-"1:     lwarx           %0,0,%1         # read_trylock\n"
+"1:     lwarx           %0,0,%1\n"
         __DO_SIGN_EXTEND
 "       addic.          %0,%0,1\n\
         ble-            2f\n"
@@ -191,7 +192,7 @@ static __inline__ long __write_trylock(raw_rwlock_t *rw)
 
         token = WRLOCK_TOKEN;
         __asm__ __volatile__(
-"1:     lwarx           %0,0,%2 # write_trylock\n\
+"1:     lwarx           %0,0,%2\n\
         cmpwi           0,%0,0\n\
         bne-            2f\n"
         PPC405_ERR77(0,%1)
@@ -248,8 +249,9 @@ static void __inline__ __raw_read_unlock(raw_rwlock_t *rw)
         long tmp;
 
         __asm__ __volatile__(
-        "eieio                          # read_unlock\n\
-1:      lwarx           %0,0,%1\n\
+        "# read_unlock\n\t"
+        LWSYNC_ON_SMP
+"1:     lwarx           %0,0,%1\n\
         addic           %0,%0,-1\n"
         PPC405_ERR77(0,%1)
 "       stwcx.          %0,0,%1\n\
@@ -261,9 +263,10 @@ static void __inline__ __raw_read_unlock(raw_rwlock_t *rw)
 
 static __inline__ void __raw_write_unlock(raw_rwlock_t *rw)
 {
-        __asm__ __volatile__(SYNC_ON_SMP"       # write_unlock"
-                             : : :"memory");
+        __asm__ __volatile__("# write_unlock\n\t"
+                                LWSYNC_ON_SMP: : :"memory");
         rw->lock = 0;
 }
 
+#endif /* __KERNEL__ */
 #endif /* __ASM_SPINLOCK_H */
diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
new file mode 100644
index 000000000000..38bacf2f6e0c
--- /dev/null
+++ b/include/asm-powerpc/spu.h
@@ -0,0 +1,600 @@
+/*
+ * SPU core / file system interface and HW structures
+ *
+ * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
+ *
+ * Author: Arnd Bergmann <arndb@de.ibm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _SPU_H
+#define _SPU_H
+#ifdef __KERNEL__
+
+#include <linux/config.h>
+#include <linux/kref.h>
+#include <linux/workqueue.h>
+
+#define LS_SIZE (256 * 1024)
+#define LS_ADDR_MASK (LS_SIZE - 1)
+
+#define MFC_PUT_CMD             0x20
+#define MFC_PUTS_CMD            0x28
+#define MFC_PUTR_CMD            0x30
+#define MFC_PUTF_CMD            0x22
+#define MFC_PUTB_CMD            0x21
+#define MFC_PUTFS_CMD           0x2A
+#define MFC_PUTBS_CMD           0x29
+#define MFC_PUTRF_CMD           0x32
+#define MFC_PUTRB_CMD           0x31
+#define MFC_PUTL_CMD            0x24
+#define MFC_PUTRL_CMD           0x34
+#define MFC_PUTLF_CMD           0x26
+#define MFC_PUTLB_CMD           0x25
+#define MFC_PUTRLF_CMD          0x36
+#define MFC_PUTRLB_CMD          0x35
+
+#define MFC_GET_CMD             0x40
+#define MFC_GETS_CMD            0x48
+#define MFC_GETF_CMD            0x42
+#define MFC_GETB_CMD            0x41
+#define MFC_GETFS_CMD           0x4A
+#define MFC_GETBS_CMD           0x49
+#define MFC_GETL_CMD            0x44
+#define MFC_GETLF_CMD           0x46
+#define MFC_GETLB_CMD           0x45
+
+#define MFC_SDCRT_CMD           0x80
+#define MFC_SDCRTST_CMD         0x81
+#define MFC_SDCRZ_CMD           0x89
+#define MFC_SDCRS_CMD           0x8D
+#define MFC_SDCRF_CMD           0x8F
+
+#define MFC_GETLLAR_CMD         0xD0
+#define MFC_PUTLLC_CMD          0xB4
+#define MFC_PUTLLUC_CMD         0xB0
+#define MFC_PUTQLLUC_CMD        0xB8
+#define MFC_SNDSIG_CMD          0xA0
+#define MFC_SNDSIGB_CMD         0xA1
+#define MFC_SNDSIGF_CMD         0xA2
+#define MFC_BARRIER_CMD         0xC0
+#define MFC_EIEIO_CMD           0xC8
+#define MFC_SYNC_CMD            0xCC
+
+#define MFC_MIN_DMA_SIZE_SHIFT  4       /* 16 bytes */
+#define MFC_MAX_DMA_SIZE_SHIFT  14      /* 16384 bytes */
+#define MFC_MIN_DMA_SIZE        (1 << MFC_MIN_DMA_SIZE_SHIFT)
+#define MFC_MAX_DMA_SIZE        (1 << MFC_MAX_DMA_SIZE_SHIFT)
+#define MFC_MIN_DMA_SIZE_MASK   (MFC_MIN_DMA_SIZE - 1)
+#define MFC_MAX_DMA_SIZE_MASK   (MFC_MAX_DMA_SIZE - 1)
+#define MFC_MIN_DMA_LIST_SIZE   0x0008  /*   8 bytes */
+#define MFC_MAX_DMA_LIST_SIZE   0x4000  /* 16K bytes */
+
+#define MFC_TAGID_TO_TAGMASK(tag_id)  (1 << (tag_id & 0x1F))
+
+/* Events for Channels 0-2 */
+#define MFC_DMA_TAG_STATUS_UPDATE_EVENT     0x00000001
+#define MFC_DMA_TAG_CMD_STALL_NOTIFY_EVENT  0x00000002
+#define MFC_DMA_QUEUE_AVAILABLE_EVENT       0x00000008
+#define MFC_SPU_MAILBOX_WRITTEN_EVENT       0x00000010
+#define MFC_DECREMENTER_EVENT               0x00000020
+#define MFC_PU_INT_MAILBOX_AVAILABLE_EVENT  0x00000040
+#define MFC_PU_MAILBOX_AVAILABLE_EVENT      0x00000080
+#define MFC_SIGNAL_2_EVENT                  0x00000100
+#define MFC_SIGNAL_1_EVENT                  0x00000200
+#define MFC_LLR_LOST_EVENT                  0x00000400
+#define MFC_PRIV_ATTN_EVENT                 0x00000800
+#define MFC_MULTI_SRC_EVENT                 0x00001000
+
+/* Flags indicating progress during context switch. */
+#define SPU_CONTEXT_SWITCH_PENDING      0UL
+#define SPU_CONTEXT_SWITCH_ACTIVE       1UL
+
+struct spu_context;
+struct spu_runqueue;
+
+struct spu {
+        char *name;
+        unsigned long local_store_phys;
+        u8 *local_store;
+        struct spu_problem __iomem *problem;
+        struct spu_priv1 __iomem *priv1;
+        struct spu_priv2 __iomem *priv2;
+        struct list_head list;
+        struct list_head sched_list;
+        int number;
+        u32 isrc;
+        u32 node;
+        u64 flags;
+        u64 dar;
+        u64 dsisr;
+        struct kref kref;
+        size_t ls_size;
+        unsigned int slb_replace;
+        struct mm_struct *mm;
+        struct spu_context *ctx;
+        struct spu_runqueue *rq;
+        unsigned long long timestamp;
+        pid_t pid;
+        int prio;
+        int class_0_pending;
+        spinlock_t register_lock;
+
+        u32 stop_code;
+        void (* wbox_callback)(struct spu *spu);
+        void (* ibox_callback)(struct spu *spu);
+        void (* stop_callback)(struct spu *spu);
+
+        char irq_c0[8];
+        char irq_c1[8];
+        char irq_c2[8];
+};
+
+struct spu *spu_alloc(void);
+void spu_free(struct spu *spu);
+int spu_irq_class_0_bottom(struct spu *spu);
+int spu_irq_class_1_bottom(struct spu *spu);
+void spu_irq_setaffinity(struct spu *spu, int cpu);
+
+extern struct spufs_calls {
+        asmlinkage long (*create_thread)(const char __user *name,
+                                        unsigned int flags, mode_t mode);
+        asmlinkage long (*spu_run)(struct file *filp, __u32 __user *unpc,
+                                                __u32 __user *ustatus);
+        struct module *owner;
+} spufs_calls;
+
+#ifdef CONFIG_SPU_FS_MODULE
+int register_spu_syscalls(struct spufs_calls *calls);
+void unregister_spu_syscalls(struct spufs_calls *calls);
+#else
+static inline int register_spu_syscalls(struct spufs_calls *calls)
+{
+        return 0;
+}
+static inline void unregister_spu_syscalls(struct spufs_calls *calls)
+{
+}
+#endif /* MODULE */
+
+
+/* access to priv1 registers */
+void spu_int_mask_and(struct spu *spu, int class, u64 mask);
+void spu_int_mask_or(struct spu *spu, int class, u64 mask);
+void spu_int_mask_set(struct spu *spu, int class, u64 mask);
+u64 spu_int_mask_get(struct spu *spu, int class);
+void spu_int_stat_clear(struct spu *spu, int class, u64 stat);
+u64 spu_int_stat_get(struct spu *spu, int class);
+void spu_int_route_set(struct spu *spu, u64 route);
+u64 spu_mfc_dar_get(struct spu *spu);
+u64 spu_mfc_dsisr_get(struct spu *spu);
+void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr);
+void spu_mfc_sdr_set(struct spu *spu, u64 sdr);
+void spu_mfc_sr1_set(struct spu *spu, u64 sr1);
+u64 spu_mfc_sr1_get(struct spu *spu);
+void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id);
+u64 spu_mfc_tclass_id_get(struct spu *spu);
+void spu_tlb_invalidate(struct spu *spu);
+void spu_resource_allocation_groupID_set(struct spu *spu, u64 id);
+u64 spu_resource_allocation_groupID_get(struct spu *spu);
+void spu_resource_allocation_enable_set(struct spu *spu, u64 enable);
+u64 spu_resource_allocation_enable_get(struct spu *spu);
+
+
+/*
+ * This defines the Local Store, Problem Area and Privlege Area of an SPU.
+ */
+
+union mfc_tag_size_class_cmd {
+        struct {
+                u16 mfc_size;
+                u16 mfc_tag;
+                u8  pad;
+                u8  mfc_rclassid;
+                u16 mfc_cmd;
+        } u;
+        struct {
+                u32 mfc_size_tag32;
+                u32 mfc_class_cmd32;
+        } by32;
+        u64 all64;
+};
+
+struct mfc_cq_sr {
+        u64 mfc_cq_data0_RW;
+        u64 mfc_cq_data1_RW;
+        u64 mfc_cq_data2_RW;
+        u64 mfc_cq_data3_RW;
+};
+
+struct spu_problem {
+#define MS_SYNC_PENDING         1L
+        u64 spc_mssync_RW;                                      /* 0x0000 */
+        u8  pad_0x0008_0x3000[0x3000 - 0x0008];
+
+        /* DMA Area */
+        u8  pad_0x3000_0x3004[0x4];                             /* 0x3000 */
+        u32 mfc_lsa_W;                                          /* 0x3004 */
+        u64 mfc_ea_W;                                           /* 0x3008 */
+        union mfc_tag_size_class_cmd mfc_union_W;                       /* 0x3010 */
+        u8  pad_0x3018_0x3104[0xec];                            /* 0x3018 */
+        u32 dma_qstatus_R;                                      /* 0x3104 */
+        u8  pad_0x3108_0x3204[0xfc];                            /* 0x3108 */
+        u32 dma_querytype_RW;                                   /* 0x3204 */
+        u8  pad_0x3208_0x321c[0x14];                            /* 0x3208 */
+        u32 dma_querymask_RW;                                   /* 0x321c */
+        u8  pad_0x3220_0x322c[0xc];                             /* 0x3220 */
+        u32 dma_tagstatus_R;                                    /* 0x322c */
+#define DMA_TAGSTATUS_INTR_ANY  1u
+#define DMA_TAGSTATUS_INTR_ALL  2u
+        u8  pad_0x3230_0x4000[0x4000 - 0x3230];                 /* 0x3230 */
+
+        /* SPU Control Area */
+        u8  pad_0x4000_0x4004[0x4];                             /* 0x4000 */
+        u32 pu_mb_R;                                            /* 0x4004 */
+        u8  pad_0x4008_0x400c[0x4];                             /* 0x4008 */
+        u32 spu_mb_W;                                           /* 0x400c */
+        u8  pad_0x4010_0x4014[0x4];                             /* 0x4010 */
+        u32 mb_stat_R;                                          /* 0x4014 */
+        u8  pad_0x4018_0x401c[0x4];                             /* 0x4018 */
+        u32 spu_runcntl_RW;                                     /* 0x401c */
+#define SPU_RUNCNTL_STOP        0L
+#define SPU_RUNCNTL_RUNNABLE    1L
+        u8  pad_0x4020_0x4024[0x4];                             /* 0x4020 */
+        u32 spu_status_R;                                       /* 0x4024 */
+#define SPU_STOP_STATUS_SHIFT           16
+#define SPU_STATUS_STOPPED              0x0
+#define SPU_STATUS_RUNNING              0x1
+#define SPU_STATUS_STOPPED_BY_STOP      0x2
+#define SPU_STATUS_STOPPED_BY_HALT      0x4
+#define SPU_STATUS_WAITING_FOR_CHANNEL  0x8
+#define SPU_STATUS_SINGLE_STEP          0x10
+#define SPU_STATUS_INVALID_INSTR        0x20
+#define SPU_STATUS_INVALID_CH           0x40
+#define SPU_STATUS_ISOLATED_STATE       0x80
+#define SPU_STATUS_ISOLATED_LOAD_STAUTUS 0x200
+#define SPU_STATUS_ISOLATED_EXIT_STAUTUS 0x400
+        u8  pad_0x4028_0x402c[0x4];                             /* 0x4028 */
+        u32 spu_spe_R;                                          /* 0x402c */
+        u8  pad_0x4030_0x4034[0x4];                             /* 0x4030 */
+        u32 spu_npc_RW;                                         /* 0x4034 */
+        u8  pad_0x4038_0x14000[0x14000 - 0x4038];               /* 0x4038 */
+
+        /* Signal Notification Area */
+        u8  pad_0x14000_0x1400c[0xc];                           /* 0x14000 */
+        u32 signal_notify1;                                     /* 0x1400c */
+        u8  pad_0x14010_0x1c00c[0x7ffc];                        /* 0x14010 */
+        u32 signal_notify2;                                     /* 0x1c00c */
+} __attribute__ ((aligned(0x20000)));
+
+/* SPU Privilege 2 State Area */
+struct spu_priv2 {
+        /* MFC Registers */
+        u8  pad_0x0000_0x1100[0x1100 - 0x0000];                 /* 0x0000 */
+
+        /* SLB Management Registers */
+        u8  pad_0x1100_0x1108[0x8];                             /* 0x1100 */
+        u64 slb_index_W;                                        /* 0x1108 */
+#define SLB_INDEX_MASK                          0x7L
+        u64 slb_esid_RW;                                        /* 0x1110 */
+        u64 slb_vsid_RW;                                        /* 0x1118 */
+#define SLB_VSID_SUPERVISOR_STATE       (0x1ull << 11)
+#define SLB_VSID_SUPERVISOR_STATE_MASK  (0x1ull << 11)
+#define SLB_VSID_PROBLEM_STATE          (0x1ull << 10)
+#define SLB_VSID_PROBLEM_STATE_MASK     (0x1ull << 10)
+#define SLB_VSID_EXECUTE_SEGMENT        (0x1ull << 9)
+#define SLB_VSID_NO_EXECUTE_SEGMENT     (0x1ull << 9)
+#define SLB_VSID_EXECUTE_SEGMENT_MASK   (0x1ull << 9)
+#define SLB_VSID_4K_PAGE                (0x0 << 8)
+#define SLB_VSID_LARGE_PAGE             (0x1ull << 8)
+#define SLB_VSID_PAGE_SIZE_MASK         (0x1ull << 8)
+#define SLB_VSID_CLASS_MASK             (0x1ull << 7)
+#define SLB_VSID_VIRTUAL_PAGE_SIZE_MASK (0x1ull << 6)
+        u64 slb_invalidate_entry_W;                             /* 0x1120 */
+        u64 slb_invalidate_all_W;                               /* 0x1128 */
+        u8  pad_0x1130_0x2000[0x2000 - 0x1130];                 /* 0x1130 */
+
+        /* Context Save / Restore Area */
+        struct mfc_cq_sr spuq[16];                              /* 0x2000 */
+        struct mfc_cq_sr puq[8];                                /* 0x2200 */
+        u8  pad_0x2300_0x3000[0x3000 - 0x2300];                 /* 0x2300 */
+
+        /* MFC Control */
+        u64 mfc_control_RW;                                     /* 0x3000 */
+#define MFC_CNTL_RESUME_DMA_QUEUE               (0ull << 0)
+#define MFC_CNTL_SUSPEND_DMA_QUEUE              (1ull << 0)
+#define MFC_CNTL_SUSPEND_DMA_QUEUE_MASK         (1ull << 0)
+#define MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION     (0ull << 8)
+#define MFC_CNTL_SUSPEND_IN_PROGRESS            (1ull << 8)
+#define MFC_CNTL_SUSPEND_COMPLETE               (3ull << 8)
+#define MFC_CNTL_SUSPEND_DMA_STATUS_MASK        (3ull << 8)
+#define MFC_CNTL_DMA_QUEUES_EMPTY               (1ull << 14)
+#define MFC_CNTL_DMA_QUEUES_EMPTY_MASK          (1ull << 14)
+#define MFC_CNTL_PURGE_DMA_REQUEST              (1ull << 15)
+#define MFC_CNTL_PURGE_DMA_IN_PROGRESS          (1ull << 24)
+#define MFC_CNTL_PURGE_DMA_COMPLETE             (3ull << 24)
+#define MFC_CNTL_PURGE_DMA_STATUS_MASK          (3ull << 24)
+#define MFC_CNTL_RESTART_DMA_COMMAND            (1ull << 32)
+#define MFC_CNTL_DMA_COMMAND_REISSUE_PENDING    (1ull << 32)
+#define MFC_CNTL_DMA_COMMAND_REISSUE_STATUS_MASK (1ull << 32)
+#define MFC_CNTL_MFC_PRIVILEGE_STATE            (2ull << 33)
+#define MFC_CNTL_MFC_PROBLEM_STATE              (3ull << 33)
+#define MFC_CNTL_MFC_KEY_PROTECTION_STATE_MASK  (3ull << 33)
+#define MFC_CNTL_DECREMENTER_HALTED             (1ull << 35)
+#define MFC_CNTL_DECREMENTER_RUNNING            (1ull << 40)
+#define MFC_CNTL_DECREMENTER_STATUS_MASK        (1ull << 40)
+        u8  pad_0x3008_0x4000[0x4000 - 0x3008];                 /* 0x3008 */
+
+        /* Interrupt Mailbox */
+        u64 puint_mb_R;                                         /* 0x4000 */
+        u8  pad_0x4008_0x4040[0x4040 - 0x4008];                 /* 0x4008 */
+
+        /* SPU Control */
+        u64 spu_privcntl_RW;                                    /* 0x4040 */
+#define SPU_PRIVCNTL_MODE_NORMAL                (0x0ull << 0)
+#define SPU_PRIVCNTL_MODE_SINGLE_STEP           (0x1ull << 0)
+#define SPU_PRIVCNTL_MODE_MASK                  (0x1ull << 0)
+#define SPU_PRIVCNTL_NO_ATTENTION_EVENT         (0x0ull << 1)
+#define SPU_PRIVCNTL_ATTENTION_EVENT            (0x1ull << 1)
+#define SPU_PRIVCNTL_ATTENTION_EVENT_MASK       (0x1ull << 1)
+#define SPU_PRIVCNT_LOAD_REQUEST_NORMAL         (0x0ull << 2)
+#define SPU_PRIVCNT_LOAD_REQUEST_ENABLE_MASK    (0x1ull << 2)
+        u8  pad_0x4048_0x4058[0x10];                            /* 0x4048 */
+        u64 spu_lslr_RW;                                        /* 0x4058 */
+        u64 spu_chnlcntptr_RW;                                  /* 0x4060 */
+        u64 spu_chnlcnt_RW;                                     /* 0x4068 */
+        u64 spu_chnldata_RW;                                    /* 0x4070 */
+        u64 spu_cfg_RW;                                         /* 0x4078 */
+        u8  pad_0x4080_0x5000[0x5000 - 0x4080];                 /* 0x4080 */
+
+        /* PV2_ImplRegs: Implementation-specific privileged-state 2 regs */
+        u64 spu_pm_trace_tag_status_RW;                         /* 0x5000 */
+        u64 spu_tag_status_query_RW;                            /* 0x5008 */
+#define TAG_STATUS_QUERY_CONDITION_BITS (0x3ull << 32)
+#define TAG_STATUS_QUERY_MASK_BITS (0xffffffffull)
+        u64 spu_cmd_buf1_RW;                                    /* 0x5010 */
+#define SPU_COMMAND_BUFFER_1_LSA_BITS (0x7ffffull << 32)
+#define SPU_COMMAND_BUFFER_1_EAH_BITS (0xffffffffull)
+        u64 spu_cmd_buf2_RW;                                    /* 0x5018 */
+#define SPU_COMMAND_BUFFER_2_EAL_BITS ((0xffffffffull) << 32)
+#define SPU_COMMAND_BUFFER_2_TS_BITS (0xffffull << 16)
+#define SPU_COMMAND_BUFFER_2_TAG_BITS (0x3full)
+        u64 spu_atomic_status_RW;                               /* 0x5020 */
+} __attribute__ ((aligned(0x20000)));
+
+/* SPU Privilege 1 State Area */
+struct spu_priv1 {
+        /* Control and Configuration Area */
+        u64 mfc_sr1_RW;                                         /* 0x000 */
+#define MFC_STATE1_LOCAL_STORAGE_DECODE_MASK    0x01ull
+#define MFC_STATE1_BUS_TLBIE_MASK               0x02ull
+#define MFC_STATE1_REAL_MODE_OFFSET_ENABLE_MASK 0x04ull
+#define MFC_STATE1_PROBLEM_STATE_MASK           0x08ull
+#define MFC_STATE1_RELOCATE_MASK                0x10ull
+#define MFC_STATE1_MASTER_RUN_CONTROL_MASK      0x20ull
+        u64 mfc_lpid_RW;                                        /* 0x008 */
+        u64 spu_idr_RW;                                         /* 0x010 */
+        u64 mfc_vr_RO;                                          /* 0x018 */
+#define MFC_VERSION_BITS                (0xffff << 16)
+#define MFC_REVISION_BITS               (0xffff)
+#define MFC_GET_VERSION_BITS(vr)        (((vr) & MFC_VERSION_BITS) >> 16)
+#define MFC_GET_REVISION_BITS(vr)       ((vr) & MFC_REVISION_BITS)
+        u64 spu_vr_RO;                                          /* 0x020 */
+#define SPU_VERSION_BITS                (0xffff << 16)
+#define SPU_REVISION_BITS               (0xffff)
+#define SPU_GET_VERSION_BITS(vr)        (vr & SPU_VERSION_BITS) >> 16
+#define SPU_GET_REVISION_BITS(vr)       (vr & SPU_REVISION_BITS)
+        u8  pad_0x28_0x100[0x100 - 0x28];                       /* 0x28 */
+
+
+        /* Interrupt Area */
+        u64 int_mask_RW[3];                                     /* 0x100 */
+#define CLASS0_ENABLE_DMA_ALIGNMENT_INTR                0x1L
+#define CLASS0_ENABLE_INVALID_DMA_COMMAND_INTR          0x2L
+#define CLASS0_ENABLE_SPU_ERROR_INTR                    0x4L
+#define CLASS0_ENABLE_MFC_FIR_INTR                      0x8L
+#define CLASS1_ENABLE_SEGMENT_FAULT_INTR                0x1L
+#define CLASS1_ENABLE_STORAGE_FAULT_INTR                0x2L
+#define CLASS1_ENABLE_LS_COMPARE_SUSPEND_ON_GET_INTR    0x4L
+#define CLASS1_ENABLE_LS_COMPARE_SUSPEND_ON_PUT_INTR    0x8L
+#define CLASS2_ENABLE_MAILBOX_INTR                      0x1L
+#define CLASS2_ENABLE_SPU_STOP_INTR                     0x2L
+#define CLASS2_ENABLE_SPU_HALT_INTR                     0x4L
+#define CLASS2_ENABLE_SPU_DMA_TAG_GROUP_COMPLETE_INTR   0x8L
+        u8  pad_0x118_0x140[0x28];                              /* 0x118 */
+        u64 int_stat_RW[3];                                     /* 0x140 */
+        u8  pad_0x158_0x180[0x28];                              /* 0x158 */
+        u64 int_route_RW;                                       /* 0x180 */
+
+        /* Interrupt Routing */
+        u8  pad_0x188_0x200[0x200 - 0x188];                     /* 0x188 */
+
+        /* Atomic Unit Control Area */
+        u64 mfc_atomic_flush_RW;                                /* 0x200 */
+#define mfc_atomic_flush_enable                 0x1L
+        u8  pad_0x208_0x280[0x78];                              /* 0x208 */
+        u64 resource_allocation_groupID_RW;                     /* 0x280 */
+        u64 resource_allocation_enable_RW;                      /* 0x288 */
+        u8  pad_0x290_0x3c8[0x3c8 - 0x290];                     /* 0x290 */
+
+        /* SPU_Cache_ImplRegs: Implementation-dependent cache registers */
+
+        u64 smf_sbi_signal_sel;                                 /* 0x3c8 */
+#define smf_sbi_mask_lsb        56
+#define smf_sbi_shift           (63 - smf_sbi_mask_lsb)
+#define smf_sbi_mask            (0x301LL << smf_sbi_shift)
+#define smf_sbi_bus0_bits       (0x001LL << smf_sbi_shift)
+#define smf_sbi_bus2_bits       (0x100LL << smf_sbi_shift)
+#define smf_sbi2_bus0_bits      (0x201LL << smf_sbi_shift)
+#define smf_sbi2_bus2_bits      (0x300LL << smf_sbi_shift)
+        u64 smf_ato_signal_sel;                                 /* 0x3d0 */
+#define smf_ato_mask_lsb        35
+#define smf_ato_shift           (63 - smf_ato_mask_lsb)
+#define smf_ato_mask            (0x3LL << smf_ato_shift)
+#define smf_ato_bus0_bits       (0x2LL << smf_ato_shift)
+#define smf_ato_bus2_bits       (0x1LL << smf_ato_shift)
+        u8  pad_0x3d8_0x400[0x400 - 0x3d8];                     /* 0x3d8 */
+
+        /* TLB Management Registers */
+        u64 mfc_sdr_RW;                                         /* 0x400 */
+        u8  pad_0x408_0x500[0xf8];                              /* 0x408 */
+        u64 tlb_index_hint_RO;                                  /* 0x500 */
+        u64 tlb_index_W;                                        /* 0x508 */
+        u64 tlb_vpn_RW;                                         /* 0x510 */
+        u64 tlb_rpn_RW;                                         /* 0x518 */
+        u8  pad_0x520_0x540[0x20];                              /* 0x520 */
+        u64 tlb_invalidate_entry_W;                             /* 0x540 */
+        u64 tlb_invalidate_all_W;                               /* 0x548 */
+        u8  pad_0x550_0x580[0x580 - 0x550];                     /* 0x550 */
+
+        /* SPU_MMU_ImplRegs: Implementation-dependent MMU registers */
+        u64 smm_hid;                                            /* 0x580 */
+#define PAGE_SIZE_MASK          0xf000000000000000ull
+#define PAGE_SIZE_16MB_64KB     0x2000000000000000ull
+        u8  pad_0x588_0x600[0x600 - 0x588];                     /* 0x588 */
+
+        /* MFC Status/Control Area */
+        u64 mfc_accr_RW;                                        /* 0x600 */
+#define MFC_ACCR_EA_ACCESS_GET          (1 << 0)
+#define MFC_ACCR_EA_ACCESS_PUT          (1 << 1)
+#define MFC_ACCR_LS_ACCESS_GET          (1 << 3)
+#define MFC_ACCR_LS_ACCESS_PUT          (1 << 4)
+        u8  pad_0x608_0x610[0x8];                               /* 0x608 */
+        u64 mfc_dsisr_RW;                                       /* 0x610 */
+#define MFC_DSISR_PTE_NOT_FOUND         (1 << 30)
+#define MFC_DSISR_ACCESS_DENIED         (1 << 27)
+#define MFC_DSISR_ATOMIC                (1 << 26)
+#define MFC_DSISR_ACCESS_PUT            (1 << 25)
+#define MFC_DSISR_ADDR_MATCH            (1 << 22)
+#define MFC_DSISR_LS                    (1 << 17)
+#define MFC_DSISR_L                     (1 << 16)
+#define MFC_DSISR_ADDRESS_OVERFLOW      (1 << 0)
+        u8  pad_0x618_0x620[0x8];                               /* 0x618 */
+        u64 mfc_dar_RW;                                         /* 0x620 */
+        u8  pad_0x628_0x700[0x700 - 0x628];                     /* 0x628 */
+
+        /* Replacement Management Table (RMT) Area */
+        u64 rmt_index_RW;                                       /* 0x700 */
+        u8  pad_0x708_0x710[0x8];                               /* 0x708 */
+        u64 rmt_data1_RW;                                       /* 0x710 */
+        u8  pad_0x718_0x800[0x800 - 0x718];                     /* 0x718 */
+
+        /* Control/Configuration Registers */
+        u64 mfc_dsir_R;                                         /* 0x800 */
+#define MFC_DSIR_Q                      (1 << 31)
+#define MFC_DSIR_SPU_QUEUE              MFC_DSIR_Q
+        u64 mfc_lsacr_RW;                                       /* 0x808 */
+#define MFC_LSACR_COMPARE_MASK          ((~0ull) << 32)
+#define MFC_LSACR_COMPARE_ADDR          ((~0ull) >> 32)
+        u64 mfc_lscrr_R;                                        /* 0x810 */
+#define MFC_LSCRR_Q                     (1 << 31)
+#define MFC_LSCRR_SPU_QUEUE             MFC_LSCRR_Q
+#define MFC_LSCRR_QI_SHIFT              32
+#define MFC_LSCRR_QI_MASK               ((~0ull) << MFC_LSCRR_QI_SHIFT)
+        u8  pad_0x818_0x820[0x8];                               /* 0x818 */
+        u64 mfc_tclass_id_RW;                                   /* 0x820 */
+#define MFC_TCLASS_ID_ENABLE            (1L << 0L)
+#define MFC_TCLASS_SLOT2_ENABLE         (1L << 5L)
+#define MFC_TCLASS_SLOT1_ENABLE         (1L << 6L)
+#define MFC_TCLASS_SLOT0_ENABLE         (1L << 7L)
+#define MFC_TCLASS_QUOTA_2_SHIFT        8L
+#define MFC_TCLASS_QUOTA_1_SHIFT        16L
+#define MFC_TCLASS_QUOTA_0_SHIFT        24L
+#define MFC_TCLASS_QUOTA_2_MASK         (0x1FL << MFC_TCLASS_QUOTA_2_SHIFT)
+#define MFC_TCLASS_QUOTA_1_MASK         (0x1FL << MFC_TCLASS_QUOTA_1_SHIFT)
+#define MFC_TCLASS_QUOTA_0_MASK         (0x1FL << MFC_TCLASS_QUOTA_0_SHIFT)
+        u8  pad_0x828_0x900[0x900 - 0x828];                     /* 0x828 */
+
+        /* Real Mode Support Registers */
+        u64 mfc_rm_boundary;                                    /* 0x900 */
+        u8  pad_0x908_0x938[0x30];                              /* 0x908 */
+        u64 smf_dma_signal_sel;                                 /* 0x938 */
+#define mfc_dma1_mask_lsb       41
+#define mfc_dma1_shift          (63 - mfc_dma1_mask_lsb)
+#define mfc_dma1_mask           (0x3LL << mfc_dma1_shift)
+#define mfc_dma1_bits           (0x1LL << mfc_dma1_shift)
+#define mfc_dma2_mask_lsb       43
+#define mfc_dma2_shift          (63 - mfc_dma2_mask_lsb)
+#define mfc_dma2_mask           (0x3LL << mfc_dma2_shift)
+#define mfc_dma2_bits           (0x1LL << mfc_dma2_shift)
+        u8  pad_0x940_0xa38[0xf8];                              /* 0x940 */
+        u64 smm_signal_sel;                                     /* 0xa38 */
+#define smm_sig_mask_lsb        12
+#define smm_sig_shift           (63 - smm_sig_mask_lsb)
+#define smm_sig_mask            (0x3LL << smm_sig_shift)
+#define smm_sig_bus0_bits       (0x2LL << smm_sig_shift)
+#define smm_sig_bus2_bits       (0x1LL << smm_sig_shift)
+        u8  pad_0xa40_0xc00[0xc00 - 0xa40];                     /* 0xa40 */
+
+        /* DMA Command Error Area */
+        u64 mfc_cer_R;                                          /* 0xc00 */
+#define MFC_CER_Q               (1 << 31)
+#define MFC_CER_SPU_QUEUE       MFC_CER_Q
+        u8  pad_0xc08_0x1000[0x1000 - 0xc08];                   /* 0xc08 */
+
+        /* PV1_ImplRegs: Implementation-dependent privileged-state 1 regs */
+        /* DMA Command Error Area */
+        u64 spu_ecc_cntl_RW;                                    /* 0x1000 */
+#define SPU_ECC_CNTL_E                  (1ull << 0ull)
+#define SPU_ECC_CNTL_ENABLE             SPU_ECC_CNTL_E
+#define SPU_ECC_CNTL_DISABLE            (~SPU_ECC_CNTL_E & 1L)
+#define SPU_ECC_CNTL_S                  (1ull << 1ull)
+#define SPU_ECC_STOP_AFTER_ERROR        SPU_ECC_CNTL_S
+#define SPU_ECC_CONTINUE_AFTER_ERROR    (~SPU_ECC_CNTL_S & 2L)
+#define SPU_ECC_CNTL_B                  (1ull << 2ull)
+#define SPU_ECC_BACKGROUND_ENABLE       SPU_ECC_CNTL_B
+#define SPU_ECC_BACKGROUND_DISABLE      (~SPU_ECC_CNTL_B & 4L)
+#define SPU_ECC_CNTL_I_SHIFT            3ull
+#define SPU_ECC_CNTL_I_MASK             (3ull << SPU_ECC_CNTL_I_SHIFT)
+#define SPU_ECC_WRITE_ALWAYS            (~SPU_ECC_CNTL_I & 12L)
+#define SPU_ECC_WRITE_CORRECTABLE       (1ull << SPU_ECC_CNTL_I_SHIFT)
+#define SPU_ECC_WRITE_UNCORRECTABLE     (3ull << SPU_ECC_CNTL_I_SHIFT)
+#define SPU_ECC_CNTL_D                  (1ull << 5ull)
+#define SPU_ECC_DETECTION_ENABLE        SPU_ECC_CNTL_D
+#define SPU_ECC_DETECTION_DISABLE       (~SPU_ECC_CNTL_D & 32L)
+        u64 spu_ecc_stat_RW;                                    /* 0x1008 */
+#define SPU_ECC_CORRECTED_ERROR         (1ull << 0ul)
+#define SPU_ECC_UNCORRECTED_ERROR       (1ull << 1ul)
+#define SPU_ECC_SCRUB_COMPLETE          (1ull << 2ul)
+#define SPU_ECC_SCRUB_IN_PROGRESS       (1ull << 3ul)
+#define SPU_ECC_INSTRUCTION_ERROR       (1ull << 4ul)
+#define SPU_ECC_DATA_ERROR              (1ull << 5ul)
+#define SPU_ECC_DMA_ERROR               (1ull << 6ul)
+#define SPU_ECC_STATUS_CNT_MASK         (256ull << 8)
+        u64 spu_ecc_addr_RW;                                    /* 0x1010 */
+        u64 spu_err_mask_RW;                                    /* 0x1018 */
+#define SPU_ERR_ILLEGAL_INSTR           (1ull << 0ul)
+#define SPU_ERR_ILLEGAL_CHANNEL         (1ull << 1ul)
+        u8  pad_0x1020_0x1028[0x1028 - 0x1020];                 /* 0x1020 */
+
+        /* SPU Debug-Trace Bus (DTB) Selection Registers */
+        u64 spu_trig0_sel;                                      /* 0x1028 */
+        u64 spu_trig1_sel;                                      /* 0x1030 */
+        u64 spu_trig2_sel;                                      /* 0x1038 */
+        u64 spu_trig3_sel;                                      /* 0x1040 */
+        u64 spu_trace_sel;                                      /* 0x1048 */
+#define spu_trace_sel_mask              0x1f1fLL
+#define spu_trace_sel_bus0_bits         0x1000LL
+#define spu_trace_sel_bus2_bits         0x0010LL
+        u64 spu_event0_sel;                                     /* 0x1050 */
+        u64 spu_event1_sel;                                     /* 0x1058 */
+        u64 spu_event2_sel;                                     /* 0x1060 */
+        u64 spu_event3_sel;                                     /* 0x1068 */
+        u64 spu_trace_cntl;                                     /* 0x1070 */
+} __attribute__ ((aligned(0x2000)));
+
+#endif /* __KERNEL__ */
+#endif
diff --git a/include/asm-powerpc/spu_csa.h b/include/asm-powerpc/spu_csa.h
new file mode 100644
index 000000000000..ba18d7d4dde2
--- /dev/null
+++ b/include/asm-powerpc/spu_csa.h
@@ -0,0 +1,255 @@
+/*
+ * spu_csa.h: Definitions for SPU context save area (CSA).
+ *
+ * (C) Copyright IBM 2005
+ *
+ * Author: Mark Nutter <mnutter@us.ibm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _SPU_CSA_H_
+#define _SPU_CSA_H_
+#ifdef __KERNEL__
+
+/*
+ * Total number of 128-bit registers.
+ */
+#define NR_SPU_GPRS             128
+#define NR_SPU_SPRS             9
+#define NR_SPU_REGS_PAD         7
+#define NR_SPU_SPILL_REGS       144     /* GPRS + SPRS + PAD */
+#define SIZEOF_SPU_SPILL_REGS   NR_SPU_SPILL_REGS * 16
+
+#define SPU_SAVE_COMPLETE       0x3FFB
+#define SPU_RESTORE_COMPLETE    0x3FFC
+
+/*
+ * Definitions for various 'stopped' status conditions,
+ * to be recreated during context restore.
+ */
+#define SPU_STOPPED_STATUS_P    1
+#define SPU_STOPPED_STATUS_I    2
+#define SPU_STOPPED_STATUS_H    3
+#define SPU_STOPPED_STATUS_S    4
+#define SPU_STOPPED_STATUS_S_I  5
+#define SPU_STOPPED_STATUS_S_P  6
+#define SPU_STOPPED_STATUS_P_H  7
+#define SPU_STOPPED_STATUS_P_I  8
+#define SPU_STOPPED_STATUS_R    9
+
+#ifndef  __ASSEMBLY__
+/**
+ * spu_reg128 - generic 128-bit register definition.
+ */
+struct spu_reg128 {
+        u32 slot[4];
+};
+
+/**
+ * struct spu_lscsa - Local Store Context Save Area.
+ * @gprs: Array of saved registers.
+ * @fpcr: Saved floating point status control register.
+ * @decr: Saved decrementer value.
+ * @decr_status: Indicates decrementer run status.
+ * @ppu_mb: Saved PPU mailbox data.
+ * @ppuint_mb: Saved PPU interrupting mailbox data.
+ * @tag_mask: Saved tag group mask.
+ * @event_mask: Saved event mask.
+ * @srr0: Saved SRR0.
+ * @stopped_status: Conditions to be recreated by restore.
+ * @ls: Saved contents of Local Storage Area.
+ *
+ * The LSCSA represents state that is primarily saved and
+ * restored by SPU-side code.
+ */
+struct spu_lscsa {
+        struct spu_reg128 gprs[128];
+        struct spu_reg128 fpcr;
+        struct spu_reg128 decr;
+        struct spu_reg128 decr_status;
+        struct spu_reg128 ppu_mb;
+        struct spu_reg128 ppuint_mb;
+        struct spu_reg128 tag_mask;
+        struct spu_reg128 event_mask;
+        struct spu_reg128 srr0;
+        struct spu_reg128 stopped_status;
+        struct spu_reg128 pad[119];     /* 'ls' must be page-aligned. */
+        unsigned char ls[LS_SIZE];
+};
+
+/*
+ * struct spu_problem_collapsed - condensed problem state area, w/o pads.
+ */
+struct spu_problem_collapsed {
+        u64 spc_mssync_RW;
+        u32 mfc_lsa_W;
+        u32 unused_pad0;
+        u64 mfc_ea_W;
+        union mfc_tag_size_class_cmd mfc_union_W;
+        u32 dma_qstatus_R;
+        u32 dma_querytype_RW;
+        u32 dma_querymask_RW;
+        u32 dma_tagstatus_R;
+        u32 pu_mb_R;
+        u32 spu_mb_W;
+        u32 mb_stat_R;
+        u32 spu_runcntl_RW;
+        u32 spu_status_R;
+        u32 spu_spc_R;
+        u32 spu_npc_RW;
+        u32 signal_notify1;
+        u32 signal_notify2;
+        u32 unused_pad1;
+};
+
+/*
+ * struct spu_priv1_collapsed - condensed privileged 1 area, w/o pads.
+ */
+struct spu_priv1_collapsed {
+        u64 mfc_sr1_RW;
+        u64 mfc_lpid_RW;
+        u64 spu_idr_RW;
+        u64 mfc_vr_RO;
+        u64 spu_vr_RO;
+        u64 int_mask_class0_RW;
+        u64 int_mask_class1_RW;
+        u64 int_mask_class2_RW;
+        u64 int_stat_class0_RW;
+        u64 int_stat_class1_RW;
+        u64 int_stat_class2_RW;
+        u64 int_route_RW;
+        u64 mfc_atomic_flush_RW;
+        u64 resource_allocation_groupID_RW;
+        u64 resource_allocation_enable_RW;
+        u64 mfc_fir_R;
+        u64 mfc_fir_status_or_W;
+        u64 mfc_fir_status_and_W;
+        u64 mfc_fir_mask_R;
+        u64 mfc_fir_mask_or_W;
+        u64 mfc_fir_mask_and_W;
+        u64 mfc_fir_chkstp_enable_RW;
+        u64 smf_sbi_signal_sel;
+        u64 smf_ato_signal_sel;
+        u64 mfc_sdr_RW;
+        u64 tlb_index_hint_RO;
+        u64 tlb_index_W;
+        u64 tlb_vpn_RW;
+        u64 tlb_rpn_RW;
+        u64 tlb_invalidate_entry_W;
+        u64 tlb_invalidate_all_W;
+        u64 smm_hid;
+        u64 mfc_accr_RW;
+        u64 mfc_dsisr_RW;
+        u64 mfc_dar_RW;
+        u64 rmt_index_RW;
+        u64 rmt_data1_RW;
+        u64 mfc_dsir_R;
+        u64 mfc_lsacr_RW;
+        u64 mfc_lscrr_R;
+        u64 mfc_tclass_id_RW;
+        u64 mfc_rm_boundary;
+        u64 smf_dma_signal_sel;
+        u64 smm_signal_sel;
+        u64 mfc_cer_R;
+        u64 pu_ecc_cntl_RW;
+        u64 pu_ecc_stat_RW;
+        u64 spu_ecc_addr_RW;
+        u64 spu_err_mask_RW;
+        u64 spu_trig0_sel;
+        u64 spu_trig1_sel;
+        u64 spu_trig2_sel;
+        u64 spu_trig3_sel;
+        u64 spu_trace_sel;
+        u64 spu_event0_sel;
+        u64 spu_event1_sel;
+        u64 spu_event2_sel;
+        u64 spu_event3_sel;
+        u64 spu_trace_cntl;
+};
+
+/*
+ * struct spu_priv2_collapsed - condensed priviliged 2 area, w/o pads.
+ */
+struct spu_priv2_collapsed {
+        u64 slb_index_W;
+        u64 slb_esid_RW;
+        u64 slb_vsid_RW;
+        u64 slb_invalidate_entry_W;
+        u64 slb_invalidate_all_W;
+        struct mfc_cq_sr spuq[16];
+        struct mfc_cq_sr puq[8];
+        u64 mfc_control_RW;
+        u64 puint_mb_R;
+        u64 spu_privcntl_RW;
+        u64 spu_lslr_RW;
+        u64 spu_chnlcntptr_RW;
+        u64 spu_chnlcnt_RW;
+        u64 spu_chnldata_RW;
+        u64 spu_cfg_RW;
+        u64 spu_tag_status_query_RW;
+        u64 spu_cmd_buf1_RW;
+        u64 spu_cmd_buf2_RW;
+        u64 spu_atomic_status_RW;
+};
+
+/**
+ * struct spu_state
+ * @lscsa: Local Store Context Save Area.
+ * @prob: Collapsed Problem State Area, w/o pads.
+ * @priv1: Collapsed Privileged 1 Area, w/o pads.
+ * @priv2: Collapsed Privileged 2 Area, w/o pads.
+ * @spu_chnlcnt_RW: Array of saved channel counts.
+ * @spu_chnldata_RW: Array of saved channel data.
+ * @suspend_time: Time stamp when decrementer disabled.
+ * @slb_esid_RW: Array of saved SLB esid entries.
+ * @slb_vsid_RW: Array of saved SLB vsid entries.
+ *
+ * Structure representing the whole of the SPU
+ * context save area (CSA).  This struct contains
+ * all of the state necessary to suspend and then
+ * later optionally resume execution of an SPU
+ * context.
+ *
+ * The @lscsa region is by far the largest, and is
+ * allocated separately so that it may either be
+ * pinned or mapped to/from application memory, as
+ * appropriate for the OS environment.
+ */
+struct spu_state {
+        struct spu_lscsa *lscsa;
+        struct spu_problem_collapsed prob;
+        struct spu_priv1_collapsed priv1;
+        struct spu_priv2_collapsed priv2;
+        u64 spu_chnlcnt_RW[32];
+        u64 spu_chnldata_RW[32];
+        u32 spu_mailbox_data[4];
+        u32 pu_mailbox_data[1];
+        unsigned long suspend_time;
+        u64 slb_esid_RW[8];
+        u64 slb_vsid_RW[8];
+        spinlock_t register_lock;
+};
+
+extern void spu_init_csa(struct spu_state *csa);
+extern void spu_fini_csa(struct spu_state *csa);
+extern int spu_save(struct spu_state *prev, struct spu *spu);
+extern int spu_restore(struct spu_state *new, struct spu *spu);
+extern int spu_switch(struct spu_state *prev, struct spu_state *new,
+                      struct spu *spu);
+
+#endif /* __KERNEL__ */
+#endif /* !__ASSEMBLY__ */
+#endif /* _SPU_CSA_H_ */
diff --git a/include/asm-powerpc/synch.h b/include/asm-powerpc/synch.h
index 4660c0394a77..c90d9d9aae72 100644
--- a/include/asm-powerpc/synch.h
+++ b/include/asm-powerpc/synch.h
@@ -1,7 +1,8 @@
 #ifndef _ASM_POWERPC_SYNCH_H 
 #define _ASM_POWERPC_SYNCH_H 
+#ifdef __KERNEL__
 
-#include <linux/config.h>
+#include <linux/stringify.h>
 
 #ifdef __powerpc64__
 #define __SUBARCH_HAS_LWSYNC
@@ -13,20 +14,12 @@
 #    define LWSYNC      sync
 #endif
 
-
-/*
- * Arguably the bitops and *xchg operations don't imply any memory barrier
- * or SMP ordering, but in fact a lot of drivers expect them to imply
- * both, since they do on x86 cpus.
- */
 #ifdef CONFIG_SMP
-#define EIEIO_ON_SMP    "eieio\n"
 #define ISYNC_ON_SMP    "\n\tisync"
-#define SYNC_ON_SMP     __stringify(LWSYNC) "\n"
+#define LWSYNC_ON_SMP   __stringify(LWSYNC) "\n"
 #else
-#define EIEIO_ON_SMP
 #define ISYNC_ON_SMP
-#define SYNC_ON_SMP
+#define LWSYNC_ON_SMP
 #endif
 
 static inline void eieio(void)
@@ -39,13 +32,5 @@ static inline void isync(void)
         __asm__ __volatile__ ("isync" : : : "memory");
 }
 
-#ifdef CONFIG_SMP
-#define eieio_on_smp()  eieio()
-#define isync_on_smp()  isync()
-#else
-#define eieio_on_smp()  __asm__ __volatile__("": : :"memory")
-#define isync_on_smp()  __asm__ __volatile__("": : :"memory")
-#endif
-
+#endif /* __KERNEL__ */
 #endif  /* _ASM_POWERPC_SYNCH_H */
-
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index 5341b75c75cb..d9bf53653b10 100644
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -4,7 +4,6 @@
 #ifndef _ASM_POWERPC_SYSTEM_H
 #define _ASM_POWERPC_SYSTEM_H
 
-#include <linux/config.h>
 #include <linux/kernel.h>
 
 #include <asm/hw_irq.h>
@@ -42,6 +41,7 @@
 #define set_mb(var, value)      do { var = value; mb(); } while (0)
 #define set_wmb(var, value)     do { var = value; wmb(); } while (0)
 
+#ifdef __KERNEL__
 #ifdef CONFIG_SMP
 #define smp_mb()        mb()
 #define smp_rmb()       rmb()
@@ -54,7 +54,6 @@
 #define smp_read_barrier_depends()      do { } while(0)
 #endif /* CONFIG_SMP */
 
-#ifdef __KERNEL__
 struct task_struct;
 struct pt_regs;
 
@@ -134,6 +133,14 @@ extern int fix_alignment(struct pt_regs *);
 extern void cvt_fd(float *from, double *to, struct thread_struct *thread);
 extern void cvt_df(double *from, float *to, struct thread_struct *thread);
 
+#ifndef CONFIG_SMP
+extern void discard_lazy_cpu_state(void);
+#else
+static inline void discard_lazy_cpu_state(void)
+{
+}
+#endif
+
 #ifdef CONFIG_ALTIVEC
 extern void flush_altivec_to_thread(struct task_struct *);
 #else
@@ -176,6 +183,16 @@ struct thread_struct;
 extern struct task_struct *_switch(struct thread_struct *prev,
                                    struct thread_struct *next);
 
+/*
+ * On SMP systems, when the scheduler does migration-cost autodetection,
+ * it needs a way to flush as much of the CPU's caches as possible.
+ *
+ * TODO: fill this in!
+ */
+static inline void sched_cacheflush(void)
+{
+}
+
 extern unsigned int rtas_data;
 extern int mem_init_done;       /* set on boot once kmalloc can be called */
 extern unsigned long memory_limit;
@@ -195,7 +212,7 @@ __xchg_u32(volatile void *p, unsigned long val)
         unsigned long prev;
 
         __asm__ __volatile__(
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:     lwarx   %0,0,%2 \n"
         PPC405_ERR77(0,%2)
 "       stwcx.  %3,0,%2 \n\
@@ -215,7 +232,7 @@ __xchg_u64(volatile void *p, unsigned long val)
         unsigned long prev;
 
         __asm__ __volatile__(
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:     ldarx   %0,0,%2 \n"
         PPC405_ERR77(0,%2)
 "       stdcx.  %3,0,%2 \n\
@@ -270,7 +287,7 @@ __cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
         unsigned int prev;
 
         __asm__ __volatile__ (
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:     lwarx   %0,0,%2         # __cmpxchg_u32\n\
         cmpw    0,%0,%3\n\
         bne-    2f\n"
@@ -294,7 +311,7 @@ __cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new)
         unsigned long prev;
 
         __asm__ __volatile__ (
-        EIEIO_ON_SMP
+        LWSYNC_ON_SMP
 "1:     ldarx   %0,0,%2         # __cmpxchg_u64\n\
         cmpd    0,%0,%3\n\
         bne-    2f\n\
diff --git a/include/asm-powerpc/tce.h b/include/asm-powerpc/tce.h
index 980a094fd5a7..6fa200ad7a7f 100644
--- a/include/asm-powerpc/tce.h
+++ b/include/asm-powerpc/tce.h
@@ -20,6 +20,7 @@
 
 #ifndef _ASM_POWERPC_TCE_H
 #define _ASM_POWERPC_TCE_H
+#ifdef __KERNEL__
 
 /*
  * Tces come in two formats, one for the virtual bus and a different
@@ -61,4 +62,5 @@ union tce_entry {
 };
 
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_TCE_H */
diff --git a/include/asm-powerpc/thread_info.h b/include/asm-powerpc/thread_info.h
index e525f49bd179..67cdaf3ae9fc 100644
--- a/include/asm-powerpc/thread_info.h
+++ b/include/asm-powerpc/thread_info.h
@@ -37,8 +37,7 @@ struct thread_info {
         int             preempt_count;          /* 0 => preemptable,
                                                    <0 => BUG */
         struct restart_block restart_block;
-        /* set by force_successful_syscall_return */
-        unsigned char   syscall_noerror;
+        void *nvgprs_frame;
         /* low level flags - has atomic operations done on it */
         unsigned long   flags ____cacheline_aligned_in_smp;
 };
@@ -90,9 +89,6 @@ struct thread_info {
 
 #endif /* THREAD_SHIFT < PAGE_SHIFT */
 
-#define get_thread_info(ti)     get_task_struct((ti)->task)
-#define put_thread_info(ti)     put_task_struct((ti)->task)
-
 /* how to get the thread information struct from C */
 static inline struct thread_info *current_thread_info(void)
 {
@@ -123,6 +119,10 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_SINGLESTEP          9       /* singlestepping active */
 #define TIF_MEMDIE              10
 #define TIF_SECCOMP             11      /* secure computing */
+#define TIF_RESTOREALL          12      /* Restore all regs (implies NOERROR) */
+#define TIF_SAVE_NVGPRS         13      /* Save r14-r31 in signal frame */
+#define TIF_NOERROR             14      /* Force successful syscall return */
+#define TIF_RESTORE_SIGMASK     15      /* Restore signal mask in do_signal */
 
 /* as above, but as bit values */
 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
@@ -136,10 +136,16 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_SYSCALL_AUDIT      (1<<TIF_SYSCALL_AUDIT)
 #define _TIF_SINGLESTEP         (1<<TIF_SINGLESTEP)
 #define _TIF_SECCOMP            (1<<TIF_SECCOMP)
+#define _TIF_RESTOREALL         (1<<TIF_RESTOREALL)
+#define _TIF_SAVE_NVGPRS        (1<<TIF_SAVE_NVGPRS)
+#define _TIF_NOERROR            (1<<TIF_NOERROR)
+#define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
 #define _TIF_SYSCALL_T_OR_A     (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP)
 
 #define _TIF_USER_WORK_MASK     (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | \
-                                 _TIF_NEED_RESCHED)
+                                 _TIF_NEED_RESCHED | _TIF_RESTOREALL | \
+                                 _TIF_RESTORE_SIGMASK)
+#define _TIF_PERSYSCALL_MASK    (_TIF_RESTOREALL|_TIF_NOERROR|_TIF_SAVE_NVGPRS)
 
 #endif /* __KERNEL__ */
 
diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h
index d9b86a17271b..baddc9ab57ad 100644
--- a/include/asm-powerpc/time.h
+++ b/include/asm-powerpc/time.h
@@ -175,11 +175,10 @@ static inline void set_dec(int val)
         set_dec_cpu6(val);
 #else
 #ifdef CONFIG_PPC_ISERIES
-        struct paca_struct *lpaca = get_paca();
         int cur_dec;
 
-        if (lpaca->lppaca.shared_proc) {
-                lpaca->lppaca.virtual_decr = val;
+        if (get_lppaca()->shared_proc) {
+                get_lppaca()->virtual_decr = val;
                 cur_dec = get_dec();
                 if (cur_dec > val)
                         HvCall_setVirtualDecr();
diff --git a/include/asm-powerpc/tlb.h b/include/asm-powerpc/tlb.h
index 56659f121779..601a53cf96d5 100644
--- a/include/asm-powerpc/tlb.h
+++ b/include/asm-powerpc/tlb.h
@@ -11,6 +11,7 @@
  */
 #ifndef _ASM_POWERPC_TLB_H
 #define _ASM_POWERPC_TLB_H
+#ifdef __KERNEL__
 
 #include <linux/config.h>
 #ifndef __powerpc64__
@@ -67,4 +68,5 @@ static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
 }
 
 #endif
+#endif /* __KERNEL__ */
 #endif /* __ASM_POWERPC_TLB_H */
diff --git a/include/asm-powerpc/topology.h b/include/asm-powerpc/topology.h
index db8095cbe09b..1e19cd00af25 100644
--- a/include/asm-powerpc/topology.h
+++ b/include/asm-powerpc/topology.h
@@ -1,5 +1,6 @@
 #ifndef _ASM_POWERPC_TOPOLOGY_H
 #define _ASM_POWERPC_TOPOLOGY_H
+#ifdef __KERNEL__
 
 #include <linux/config.h>
 
@@ -38,7 +39,6 @@ static inline int node_to_first_cpu(int node)
         .max_interval           = 32,                   \
         .busy_factor            = 32,                   \
         .imbalance_pct          = 125,                  \
-        .cache_hot_time         = (10*1000000),         \
         .cache_nice_tries       = 1,                    \
         .per_cpu_gain           = 100,                  \
         .busy_idx               = 3,                    \
@@ -55,10 +55,15 @@ static inline int node_to_first_cpu(int node)
         .nr_balance_failed      = 0,                    \
 }
 
+extern void __init dump_numa_cpu_topology(void);
+
 #else
 
+static inline void dump_numa_cpu_topology(void) {}
+
 #include <asm-generic/topology.h>
 
 #endif /* CONFIG_NUMA */
 
+#endif /* __KERNEL__ */
 #endif  /* _ASM_POWERPC_TOPOLOGY_H */
diff --git a/include/asm-powerpc/udbg.h b/include/asm-powerpc/udbg.h
index a383383bc4d4..5c4236c342bb 100644
--- a/include/asm-powerpc/udbg.h
+++ b/include/asm-powerpc/udbg.h
@@ -1,5 +1,5 @@
 /*
- * c 2001 PPC 64 Team, IBM Corp
+ * (c) 2001, 2006 IBM Corporation.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -9,12 +9,13 @@
 
 #ifndef _ASM_POWERPC_UDBG_H
 #define _ASM_POWERPC_UDBG_H
+#ifdef __KERNEL__
 
 #include <linux/compiler.h>
 #include <linux/init.h>
 
-extern void (*udbg_putc)(unsigned char c);
-extern unsigned char (*udbg_getc)(void);
+extern void (*udbg_putc)(char c);
+extern int (*udbg_getc)(void);
 extern int (*udbg_getc_poll)(void);
 
 extern void udbg_puts(const char *s);
@@ -23,9 +24,24 @@ extern int udbg_read(char *buf, int buflen);
 
 extern void register_early_udbg_console(void);
 extern void udbg_printf(const char *fmt, ...);
+extern void udbg_progress(char *s, unsigned short hex);
 
-extern void udbg_init_uart(void __iomem *comport, unsigned int speed);
+extern void udbg_init_uart(void __iomem *comport, unsigned int speed,
+                           unsigned int clock);
+extern unsigned int udbg_probe_uart_speed(void __iomem *comport,
+                                          unsigned int clock);
 
 struct device_node;
-extern void udbg_init_scc(struct device_node *np);
+extern void udbg_scc_init(int force_scc);
+extern int udbg_adb_init(int force_btext);
+extern void udbg_adb_init_early(void);
+
+extern void __init udbg_early_init(void);
+extern void __init udbg_init_debug_lpar(void);
+extern void __init udbg_init_pmac_realmode(void);
+extern void __init udbg_init_maple_realmode(void);
+extern void __init udbg_init_iseries(void);
+extern void __init udbg_init_rtas(void);
+
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_UDBG_H */
diff --git a/include/asm-powerpc/unistd.h b/include/asm-powerpc/unistd.h
index 0991dfceef1d..a40cdff21a88 100644
--- a/include/asm-powerpc/unistd.h
+++ b/include/asm-powerpc/unistd.h
@@ -296,8 +296,12 @@
 #define __NR_inotify_init       275
 #define __NR_inotify_add_watch  276
 #define __NR_inotify_rm_watch   277
+#define __NR_spu_run            278
+#define __NR_spu_create         279
+#define __NR_pselect6           280
+#define __NR_ppoll              281
 
-#define __NR_syscalls           278
+#define __NR_syscalls           282
 
 #ifdef __KERNEL__
 #define __NR__exit __NR_exit
@@ -442,11 +446,13 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
 #define __ARCH_WANT_SYS_RT_SIGACTION
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
 #ifdef CONFIG_PPC32
 #define __ARCH_WANT_OLD_STAT
 #endif
 #ifdef CONFIG_PPC64
 #define __ARCH_WANT_COMPAT_SYS_TIME
+#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
 #endif
 
 /*
diff --git a/include/asm-powerpc/vdso_datapage.h b/include/asm-powerpc/vdso_datapage.h
index 411832d5bbdb..7aa92086c3fb 100644
--- a/include/asm-powerpc/vdso_datapage.h
+++ b/include/asm-powerpc/vdso_datapage.h
@@ -1,5 +1,6 @@
 #ifndef _VDSO_DATAPAGE_H
 #define _VDSO_DATAPAGE_H
+#ifdef __KERNEL__
 
 /*
  * Copyright (C) 2002 Peter Bergner <bergner@vnet.ibm.com>, IBM
@@ -105,4 +106,5 @@ extern struct vdso_data *vdso_data;
 
 #endif /* __ASSEMBLY__ */
 
+#endif /* __KERNEL__ */
 #endif /* _SYSTEMCFG_H */
diff --git a/include/asm-powerpc/vio.h b/include/asm-powerpc/vio.h
index e0ccf108277c..0544ece51761 100644
--- a/include/asm-powerpc/vio.h
+++ b/include/asm-powerpc/vio.h
@@ -13,6 +13,7 @@
 
 #ifndef _ASM_POWERPC_VIO_H
 #define _ASM_POWERPC_VIO_H
+#ifdef __KERNEL__
 
 #include <linux/config.h>
 #include <linux/init.h>
@@ -103,4 +104,5 @@ static inline struct vio_dev *to_vio_dev(struct device *dev)
         return container_of(dev, struct vio_dev, dev);
 }
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_VIO_H */