3 files changed, 16 insertions, 3 deletions

diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 4525c784dfd0..528ef183c221 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -57,6 +57,14 @@ enum powerpc_pmc_type {
         PPC_PMC_PA6T = 2,
 };
 
+struct pt_regs;
+
+extern int machine_check_generic(struct pt_regs *regs);
+extern int machine_check_4xx(struct pt_regs *regs);
+extern int machine_check_440A(struct pt_regs *regs);
+extern int machine_check_e500(struct pt_regs *regs);
+extern int machine_check_e200(struct pt_regs *regs);
+
 /* NOTE WELL: Update identify_cpu() if fields are added or removed! */
 struct cpu_spec {
         /* CPU is matched via (PVR & pvr_mask) == pvr_value */
@@ -97,6 +105,11 @@ struct cpu_spec {
 
         /* Name of processor class, for the ELF AT_PLATFORM entry */
         char            *platform;
+
+        /* Processor specific machine check handling. Return negative
+         * if the error is fatal, 1 if it was fully recovered and 0 to
+         * pass up (not CPU originated) */
+        int             (*machine_check)(struct pt_regs *regs);
 };
 
 extern struct cpu_spec          *cur_cpu_spec;
diff --git a/include/asm-powerpc/ptrace.h b/include/asm-powerpc/ptrace.h
index 13fccc5a4119..c662287efd8f 100644
--- a/include/asm-powerpc/ptrace.h
+++ b/include/asm-powerpc/ptrace.h
@@ -106,7 +106,8 @@ extern int ptrace_put_reg(struct task_struct *task, int regno,
  */
 #define FULL_REGS(regs)         (((regs)->trap & 1) == 0)
 #ifndef __powerpc64__
-#define IS_CRITICAL_EXC(regs)   (((regs)->trap & 2) == 0)
+#define IS_CRITICAL_EXC(regs)   (((regs)->trap & 2) != 0)
+#define IS_MCHECK_EXC(regs)     (((regs)->trap & 4) != 0)
 #endif /* ! __powerpc64__ */
 #define TRAP(regs)              ((regs)->trap & ~0xF)
 #ifdef __powerpc64__
diff --git a/include/asm-powerpc/reg_booke.h b/include/asm-powerpc/reg_booke.h
index d3e8dd0fc738..0405ef479814 100644
--- a/include/asm-powerpc/reg_booke.h
+++ b/include/asm-powerpc/reg_booke.h
@@ -218,7 +218,6 @@
 #define CCR1_TCS        0x00000080 /* Timer Clock Select */
 
 /* Bit definitions for the MCSR. */
-#ifdef CONFIG_440A
 #define MCSR_MCS        0x80000000 /* Machine Check Summary */
 #define MCSR_IB         0x40000000 /* Instruction PLB Error */
 #define MCSR_DRB        0x20000000 /* Data Read PLB Error */
@@ -228,7 +227,7 @@
 #define MCSR_DCSP       0x02000000 /* D-Cache Search Parity Error */
 #define MCSR_DCFP       0x01000000 /* D-Cache Flush Parity Error */
 #define MCSR_IMPE       0x00800000 /* Imprecise Machine Check Exception */
-#endif
+
 #ifdef CONFIG_E500
 #define MCSR_MCP        0x80000000UL /* Machine Check Input Pin */
 #define MCSR_ICPERR     0x40000000UL /* I-Cache Parity Error */