diff options
Diffstat (limited to 'include/asm-powerpc/ucc.h')
-rw-r--r-- | include/asm-powerpc/ucc.h | 40 |
1 files changed, 10 insertions, 30 deletions
diff --git a/include/asm-powerpc/ucc.h b/include/asm-powerpc/ucc.h index afe3076bdc03..46b09ba6bead 100644 --- a/include/asm-powerpc/ucc.h +++ b/include/asm-powerpc/ucc.h | |||
@@ -25,58 +25,38 @@ | |||
25 | /* Slow or fast type for UCCs. | 25 | /* Slow or fast type for UCCs. |
26 | */ | 26 | */ |
27 | enum ucc_speed_type { | 27 | enum ucc_speed_type { |
28 | UCC_SPEED_TYPE_FAST, UCC_SPEED_TYPE_SLOW | 28 | UCC_SPEED_TYPE_FAST = UCC_GUEMR_MODE_FAST_RX | UCC_GUEMR_MODE_FAST_TX, |
29 | }; | 29 | UCC_SPEED_TYPE_SLOW = UCC_GUEMR_MODE_SLOW_RX | UCC_GUEMR_MODE_SLOW_TX |
30 | |||
31 | /* Initial UCCs Parameter RAM address relative to: MEM_MAP_BASE (IMMR). | ||
32 | */ | ||
33 | enum ucc_pram_initial_offset { | ||
34 | UCC_PRAM_OFFSET_UCC1 = 0x8400, | ||
35 | UCC_PRAM_OFFSET_UCC2 = 0x8500, | ||
36 | UCC_PRAM_OFFSET_UCC3 = 0x8600, | ||
37 | UCC_PRAM_OFFSET_UCC4 = 0x9000, | ||
38 | UCC_PRAM_OFFSET_UCC5 = 0x8000, | ||
39 | UCC_PRAM_OFFSET_UCC6 = 0x8100, | ||
40 | UCC_PRAM_OFFSET_UCC7 = 0x8200, | ||
41 | UCC_PRAM_OFFSET_UCC8 = 0x8300 | ||
42 | }; | 30 | }; |
43 | 31 | ||
44 | /* ucc_set_type | 32 | /* ucc_set_type |
45 | * Sets UCC to slow or fast mode. | 33 | * Sets UCC to slow or fast mode. |
46 | * | 34 | * |
47 | * ucc_num - (In) number of UCC (0-7). | 35 | * ucc_num - (In) number of UCC (0-7). |
48 | * regs - (In) pointer to registers base for the UCC. | ||
49 | * speed - (In) slow or fast mode for UCC. | 36 | * speed - (In) slow or fast mode for UCC. |
50 | */ | 37 | */ |
51 | int ucc_set_type(int ucc_num, struct ucc_common *regs, | 38 | int ucc_set_type(unsigned int ucc_num, enum ucc_speed_type speed); |
52 | enum ucc_speed_type speed); | ||
53 | |||
54 | /* ucc_init_guemr | ||
55 | * Init the Guemr register. | ||
56 | * | ||
57 | * regs - (In) pointer to registers base for the UCC. | ||
58 | */ | ||
59 | int ucc_init_guemr(struct ucc_common *regs); | ||
60 | 39 | ||
61 | int ucc_set_qe_mux_mii_mng(int ucc_num); | 40 | int ucc_set_qe_mux_mii_mng(unsigned int ucc_num); |
62 | 41 | ||
63 | int ucc_set_qe_mux_rxtx(int ucc_num, enum qe_clock clock, enum comm_dir mode); | 42 | int ucc_set_qe_mux_rxtx(unsigned int ucc_num, enum qe_clock clock, |
43 | enum comm_dir mode); | ||
64 | 44 | ||
65 | int ucc_mux_set_grant_tsa_bkpt(int ucc_num, int set, u32 mask); | 45 | int ucc_mux_set_grant_tsa_bkpt(unsigned int ucc_num, int set, u32 mask); |
66 | 46 | ||
67 | /* QE MUX clock routing for UCC | 47 | /* QE MUX clock routing for UCC |
68 | */ | 48 | */ |
69 | static inline int ucc_set_qe_mux_grant(int ucc_num, int set) | 49 | static inline int ucc_set_qe_mux_grant(unsigned int ucc_num, int set) |
70 | { | 50 | { |
71 | return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_GRANT); | 51 | return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_GRANT); |
72 | } | 52 | } |
73 | 53 | ||
74 | static inline int ucc_set_qe_mux_tsa(int ucc_num, int set) | 54 | static inline int ucc_set_qe_mux_tsa(unsigned int ucc_num, int set) |
75 | { | 55 | { |
76 | return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_TSA); | 56 | return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_TSA); |
77 | } | 57 | } |
78 | 58 | ||
79 | static inline int ucc_set_qe_mux_bkpt(int ucc_num, int set) | 59 | static inline int ucc_set_qe_mux_bkpt(unsigned int ucc_num, int set) |
80 | { | 60 | { |
81 | return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_BKPT); | 61 | return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_BKPT); |
82 | } | 62 | } |