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-rw-r--r--include/asm-powerpc/spu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
index 277460476aec..5ca30e2e2639 100644
--- a/include/asm-powerpc/spu.h
+++ b/include/asm-powerpc/spu.h
@@ -535,11 +535,13 @@ struct spu_priv1 {
535#define CLASS1_STORAGE_FAULT_INTR 0x2L 535#define CLASS1_STORAGE_FAULT_INTR 0x2L
536#define CLASS1_LS_COMPARE_SUSPEND_ON_GET_INTR 0x4L 536#define CLASS1_LS_COMPARE_SUSPEND_ON_GET_INTR 0x4L
537#define CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR 0x8L 537#define CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR 0x8L
538#define CLASS1_INTR_MASK 0xfL
538#define CLASS2_MAILBOX_INTR 0x1L 539#define CLASS2_MAILBOX_INTR 0x1L
539#define CLASS2_SPU_STOP_INTR 0x2L 540#define CLASS2_SPU_STOP_INTR 0x2L
540#define CLASS2_SPU_HALT_INTR 0x4L 541#define CLASS2_SPU_HALT_INTR 0x4L
541#define CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR 0x8L 542#define CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR 0x8L
542#define CLASS2_MAILBOX_THRESHOLD_INTR 0x10L 543#define CLASS2_MAILBOX_THRESHOLD_INTR 0x10L
544#define CLASS2_INTR_MASK 0x1fL
543 u8 pad_0x158_0x180[0x28]; /* 0x158 */ 545 u8 pad_0x158_0x180[0x28]; /* 0x158 */
544 u64 int_route_RW; /* 0x180 */ 546 u64 int_route_RW; /* 0x180 */
545 547