diff options
Diffstat (limited to 'include/asm-powerpc/reg.h')
| -rw-r--r-- | include/asm-powerpc/reg.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h index edc0cfd7f6e2..bbccadfee0d6 100644 --- a/include/asm-powerpc/reg.h +++ b/include/asm-powerpc/reg.h | |||
| @@ -30,6 +30,7 @@ | |||
| 30 | #define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */ | 30 | #define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */ |
| 31 | #define MSR_HV_LG 60 /* Hypervisor state */ | 31 | #define MSR_HV_LG 60 /* Hypervisor state */ |
| 32 | #define MSR_VEC_LG 25 /* Enable AltiVec */ | 32 | #define MSR_VEC_LG 25 /* Enable AltiVec */ |
| 33 | #define MSR_VSX_LG 23 /* Enable VSX */ | ||
| 33 | #define MSR_POW_LG 18 /* Enable Power Management */ | 34 | #define MSR_POW_LG 18 /* Enable Power Management */ |
| 34 | #define MSR_WE_LG 18 /* Wait State Enable */ | 35 | #define MSR_WE_LG 18 /* Wait State Enable */ |
| 35 | #define MSR_TGPR_LG 17 /* TLB Update registers in use */ | 36 | #define MSR_TGPR_LG 17 /* TLB Update registers in use */ |
| @@ -71,6 +72,7 @@ | |||
| 71 | #endif | 72 | #endif |
| 72 | 73 | ||
| 73 | #define MSR_VEC __MASK(MSR_VEC_LG) /* Enable AltiVec */ | 74 | #define MSR_VEC __MASK(MSR_VEC_LG) /* Enable AltiVec */ |
| 75 | #define MSR_VSX __MASK(MSR_VSX_LG) /* Enable VSX */ | ||
| 74 | #define MSR_POW __MASK(MSR_POW_LG) /* Enable Power Management */ | 76 | #define MSR_POW __MASK(MSR_POW_LG) /* Enable Power Management */ |
| 75 | #define MSR_WE __MASK(MSR_WE_LG) /* Wait State Enable */ | 77 | #define MSR_WE __MASK(MSR_WE_LG) /* Wait State Enable */ |
| 76 | #define MSR_TGPR __MASK(MSR_TGPR_LG) /* TLB Update registers in use */ | 78 | #define MSR_TGPR __MASK(MSR_TGPR_LG) /* TLB Update registers in use */ |
| @@ -240,7 +242,7 @@ | |||
| 240 | #define HID0_DAPUEN (1<<8) /* Debug APU enable */ | 242 | #define HID0_DAPUEN (1<<8) /* Debug APU enable */ |
| 241 | #define HID0_SGE (1<<7) /* Store Gathering Enable */ | 243 | #define HID0_SGE (1<<7) /* Store Gathering Enable */ |
| 242 | #define HID0_SIED (1<<7) /* Serial Instr. Execution [Disable] */ | 244 | #define HID0_SIED (1<<7) /* Serial Instr. Execution [Disable] */ |
| 243 | #define HID0_DFCA (1<<6) /* Data Cache Flush Assist */ | 245 | #define HID0_DCFA (1<<6) /* Data Cache Flush Assist */ |
| 244 | #define HID0_LRSTK (1<<4) /* Link register stack - 745x */ | 246 | #define HID0_LRSTK (1<<4) /* Link register stack - 745x */ |
| 245 | #define HID0_BTIC (1<<5) /* Branch Target Instr Cache Enable */ | 247 | #define HID0_BTIC (1<<5) /* Branch Target Instr Cache Enable */ |
| 246 | #define HID0_ABE (1<<3) /* Address Broadcast Enable */ | 248 | #define HID0_ABE (1<<3) /* Address Broadcast Enable */ |
| @@ -732,6 +734,8 @@ | |||
| 732 | " .llong %1\n" \ | 734 | " .llong %1\n" \ |
| 733 | " .llong 97b-98b\n" \ | 735 | " .llong 97b-98b\n" \ |
| 734 | " .llong 99b-98b\n" \ | 736 | " .llong 99b-98b\n" \ |
| 737 | " .llong 0\n" \ | ||
| 738 | " .llong 0\n" \ | ||
| 735 | ".previous" \ | 739 | ".previous" \ |
| 736 | : "=r" (rval) : "i" (CPU_FTR_CELL_TB_BUG)); rval;}) | 740 | : "=r" (rval) : "i" (CPU_FTR_CELL_TB_BUG)); rval;}) |
| 737 | #else | 741 | #else |