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-rw-r--r--include/asm-powerpc/pgtable-ppc32.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h
index 7c97b5a08d08..c08e714d0c42 100644
--- a/include/asm-powerpc/pgtable-ppc32.h
+++ b/include/asm-powerpc/pgtable-ppc32.h
@@ -209,6 +209,13 @@ extern int icache_44x_need_flush;
209 * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 209 * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
210 * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR 210 * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR
211 * 211 *
212 * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional
213 * TLB2 storage attibute fields. Those are:
214 *
215 * TLB2:
216 * 0...10 11 12 13 14 15 16...31
217 * no change WL1 IL1I IL1D IL2I IL2D no change
218 *
212 * There are some constrains and options, to decide mapping software bits 219 * There are some constrains and options, to decide mapping software bits
213 * into TLB entry. 220 * into TLB entry.
214 * 221 *