diff options
Diffstat (limited to 'include/asm-powerpc/lppaca.h')
-rw-r--r-- | include/asm-powerpc/lppaca.h | 23 |
1 files changed, 21 insertions, 2 deletions
diff --git a/include/asm-powerpc/lppaca.h b/include/asm-powerpc/lppaca.h index 4dc514aabfe7..821ea0c512b4 100644 --- a/include/asm-powerpc/lppaca.h +++ b/include/asm-powerpc/lppaca.h | |||
@@ -27,7 +27,9 @@ | |||
27 | // | 27 | // |
28 | // | 28 | // |
29 | //---------------------------------------------------------------------------- | 29 | //---------------------------------------------------------------------------- |
30 | #include <linux/cache.h> | ||
30 | #include <asm/types.h> | 31 | #include <asm/types.h> |
32 | #include <asm/mmu.h> | ||
31 | 33 | ||
32 | /* The Hypervisor barfs if the lppaca crosses a page boundary. A 1k | 34 | /* The Hypervisor barfs if the lppaca crosses a page boundary. A 1k |
33 | * alignment is sufficient to prevent this */ | 35 | * alignment is sufficient to prevent this */ |
@@ -114,7 +116,7 @@ struct lppaca { | |||
114 | 116 | ||
115 | 117 | ||
116 | //============================================================================= | 118 | //============================================================================= |
117 | // CACHE_LINE_3 0x0100 - 0x007F: This line is shared with other processors | 119 | // CACHE_LINE_3 0x0100 - 0x017F: This line is shared with other processors |
118 | //============================================================================= | 120 | //============================================================================= |
119 | // This is the yield_count. An "odd" value (low bit on) means that | 121 | // This is the yield_count. An "odd" value (low bit on) means that |
120 | // the processor is yielded (either because of an OS yield or a PLIC | 122 | // the processor is yielded (either because of an OS yield or a PLIC |
@@ -126,12 +128,29 @@ struct lppaca { | |||
126 | u8 reserved6[124]; // Reserved x04-x7F | 128 | u8 reserved6[124]; // Reserved x04-x7F |
127 | 129 | ||
128 | //============================================================================= | 130 | //============================================================================= |
129 | // CACHE_LINE_4-5 0x0100 - 0x01FF Contains PMC interrupt data | 131 | // CACHE_LINE_4-5 0x0180 - 0x027F Contains PMC interrupt data |
130 | //============================================================================= | 132 | //============================================================================= |
131 | u8 pmc_save_area[256]; // PMC interrupt Area x00-xFF | 133 | u8 pmc_save_area[256]; // PMC interrupt Area x00-xFF |
132 | } __attribute__((__aligned__(0x400))); | 134 | } __attribute__((__aligned__(0x400))); |
133 | 135 | ||
134 | extern struct lppaca lppaca[]; | 136 | extern struct lppaca lppaca[]; |
135 | 137 | ||
138 | /* | ||
139 | * SLB shadow buffer structure as defined in the PAPR. The save_area | ||
140 | * contains adjacent ESID and VSID pairs for each shadowed SLB. The | ||
141 | * ESID is stored in the lower 64bits, then the VSID. | ||
142 | */ | ||
143 | struct slb_shadow { | ||
144 | u32 persistent; // Number of persistent SLBs x00-x03 | ||
145 | u32 buffer_length; // Total shadow buffer length x04-x07 | ||
146 | u64 reserved; // Alignment x08-x0f | ||
147 | struct { | ||
148 | u64 esid; | ||
149 | u64 vsid; | ||
150 | } save_area[SLB_NUM_BOLTED]; // x10-x40 | ||
151 | } ____cacheline_aligned; | ||
152 | |||
153 | extern struct slb_shadow slb_shadow[]; | ||
154 | |||
136 | #endif /* __KERNEL__ */ | 155 | #endif /* __KERNEL__ */ |
137 | #endif /* _ASM_POWERPC_LPPACA_H */ | 156 | #endif /* _ASM_POWERPC_LPPACA_H */ |