diff options
Diffstat (limited to 'include/asm-powerpc/immap_qe.h')
-rw-r--r-- | include/asm-powerpc/immap_qe.h | 35 |
1 files changed, 13 insertions, 22 deletions
diff --git a/include/asm-powerpc/immap_qe.h b/include/asm-powerpc/immap_qe.h index 1020b7fc0129..aba9806b31c9 100644 --- a/include/asm-powerpc/immap_qe.h +++ b/include/asm-powerpc/immap_qe.h | |||
@@ -86,8 +86,9 @@ struct cp_qe { | |||
86 | __be16 ceexe4; /* QE external request 4 event register */ | 86 | __be16 ceexe4; /* QE external request 4 event register */ |
87 | u8 res11[0x2]; | 87 | u8 res11[0x2]; |
88 | __be16 ceexm4; /* QE external request 4 mask register */ | 88 | __be16 ceexm4; /* QE external request 4 mask register */ |
89 | u8 res12[0x2]; | 89 | u8 res12[0x3A]; |
90 | u8 res13[0x280]; | 90 | __be32 ceurnr; /* QE microcode revision number register */ |
91 | u8 res13[0x244]; | ||
91 | } __attribute__ ((packed)); | 92 | } __attribute__ ((packed)); |
92 | 93 | ||
93 | /* QE Multiplexer */ | 94 | /* QE Multiplexer */ |
@@ -96,10 +97,7 @@ struct qe_mux { | |||
96 | __be32 cmxsi1cr_l; /* CMX SI1 clock route low register */ | 97 | __be32 cmxsi1cr_l; /* CMX SI1 clock route low register */ |
97 | __be32 cmxsi1cr_h; /* CMX SI1 clock route high register */ | 98 | __be32 cmxsi1cr_h; /* CMX SI1 clock route high register */ |
98 | __be32 cmxsi1syr; /* CMX SI1 SYNC route register */ | 99 | __be32 cmxsi1syr; /* CMX SI1 SYNC route register */ |
99 | __be32 cmxucr1; /* CMX UCC1, UCC3 clock route register */ | 100 | __be32 cmxucr[4]; /* CMX UCCx clock route registers */ |
100 | __be32 cmxucr2; /* CMX UCC5, UCC7 clock route register */ | ||
101 | __be32 cmxucr3; /* CMX UCC2, UCC4 clock route register */ | ||
102 | __be32 cmxucr4; /* CMX UCC6, UCC8 clock route register */ | ||
103 | __be32 cmxupcr; /* CMX UPC clock route register */ | 101 | __be32 cmxupcr; /* CMX UPC clock route register */ |
104 | u8 res0[0x1C]; | 102 | u8 res0[0x1C]; |
105 | } __attribute__ ((packed)); | 103 | } __attribute__ ((packed)); |
@@ -260,7 +258,6 @@ struct ucc_slow { | |||
260 | __be16 utpt; | 258 | __be16 utpt; |
261 | u8 res4[0x52]; | 259 | u8 res4[0x52]; |
262 | u8 guemr; /* UCC general extended mode register */ | 260 | u8 guemr; /* UCC general extended mode register */ |
263 | u8 res5[0x200 - 0x091]; | ||
264 | } __attribute__ ((packed)); | 261 | } __attribute__ ((packed)); |
265 | 262 | ||
266 | /* QE UCC Fast */ | 263 | /* QE UCC Fast */ |
@@ -293,21 +290,13 @@ struct ucc_fast { | |||
293 | __be32 urtry; /* UCC retry counter register */ | 290 | __be32 urtry; /* UCC retry counter register */ |
294 | u8 res8[0x4C]; | 291 | u8 res8[0x4C]; |
295 | u8 guemr; /* UCC general extended mode register */ | 292 | u8 guemr; /* UCC general extended mode register */ |
296 | u8 res9[0x100 - 0x091]; | ||
297 | } __attribute__ ((packed)); | ||
298 | |||
299 | /* QE UCC */ | ||
300 | struct ucc_common { | ||
301 | u8 res1[0x90]; | ||
302 | u8 guemr; | ||
303 | u8 res2[0x200 - 0x091]; | ||
304 | } __attribute__ ((packed)); | 293 | } __attribute__ ((packed)); |
305 | 294 | ||
306 | struct ucc { | 295 | struct ucc { |
307 | union { | 296 | union { |
308 | struct ucc_slow slow; | 297 | struct ucc_slow slow; |
309 | struct ucc_fast fast; | 298 | struct ucc_fast fast; |
310 | struct ucc_common common; | 299 | u8 res[0x200]; /* UCC blocks are 512 bytes each */ |
311 | }; | 300 | }; |
312 | } __attribute__ ((packed)); | 301 | } __attribute__ ((packed)); |
313 | 302 | ||
@@ -406,7 +395,7 @@ struct dbg { | |||
406 | 395 | ||
407 | /* RISC Special Registers (Trap and Breakpoint) */ | 396 | /* RISC Special Registers (Trap and Breakpoint) */ |
408 | struct rsp { | 397 | struct rsp { |
409 | u8 fixme[0x100]; | 398 | u32 reg[0x40]; /* 64 32-bit registers */ |
410 | } __attribute__ ((packed)); | 399 | } __attribute__ ((packed)); |
411 | 400 | ||
412 | struct qe_immap { | 401 | struct qe_immap { |
@@ -435,11 +424,13 @@ struct qe_immap { | |||
435 | u8 res13[0x600]; | 424 | u8 res13[0x600]; |
436 | struct upc upc2; /* MultiPHY UTOPIA POS Ctrlr 2*/ | 425 | struct upc upc2; /* MultiPHY UTOPIA POS Ctrlr 2*/ |
437 | struct sdma sdma; /* SDMA */ | 426 | struct sdma sdma; /* SDMA */ |
438 | struct dbg dbg; /* Debug Space */ | 427 | struct dbg dbg; /* 0x104080 - 0x1040FF |
439 | struct rsp rsp[0x2]; /* RISC Special Registers | 428 | Debug Space */ |
429 | struct rsp rsp[0x2]; /* 0x104100 - 0x1042FF | ||
430 | RISC Special Registers | ||
440 | (Trap and Breakpoint) */ | 431 | (Trap and Breakpoint) */ |
441 | u8 res14[0x300]; | 432 | u8 res14[0x300]; /* 0x104300 - 0x1045FF */ |
442 | u8 res15[0x3A00]; | 433 | u8 res15[0x3A00]; /* 0x104600 - 0x107FFF */ |
443 | u8 res16[0x8000]; /* 0x108000 - 0x110000 */ | 434 | u8 res16[0x8000]; /* 0x108000 - 0x110000 */ |
444 | u8 muram[0xC000]; /* 0x110000 - 0x11C000 | 435 | u8 muram[0xC000]; /* 0x110000 - 0x11C000 |
445 | Multi-user RAM */ | 436 | Multi-user RAM */ |
@@ -450,7 +441,7 @@ struct qe_immap { | |||
450 | extern struct qe_immap *qe_immr; | 441 | extern struct qe_immap *qe_immr; |
451 | extern phys_addr_t get_qe_base(void); | 442 | extern phys_addr_t get_qe_base(void); |
452 | 443 | ||
453 | static inline unsigned long immrbar_virt_to_phys(volatile void * address) | 444 | static inline unsigned long immrbar_virt_to_phys(void *address) |
454 | { | 445 | { |
455 | if ( ((u32)address >= (u32)qe_immr) && | 446 | if ( ((u32)address >= (u32)qe_immr) && |
456 | ((u32)address < ((u32)qe_immr + QE_IMMAP_SIZE)) ) | 447 | ((u32)address < ((u32)qe_immr + QE_IMMAP_SIZE)) ) |