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-rw-r--r--include/asm-powerpc/elf.h411
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diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h
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+++ b/include/asm-powerpc/elf.h
@@ -0,0 +1,411 @@
1#ifndef _ASM_POWERPC_ELF_H
2#define _ASM_POWERPC_ELF_H
3
4#include <asm/types.h>
5#include <asm/ptrace.h>
6#include <asm/cputable.h>
7#include <asm/auxvec.h>
8#include <asm/page.h>
9
10/* PowerPC relocations defined by the ABIs */
11#define R_PPC_NONE 0
12#define R_PPC_ADDR32 1 /* 32bit absolute address */
13#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
14#define R_PPC_ADDR16 3 /* 16bit absolute address */
15#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
16#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
17#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
18#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
19#define R_PPC_ADDR14_BRTAKEN 8
20#define R_PPC_ADDR14_BRNTAKEN 9
21#define R_PPC_REL24 10 /* PC relative 26 bit */
22#define R_PPC_REL14 11 /* PC relative 16 bit */
23#define R_PPC_REL14_BRTAKEN 12
24#define R_PPC_REL14_BRNTAKEN 13
25#define R_PPC_GOT16 14
26#define R_PPC_GOT16_LO 15
27#define R_PPC_GOT16_HI 16
28#define R_PPC_GOT16_HA 17
29#define R_PPC_PLTREL24 18
30#define R_PPC_COPY 19
31#define R_PPC_GLOB_DAT 20
32#define R_PPC_JMP_SLOT 21
33#define R_PPC_RELATIVE 22
34#define R_PPC_LOCAL24PC 23
35#define R_PPC_UADDR32 24
36#define R_PPC_UADDR16 25
37#define R_PPC_REL32 26
38#define R_PPC_PLT32 27
39#define R_PPC_PLTREL32 28
40#define R_PPC_PLT16_LO 29
41#define R_PPC_PLT16_HI 30
42#define R_PPC_PLT16_HA 31
43#define R_PPC_SDAREL16 32
44#define R_PPC_SECTOFF 33
45#define R_PPC_SECTOFF_LO 34
46#define R_PPC_SECTOFF_HI 35
47#define R_PPC_SECTOFF_HA 36
48
49/* PowerPC relocations defined for the TLS access ABI. */
50#define R_PPC_TLS 67 /* none (sym+add)@tls */
51#define R_PPC_DTPMOD32 68 /* word32 (sym+add)@dtpmod */
52#define R_PPC_TPREL16 69 /* half16* (sym+add)@tprel */
53#define R_PPC_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */
54#define R_PPC_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */
55#define R_PPC_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */
56#define R_PPC_TPREL32 73 /* word32 (sym+add)@tprel */
57#define R_PPC_DTPREL16 74 /* half16* (sym+add)@dtprel */
58#define R_PPC_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */
59#define R_PPC_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */
60#define R_PPC_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */
61#define R_PPC_DTPREL32 78 /* word32 (sym+add)@dtprel */
62#define R_PPC_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */
63#define R_PPC_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */
64#define R_PPC_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */
65#define R_PPC_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */
66#define R_PPC_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */
67#define R_PPC_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */
68#define R_PPC_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */
69#define R_PPC_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */
70#define R_PPC_GOT_TPREL16 87 /* half16* (sym+add)@got@tprel */
71#define R_PPC_GOT_TPREL16_LO 88 /* half16 (sym+add)@got@tprel@l */
72#define R_PPC_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */
73#define R_PPC_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */
74#define R_PPC_GOT_DTPREL16 91 /* half16* (sym+add)@got@dtprel */
75#define R_PPC_GOT_DTPREL16_LO 92 /* half16* (sym+add)@got@dtprel@l */
76#define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */
77#define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */
78
79/* keep this the last entry. */
80#define R_PPC_NUM 95
81
82/*
83 * ELF register definitions..
84 *
85 * This program is free software; you can redistribute it and/or
86 * modify it under the terms of the GNU General Public License
87 * as published by the Free Software Foundation; either version
88 * 2 of the License, or (at your option) any later version.
89 */
90#include <asm/ptrace.h>
91
92#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
93#define ELF_NFPREG 33 /* includes fpscr */
94
95typedef unsigned long elf_greg_t64;
96typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
97
98typedef unsigned int elf_greg_t32;
99typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
100
101/*
102 * ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps.
103 */
104#ifdef __powerpc64__
105# define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */
106# define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */
107# define ELF_GREG_TYPE elf_greg_t64
108#else
109# define ELF_NEVRREG 34 /* includes acc (as 2) */
110# define ELF_NVRREG 33 /* includes vscr */
111# define ELF_GREG_TYPE elf_greg_t32
112# define ELF_ARCH EM_PPC
113# define ELF_CLASS ELFCLASS32
114# define ELF_DATA ELFDATA2MSB
115#endif /* __powerpc64__ */
116
117#ifndef ELF_ARCH
118# define ELF_ARCH EM_PPC64
119# define ELF_CLASS ELFCLASS64
120# define ELF_DATA ELFDATA2MSB
121 typedef elf_greg_t64 elf_greg_t;
122 typedef elf_gregset_t64 elf_gregset_t;
123# define elf_addr_t unsigned long
124#else
125 /* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */
126 typedef elf_greg_t32 elf_greg_t;
127 typedef elf_gregset_t32 elf_gregset_t;
128# define elf_addr_t u32
129#endif /* ELF_ARCH */
130
131/* Floating point registers */
132typedef double elf_fpreg_t;
133typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
134
135/* Altivec registers */
136/*
137 * The entries with indexes 0-31 contain the corresponding vector registers.
138 * The entry with index 32 contains the vscr as the last word (offset 12)
139 * within the quadword. This allows the vscr to be stored as either a
140 * quadword (since it must be copied via a vector register to/from storage)
141 * or as a word.
142 *
143 * 64-bit kernel notes: The entry at index 33 contains the vrsave as the first
144 * word (offset 0) within the quadword.
145 *
146 * This definition of the VMX state is compatible with the current PPC32
147 * ptrace interface. This allows signal handling and ptrace to use the same
148 * structures. This also simplifies the implementation of a bi-arch
149 * (combined (32- and 64-bit) gdb.
150 *
151 * Note that it's _not_ compatible with 32 bits ucontext which stuffs the
152 * vrsave along with vscr and so only uses 33 vectors for the register set
153 */
154typedef __vector128 elf_vrreg_t;
155typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
156#ifdef __powerpc64__
157typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
158#endif
159
160/*
161 * This is used to ensure we don't load something for the wrong architecture.
162 */
163#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
164
165#define USE_ELF_CORE_DUMP
166#define ELF_EXEC_PAGESIZE PAGE_SIZE
167
168/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
169 use of this is to invoke "./ld.so someprog" to test out a new version of
170 the loader. We need to make sure that it is out of the way of the program
171 that it will "exec", and that there is sufficient room for the brk. */
172
173#define ELF_ET_DYN_BASE (0x08000000)
174
175#ifdef __KERNEL__
176
177/* Common routine for both 32-bit and 64-bit processes */
178static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,
179 struct pt_regs *regs)
180{
181 int i;
182 int gprs = sizeof(struct pt_regs)/sizeof(ELF_GREG_TYPE);
183
184 if (gprs > ELF_NGREG)
185 gprs = ELF_NGREG;
186
187 for (i=0; i < gprs; i++)
188 elf_regs[i] = (elf_greg_t)((ELF_GREG_TYPE *)regs)[i];
189
190 memset((char *)(elf_regs) + sizeof(struct pt_regs), 0, \
191 sizeof(elf_gregset_t) - sizeof(struct pt_regs));
192
193}
194#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);
195
196static inline int dump_task_regs(struct task_struct *tsk,
197 elf_gregset_t *elf_regs)
198{
199 struct pt_regs *regs = tsk->thread.regs;
200 if (regs)
201 ppc_elf_core_copy_regs(*elf_regs, regs);
202
203 return 1;
204}
205#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
206
207extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
208#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
209
210#endif /* __KERNEL__ */
211
212/* ELF_HWCAP yields a mask that user programs can use to figure out what
213 instruction set this cpu supports. This could be done in userspace,
214 but it's not easy, and we've already done it here. */
215# define ELF_HWCAP (cur_cpu_spec->cpu_user_features)
216#ifdef __powerpc64__
217# define ELF_PLAT_INIT(_r, load_addr) do { \
218 _r->gpr[2] = load_addr; \
219} while (0)
220#endif /* __powerpc64__ */
221
222/* This yields a string that ld.so will use to load implementation
223 specific libraries for optimization. This is more specific in
224 intent than poking at uname or /proc/cpuinfo.
225
226 For the moment, we have only optimizations for the Intel generations,
227 but that could change... */
228
229#define ELF_PLATFORM (NULL)
230
231#ifdef __KERNEL__
232
233#ifdef __powerpc64__
234# define SET_PERSONALITY(ex, ibcs2) \
235do { \
236 unsigned long new_flags = 0; \
237 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
238 new_flags = _TIF_32BIT; \
239 if ((current_thread_info()->flags & _TIF_32BIT) \
240 != new_flags) \
241 set_thread_flag(TIF_ABI_PENDING); \
242 else \
243 clear_thread_flag(TIF_ABI_PENDING); \
244 if (personality(current->personality) != PER_LINUX32) \
245 set_personality(PER_LINUX); \
246} while (0)
247/*
248 * An executable for which elf_read_implies_exec() returns TRUE will
249 * have the READ_IMPLIES_EXEC personality flag set automatically. This
250 * is only required to work around bugs in old 32bit toolchains. Since
251 * the 64bit ABI has never had these issues dont enable the workaround
252 * even if we have an executable stack.
253 */
254# define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \
255 (exec_stk != EXSTACK_DISABLE_X) : 0)
256#else
257# define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
258#endif /* __powerpc64__ */
259
260#endif /* __KERNEL__ */
261
262extern int dcache_bsize;
263extern int icache_bsize;
264extern int ucache_bsize;
265
266#ifdef __powerpc64__
267struct linux_binprm;
268#define ARCH_HAS_SETUP_ADDITIONAL_PAGES /* vDSO has arch_setup_additional_pages */
269extern int arch_setup_additional_pages(struct linux_binprm *bprm, int executable_stack);
270#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b);
271#else
272#define VDSO_AUX_ENT(a,b)
273#endif /* __powerpc64__ */
274
275/*
276 * The requirements here are:
277 * - keep the final alignment of sp (sp & 0xf)
278 * - make sure the 32-bit value at the first 16 byte aligned position of
279 * AUXV is greater than 16 for glibc compatibility.
280 * AT_IGNOREPPC is used for that.
281 * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
282 * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
283 */
284#define ARCH_DLINFO \
285do { \
286 /* Handle glibc compatibility. */ \
287 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
288 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
289 /* Cache size items */ \
290 NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
291 NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
292 NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
293 VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base) \
294} while (0)
295
296/* PowerPC64 relocations defined by the ABIs */
297#define R_PPC64_NONE R_PPC_NONE
298#define R_PPC64_ADDR32 R_PPC_ADDR32 /* 32bit absolute address. */
299#define R_PPC64_ADDR24 R_PPC_ADDR24 /* 26bit address, word aligned. */
300#define R_PPC64_ADDR16 R_PPC_ADDR16 /* 16bit absolute address. */
301#define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of abs. address. */
302#define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of abs. address. */
303#define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits. */
304#define R_PPC64_ADDR14 R_PPC_ADDR14 /* 16bit address, word aligned. */
305#define R_PPC64_ADDR14_BRTAKEN R_PPC_ADDR14_BRTAKEN
306#define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN
307#define R_PPC64_REL24 R_PPC_REL24 /* PC relative 26 bit, word aligned. */
308#define R_PPC64_REL14 R_PPC_REL14 /* PC relative 16 bit. */
309#define R_PPC64_REL14_BRTAKEN R_PPC_REL14_BRTAKEN
310#define R_PPC64_REL14_BRNTAKEN R_PPC_REL14_BRNTAKEN
311#define R_PPC64_GOT16 R_PPC_GOT16
312#define R_PPC64_GOT16_LO R_PPC_GOT16_LO
313#define R_PPC64_GOT16_HI R_PPC_GOT16_HI
314#define R_PPC64_GOT16_HA R_PPC_GOT16_HA
315
316#define R_PPC64_COPY R_PPC_COPY
317#define R_PPC64_GLOB_DAT R_PPC_GLOB_DAT
318#define R_PPC64_JMP_SLOT R_PPC_JMP_SLOT
319#define R_PPC64_RELATIVE R_PPC_RELATIVE
320
321#define R_PPC64_UADDR32 R_PPC_UADDR32
322#define R_PPC64_UADDR16 R_PPC_UADDR16
323#define R_PPC64_REL32 R_PPC_REL32
324#define R_PPC64_PLT32 R_PPC_PLT32
325#define R_PPC64_PLTREL32 R_PPC_PLTREL32
326#define R_PPC64_PLT16_LO R_PPC_PLT16_LO
327#define R_PPC64_PLT16_HI R_PPC_PLT16_HI
328#define R_PPC64_PLT16_HA R_PPC_PLT16_HA
329
330#define R_PPC64_SECTOFF R_PPC_SECTOFF
331#define R_PPC64_SECTOFF_LO R_PPC_SECTOFF_LO
332#define R_PPC64_SECTOFF_HI R_PPC_SECTOFF_HI
333#define R_PPC64_SECTOFF_HA R_PPC_SECTOFF_HA
334#define R_PPC64_ADDR30 37 /* word30 (S + A - P) >> 2. */
335#define R_PPC64_ADDR64 38 /* doubleword64 S + A. */
336#define R_PPC64_ADDR16_HIGHER 39 /* half16 #higher(S + A). */
337#define R_PPC64_ADDR16_HIGHERA 40 /* half16 #highera(S + A). */
338#define R_PPC64_ADDR16_HIGHEST 41 /* half16 #highest(S + A). */
339#define R_PPC64_ADDR16_HIGHESTA 42 /* half16 #highesta(S + A). */
340#define R_PPC64_UADDR64 43 /* doubleword64 S + A. */
341#define R_PPC64_REL64 44 /* doubleword64 S + A - P. */
342#define R_PPC64_PLT64 45 /* doubleword64 L + A. */
343#define R_PPC64_PLTREL64 46 /* doubleword64 L + A - P. */
344#define R_PPC64_TOC16 47 /* half16* S + A - .TOC. */
345#define R_PPC64_TOC16_LO 48 /* half16 #lo(S + A - .TOC.). */
346#define R_PPC64_TOC16_HI 49 /* half16 #hi(S + A - .TOC.). */
347#define R_PPC64_TOC16_HA 50 /* half16 #ha(S + A - .TOC.). */
348#define R_PPC64_TOC 51 /* doubleword64 .TOC. */
349#define R_PPC64_PLTGOT16 52 /* half16* M + A. */
350#define R_PPC64_PLTGOT16_LO 53 /* half16 #lo(M + A). */
351#define R_PPC64_PLTGOT16_HI 54 /* half16 #hi(M + A). */
352#define R_PPC64_PLTGOT16_HA 55 /* half16 #ha(M + A). */
353
354#define R_PPC64_ADDR16_DS 56 /* half16ds* (S + A) >> 2. */
355#define R_PPC64_ADDR16_LO_DS 57 /* half16ds #lo(S + A) >> 2. */
356#define R_PPC64_GOT16_DS 58 /* half16ds* (G + A) >> 2. */
357#define R_PPC64_GOT16_LO_DS 59 /* half16ds #lo(G + A) >> 2. */
358#define R_PPC64_PLT16_LO_DS 60 /* half16ds #lo(L + A) >> 2. */
359#define R_PPC64_SECTOFF_DS 61 /* half16ds* (R + A) >> 2. */
360#define R_PPC64_SECTOFF_LO_DS 62 /* half16ds #lo(R + A) >> 2. */
361#define R_PPC64_TOC16_DS 63 /* half16ds* (S + A - .TOC.) >> 2. */
362#define R_PPC64_TOC16_LO_DS 64 /* half16ds #lo(S + A - .TOC.) >> 2. */
363#define R_PPC64_PLTGOT16_DS 65 /* half16ds* (M + A) >> 2. */
364#define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds #lo(M + A) >> 2. */
365
366/* PowerPC64 relocations defined for the TLS access ABI. */
367#define R_PPC64_TLS 67 /* none (sym+add)@tls */
368#define R_PPC64_DTPMOD64 68 /* doubleword64 (sym+add)@dtpmod */
369#define R_PPC64_TPREL16 69 /* half16* (sym+add)@tprel */
370#define R_PPC64_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */
371#define R_PPC64_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */
372#define R_PPC64_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */
373#define R_PPC64_TPREL64 73 /* doubleword64 (sym+add)@tprel */
374#define R_PPC64_DTPREL16 74 /* half16* (sym+add)@dtprel */
375#define R_PPC64_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */
376#define R_PPC64_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */
377#define R_PPC64_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */
378#define R_PPC64_DTPREL64 78 /* doubleword64 (sym+add)@dtprel */
379#define R_PPC64_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */
380#define R_PPC64_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */
381#define R_PPC64_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */
382#define R_PPC64_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */
383#define R_PPC64_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */
384#define R_PPC64_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */
385#define R_PPC64_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */
386#define R_PPC64_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */
387#define R_PPC64_GOT_TPREL16_DS 87 /* half16ds* (sym+add)@got@tprel */
388#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
389#define R_PPC64_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */
390#define R_PPC64_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */
391#define R_PPC64_GOT_DTPREL16_DS 91 /* half16ds* (sym+add)@got@dtprel */
392#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
393#define R_PPC64_GOT_DTPREL16_HI 93 /* half16 (sym+add)@got@dtprel@h */
394#define R_PPC64_GOT_DTPREL16_HA 94 /* half16 (sym+add)@got@dtprel@ha */
395#define R_PPC64_TPREL16_DS 95 /* half16ds* (sym+add)@tprel */
396#define R_PPC64_TPREL16_LO_DS 96 /* half16ds (sym+add)@tprel@l */
397#define R_PPC64_TPREL16_HIGHER 97 /* half16 (sym+add)@tprel@higher */
398#define R_PPC64_TPREL16_HIGHERA 98 /* half16 (sym+add)@tprel@highera */
399#define R_PPC64_TPREL16_HIGHEST 99 /* half16 (sym+add)@tprel@highest */
400#define R_PPC64_TPREL16_HIGHESTA 100 /* half16 (sym+add)@tprel@highesta */
401#define R_PPC64_DTPREL16_DS 101 /* half16ds* (sym+add)@dtprel */
402#define R_PPC64_DTPREL16_LO_DS 102 /* half16ds (sym+add)@dtprel@l */
403#define R_PPC64_DTPREL16_HIGHER 103 /* half16 (sym+add)@dtprel@higher */
404#define R_PPC64_DTPREL16_HIGHERA 104 /* half16 (sym+add)@dtprel@highera */
405#define R_PPC64_DTPREL16_HIGHEST 105 /* half16 (sym+add)@dtprel@highest */
406#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16 (sym+add)@dtprel@highesta */
407
408/* Keep this the last entry. */
409#define R_PPC64_NUM 107
410
411#endif /* _ASM_POWERPC_ELF_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-18 23:50:32 -0500