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-rw-r--r--include/asm-powerpc/cputable.h36
1 files changed, 23 insertions, 13 deletions
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index d1cfa3f515ea..ef6ead34a773 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -1,7 +1,6 @@
1#ifndef __ASM_POWERPC_CPUTABLE_H 1#ifndef __ASM_POWERPC_CPUTABLE_H
2#define __ASM_POWERPC_CPUTABLE_H 2#define __ASM_POWERPC_CPUTABLE_H
3 3
4#include <linux/config.h>
5#include <asm/asm-compat.h> 4#include <asm/asm-compat.h>
6 5
7#define PPC_FEATURE_32 0x80000000 6#define PPC_FEATURE_32 0x80000000
@@ -28,10 +27,17 @@
28 * via the mkdefs mechanism. 27 * via the mkdefs mechanism.
29 */ 28 */
30struct cpu_spec; 29struct cpu_spec;
31struct op_powerpc_model;
32 30
33typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec); 31typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec);
34 32
33enum powerpc_oprofile_type {
34 INVALID = 0,
35 RS64 = 1,
36 POWER4 = 2,
37 G4 = 3,
38 BOOKE = 4,
39};
40
35struct cpu_spec { 41struct cpu_spec {
36 /* CPU is matched via (PVR & pvr_mask) == pvr_value */ 42 /* CPU is matched via (PVR & pvr_mask) == pvr_value */
37 unsigned int pvr_mask; 43 unsigned int pvr_mask;
@@ -57,7 +63,7 @@ struct cpu_spec {
57 char *oprofile_cpu_type; 63 char *oprofile_cpu_type;
58 64
59 /* Processor specific oprofile operations */ 65 /* Processor specific oprofile operations */
60 struct op_powerpc_model *oprofile_model; 66 enum powerpc_oprofile_type oprofile_type;
61}; 67};
62 68
63extern struct cpu_spec *cur_cpu_spec; 69extern struct cpu_spec *cur_cpu_spec;
@@ -106,6 +112,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
106#define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0000040000000000) 112#define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0000040000000000)
107#define CPU_FTR_MMCRA_SIHV ASM_CONST(0x0000080000000000) 113#define CPU_FTR_MMCRA_SIHV ASM_CONST(0x0000080000000000)
108#define CPU_FTR_CI_LARGE_PAGE ASM_CONST(0x0000100000000000) 114#define CPU_FTR_CI_LARGE_PAGE ASM_CONST(0x0000100000000000)
115#define CPU_FTR_PAUSE_ZERO ASM_CONST(0x0000200000000000)
109#else 116#else
110/* ensure on 32b processors the flags are available for compiling but 117/* ensure on 32b processors the flags are available for compiling but
111 * don't do anything */ 118 * don't do anything */
@@ -305,12 +312,18 @@ enum {
305 CPU_FTR_MMCRA_SIHV, 312 CPU_FTR_MMCRA_SIHV,
306 CPU_FTRS_CELL = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | 313 CPU_FTRS_CELL = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
307 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | 314 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 |
308 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT, 315 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT |
316 CPU_FTR_CTRL | CPU_FTR_PAUSE_ZERO,
309 CPU_FTRS_COMPATIBLE = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | 317 CPU_FTRS_COMPATIBLE = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
310 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2, 318 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2,
311#endif 319#endif
312 320
313 CPU_FTRS_POSSIBLE = 321 CPU_FTRS_POSSIBLE =
322#ifdef __powerpc64__
323 CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 |
324 CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_CELL |
325 CPU_FTR_CI_LARGE_PAGE |
326#else
314#if CLASSIC_PPC 327#if CLASSIC_PPC
315 CPU_FTRS_PPC601 | CPU_FTRS_603 | CPU_FTRS_604 | CPU_FTRS_740_NOTAU | 328 CPU_FTRS_PPC601 | CPU_FTRS_603 | CPU_FTRS_604 | CPU_FTRS_740_NOTAU |
316 CPU_FTRS_740 | CPU_FTRS_750 | CPU_FTRS_750FX1 | 329 CPU_FTRS_740 | CPU_FTRS_750 | CPU_FTRS_750FX1 |
@@ -344,14 +357,14 @@ enum {
344#ifdef CONFIG_E500 357#ifdef CONFIG_E500
345 CPU_FTRS_E500 | CPU_FTRS_E500_2 | 358 CPU_FTRS_E500 | CPU_FTRS_E500_2 |
346#endif 359#endif
347#ifdef __powerpc64__ 360#endif /* __powerpc64__ */
348 CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 |
349 CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_CELL |
350 CPU_FTR_CI_LARGE_PAGE |
351#endif
352 0, 361 0,
353 362
354 CPU_FTRS_ALWAYS = 363 CPU_FTRS_ALWAYS =
364#ifdef __powerpc64__
365 CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 &
366 CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_CELL &
367#else
355#if CLASSIC_PPC 368#if CLASSIC_PPC
356 CPU_FTRS_PPC601 & CPU_FTRS_603 & CPU_FTRS_604 & CPU_FTRS_740_NOTAU & 369 CPU_FTRS_PPC601 & CPU_FTRS_603 & CPU_FTRS_604 & CPU_FTRS_740_NOTAU &
357 CPU_FTRS_740 & CPU_FTRS_750 & CPU_FTRS_750FX1 & 370 CPU_FTRS_740 & CPU_FTRS_750 & CPU_FTRS_750FX1 &
@@ -385,10 +398,7 @@ enum {
385#ifdef CONFIG_E500 398#ifdef CONFIG_E500
386 CPU_FTRS_E500 & CPU_FTRS_E500_2 & 399 CPU_FTRS_E500 & CPU_FTRS_E500_2 &
387#endif 400#endif
388#ifdef __powerpc64__ 401#endif /* __powerpc64__ */
389 CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 &
390 CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_CELL &
391#endif
392 CPU_FTRS_POSSIBLE, 402 CPU_FTRS_POSSIBLE,
393}; 403};
394 404