diff options
Diffstat (limited to 'include/asm-powerpc/cpm2.h')
-rw-r--r-- | include/asm-powerpc/cpm2.h | 64 |
1 files changed, 0 insertions, 64 deletions
diff --git a/include/asm-powerpc/cpm2.h b/include/asm-powerpc/cpm2.h index f1112c15ef96..b93a53eb55c1 100644 --- a/include/asm-powerpc/cpm2.h +++ b/include/asm-powerpc/cpm2.h | |||
@@ -132,29 +132,6 @@ extern void cpm_setbrg(uint brg, uint rate); | |||
132 | extern void cpm2_fastbrg(uint brg, uint rate, int div16); | 132 | extern void cpm2_fastbrg(uint brg, uint rate, int div16); |
133 | extern void cpm2_reset(void); | 133 | extern void cpm2_reset(void); |
134 | 134 | ||
135 | |||
136 | /* Buffer descriptors used by many of the CPM protocols. | ||
137 | */ | ||
138 | typedef struct cpm_buf_desc { | ||
139 | ushort cbd_sc; /* Status and Control */ | ||
140 | ushort cbd_datlen; /* Data length in buffer */ | ||
141 | uint cbd_bufaddr; /* Buffer address in host memory */ | ||
142 | } cbd_t; | ||
143 | |||
144 | #define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */ | ||
145 | #define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */ | ||
146 | #define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor */ | ||
147 | #define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */ | ||
148 | #define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame */ | ||
149 | #define BD_SC_CM ((ushort)0x0200) /* Continous mode */ | ||
150 | #define BD_SC_ID ((ushort)0x0100) /* Rec'd too many idles */ | ||
151 | #define BD_SC_P ((ushort)0x0100) /* xmt preamble */ | ||
152 | #define BD_SC_BR ((ushort)0x0020) /* Break received */ | ||
153 | #define BD_SC_FR ((ushort)0x0010) /* Framing error */ | ||
154 | #define BD_SC_PR ((ushort)0x0008) /* Parity error */ | ||
155 | #define BD_SC_OV ((ushort)0x0002) /* Overrun */ | ||
156 | #define BD_SC_CD ((ushort)0x0001) /* ?? */ | ||
157 | |||
158 | /* Function code bits, usually generic to devices. | 135 | /* Function code bits, usually generic to devices. |
159 | */ | 136 | */ |
160 | #define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */ | 137 | #define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */ |
@@ -456,43 +433,6 @@ typedef struct scc_enet { | |||
456 | #define SCC_PSMR_NIB22 ((ushort)0x000a) /* Start frame search */ | 433 | #define SCC_PSMR_NIB22 ((ushort)0x000a) /* Start frame search */ |
457 | #define SCC_PSMR_FDE ((ushort)0x0001) /* Full duplex enable */ | 434 | #define SCC_PSMR_FDE ((ushort)0x0001) /* Full duplex enable */ |
458 | 435 | ||
459 | /* Buffer descriptor control/status used by Ethernet receive. | ||
460 | * Common to SCC and FCC. | ||
461 | */ | ||
462 | #define BD_ENET_RX_EMPTY ((ushort)0x8000) | ||
463 | #define BD_ENET_RX_WRAP ((ushort)0x2000) | ||
464 | #define BD_ENET_RX_INTR ((ushort)0x1000) | ||
465 | #define BD_ENET_RX_LAST ((ushort)0x0800) | ||
466 | #define BD_ENET_RX_FIRST ((ushort)0x0400) | ||
467 | #define BD_ENET_RX_MISS ((ushort)0x0100) | ||
468 | #define BD_ENET_RX_BC ((ushort)0x0080) /* FCC Only */ | ||
469 | #define BD_ENET_RX_MC ((ushort)0x0040) /* FCC Only */ | ||
470 | #define BD_ENET_RX_LG ((ushort)0x0020) | ||
471 | #define BD_ENET_RX_NO ((ushort)0x0010) | ||
472 | #define BD_ENET_RX_SH ((ushort)0x0008) | ||
473 | #define BD_ENET_RX_CR ((ushort)0x0004) | ||
474 | #define BD_ENET_RX_OV ((ushort)0x0002) | ||
475 | #define BD_ENET_RX_CL ((ushort)0x0001) | ||
476 | #define BD_ENET_RX_STATS ((ushort)0x01ff) /* All status bits */ | ||
477 | |||
478 | /* Buffer descriptor control/status used by Ethernet transmit. | ||
479 | * Common to SCC and FCC. | ||
480 | */ | ||
481 | #define BD_ENET_TX_READY ((ushort)0x8000) | ||
482 | #define BD_ENET_TX_PAD ((ushort)0x4000) | ||
483 | #define BD_ENET_TX_WRAP ((ushort)0x2000) | ||
484 | #define BD_ENET_TX_INTR ((ushort)0x1000) | ||
485 | #define BD_ENET_TX_LAST ((ushort)0x0800) | ||
486 | #define BD_ENET_TX_TC ((ushort)0x0400) | ||
487 | #define BD_ENET_TX_DEF ((ushort)0x0200) | ||
488 | #define BD_ENET_TX_HB ((ushort)0x0100) | ||
489 | #define BD_ENET_TX_LC ((ushort)0x0080) | ||
490 | #define BD_ENET_TX_RL ((ushort)0x0040) | ||
491 | #define BD_ENET_TX_RCMASK ((ushort)0x003c) | ||
492 | #define BD_ENET_TX_UN ((ushort)0x0002) | ||
493 | #define BD_ENET_TX_CSL ((ushort)0x0001) | ||
494 | #define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */ | ||
495 | |||
496 | /* SCC as UART | 436 | /* SCC as UART |
497 | */ | 437 | */ |
498 | typedef struct scc_uart { | 438 | typedef struct scc_uart { |
@@ -562,8 +502,6 @@ typedef struct scc_trans { | |||
562 | uint st_cmask; /* Constant mask for CRC */ | 502 | uint st_cmask; /* Constant mask for CRC */ |
563 | } scc_trans_t; | 503 | } scc_trans_t; |
564 | 504 | ||
565 | #define BD_SCC_TX_LAST ((ushort)0x0800) | ||
566 | |||
567 | /* How about some FCCs..... | 505 | /* How about some FCCs..... |
568 | */ | 506 | */ |
569 | #define FCC_GFMR_DIAG_NORM ((uint)0x00000000) | 507 | #define FCC_GFMR_DIAG_NORM ((uint)0x00000000) |
@@ -769,8 +707,6 @@ typedef struct spi { | |||
769 | 707 | ||
770 | #define SPI_EB ((u_char)0x10) /* big endian byte order */ | 708 | #define SPI_EB ((u_char)0x10) /* big endian byte order */ |
771 | 709 | ||
772 | #define BD_IIC_START ((ushort)0x0400) | ||
773 | |||
774 | /* IDMA parameter RAM | 710 | /* IDMA parameter RAM |
775 | */ | 711 | */ |
776 | typedef struct idma { | 712 | typedef struct idma { |