diff options
Diffstat (limited to 'include/asm-powerpc/cpm1.h')
-rw-r--r-- | include/asm-powerpc/cpm1.h | 65 |
1 files changed, 0 insertions, 65 deletions
diff --git a/include/asm-powerpc/cpm1.h b/include/asm-powerpc/cpm1.h index 901a00b48959..b2ebd6ac6dae 100644 --- a/include/asm-powerpc/cpm1.h +++ b/include/asm-powerpc/cpm1.h | |||
@@ -91,32 +91,6 @@ extern void cpm_load_patch(cpm8xx_t *cp); | |||
91 | 91 | ||
92 | extern void cpm_reset(void); | 92 | extern void cpm_reset(void); |
93 | 93 | ||
94 | /* Buffer descriptors used by many of the CPM protocols. | ||
95 | */ | ||
96 | typedef struct cpm_buf_desc { | ||
97 | ushort cbd_sc; /* Status and Control */ | ||
98 | ushort cbd_datlen; /* Data length in buffer */ | ||
99 | uint cbd_bufaddr; /* Buffer address in host memory */ | ||
100 | } cbd_t; | ||
101 | |||
102 | #define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */ | ||
103 | #define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */ | ||
104 | #define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor */ | ||
105 | #define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */ | ||
106 | #define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame */ | ||
107 | #define BD_SC_TC ((ushort)0x0400) /* Transmit CRC */ | ||
108 | #define BD_SC_CM ((ushort)0x0200) /* Continous mode */ | ||
109 | #define BD_SC_ID ((ushort)0x0100) /* Rec'd too many idles */ | ||
110 | #define BD_SC_P ((ushort)0x0100) /* xmt preamble */ | ||
111 | #define BD_SC_BR ((ushort)0x0020) /* Break received */ | ||
112 | #define BD_SC_FR ((ushort)0x0010) /* Framing error */ | ||
113 | #define BD_SC_PR ((ushort)0x0008) /* Parity error */ | ||
114 | #define BD_SC_NAK ((ushort)0x0004) /* NAK - did not respond */ | ||
115 | #define BD_SC_OV ((ushort)0x0002) /* Overrun */ | ||
116 | #define BD_SC_UN ((ushort)0x0002) /* Underrun */ | ||
117 | #define BD_SC_CD ((ushort)0x0001) /* ?? */ | ||
118 | #define BD_SC_CL ((ushort)0x0001) /* Collision */ | ||
119 | |||
120 | /* Parameter RAM offsets. | 94 | /* Parameter RAM offsets. |
121 | */ | 95 | */ |
122 | #define PROFF_SCC1 ((uint)0x0000) | 96 | #define PROFF_SCC1 ((uint)0x0000) |
@@ -446,41 +420,6 @@ typedef struct scc_enet { | |||
446 | #define SCC_PSMR_NIB22 ((ushort)0x000a) /* Start frame search */ | 420 | #define SCC_PSMR_NIB22 ((ushort)0x000a) /* Start frame search */ |
447 | #define SCC_PSMR_FDE ((ushort)0x0001) /* Full duplex enable */ | 421 | #define SCC_PSMR_FDE ((ushort)0x0001) /* Full duplex enable */ |
448 | 422 | ||
449 | /* Buffer descriptor control/status used by Ethernet receive. | ||
450 | */ | ||
451 | #define BD_ENET_RX_EMPTY ((ushort)0x8000) | ||
452 | #define BD_ENET_RX_WRAP ((ushort)0x2000) | ||
453 | #define BD_ENET_RX_INTR ((ushort)0x1000) | ||
454 | #define BD_ENET_RX_LAST ((ushort)0x0800) | ||
455 | #define BD_ENET_RX_FIRST ((ushort)0x0400) | ||
456 | #define BD_ENET_RX_MISS ((ushort)0x0100) | ||
457 | #define BD_ENET_RX_LG ((ushort)0x0020) | ||
458 | #define BD_ENET_RX_NO ((ushort)0x0010) | ||
459 | #define BD_ENET_RX_SH ((ushort)0x0008) | ||
460 | #define BD_ENET_RX_CR ((ushort)0x0004) | ||
461 | #define BD_ENET_RX_OV ((ushort)0x0002) | ||
462 | #define BD_ENET_RX_CL ((ushort)0x0001) | ||
463 | #define BD_ENET_RX_BC ((ushort)0x0080) /* DA is Broadcast */ | ||
464 | #define BD_ENET_RX_MC ((ushort)0x0040) /* DA is Multicast */ | ||
465 | #define BD_ENET_RX_STATS ((ushort)0x013f) /* All status bits */ | ||
466 | |||
467 | /* Buffer descriptor control/status used by Ethernet transmit. | ||
468 | */ | ||
469 | #define BD_ENET_TX_READY ((ushort)0x8000) | ||
470 | #define BD_ENET_TX_PAD ((ushort)0x4000) | ||
471 | #define BD_ENET_TX_WRAP ((ushort)0x2000) | ||
472 | #define BD_ENET_TX_INTR ((ushort)0x1000) | ||
473 | #define BD_ENET_TX_LAST ((ushort)0x0800) | ||
474 | #define BD_ENET_TX_TC ((ushort)0x0400) | ||
475 | #define BD_ENET_TX_DEF ((ushort)0x0200) | ||
476 | #define BD_ENET_TX_HB ((ushort)0x0100) | ||
477 | #define BD_ENET_TX_LC ((ushort)0x0080) | ||
478 | #define BD_ENET_TX_RL ((ushort)0x0040) | ||
479 | #define BD_ENET_TX_RCMASK ((ushort)0x003c) | ||
480 | #define BD_ENET_TX_UN ((ushort)0x0002) | ||
481 | #define BD_ENET_TX_CSL ((ushort)0x0001) | ||
482 | #define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */ | ||
483 | |||
484 | /* SCC as UART | 423 | /* SCC as UART |
485 | */ | 424 | */ |
486 | typedef struct scc_uart { | 425 | typedef struct scc_uart { |
@@ -549,8 +488,6 @@ typedef struct scc_trans { | |||
549 | uint st_cmask; /* Constant mask for CRC */ | 488 | uint st_cmask; /* Constant mask for CRC */ |
550 | } scc_trans_t; | 489 | } scc_trans_t; |
551 | 490 | ||
552 | #define BD_SCC_TX_LAST ((ushort)0x0800) | ||
553 | |||
554 | /* IIC parameter RAM. | 491 | /* IIC parameter RAM. |
555 | */ | 492 | */ |
556 | typedef struct iic { | 493 | typedef struct iic { |
@@ -574,8 +511,6 @@ typedef struct iic { | |||
574 | char res2[2]; /* Reserved */ | 511 | char res2[2]; /* Reserved */ |
575 | } iic_t; | 512 | } iic_t; |
576 | 513 | ||
577 | #define BD_IIC_START ((ushort)0x0400) | ||
578 | |||
579 | /* SPI parameter RAM. | 514 | /* SPI parameter RAM. |
580 | */ | 515 | */ |
581 | typedef struct spi { | 516 | typedef struct spi { |