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-rw-r--r--include/asm-parisc/assembly.h20
-rw-r--r--include/asm-parisc/atomic.h12
-rw-r--r--include/asm-parisc/bitops.h24
-rw-r--r--include/asm-parisc/bug.h88
-rw-r--r--include/asm-parisc/cache.h29
-rw-r--r--include/asm-parisc/cacheflush.h179
-rw-r--r--include/asm-parisc/dma-mapping.h2
-rw-r--r--include/asm-parisc/elf.h2
-rw-r--r--include/asm-parisc/hardware.h16
-rw-r--r--include/asm-parisc/io.h4
-rw-r--r--include/asm-parisc/led.h2
-rw-r--r--include/asm-parisc/linkage.h28
-rw-r--r--include/asm-parisc/mmzone.h2
-rw-r--r--include/asm-parisc/module.h2
-rw-r--r--include/asm-parisc/msgbuf.h6
-rw-r--r--include/asm-parisc/page.h8
-rw-r--r--include/asm-parisc/parisc-device.h2
-rw-r--r--include/asm-parisc/pdc.h10
-rw-r--r--include/asm-parisc/pdcpat.h31
-rw-r--r--include/asm-parisc/pgalloc.h10
-rw-r--r--include/asm-parisc/pgtable.h1
-rw-r--r--include/asm-parisc/posix_types.h2
-rw-r--r--include/asm-parisc/processor.h10
-rw-r--r--include/asm-parisc/sembuf.h4
-rw-r--r--include/asm-parisc/shmbuf.h10
-rw-r--r--include/asm-parisc/signal.h2
-rw-r--r--include/asm-parisc/smp.h8
-rw-r--r--include/asm-parisc/spinlock_types.h4
-rw-r--r--include/asm-parisc/statfs.h10
-rw-r--r--include/asm-parisc/system.h2
-rw-r--r--include/asm-parisc/thread_info.h4
-rw-r--r--include/asm-parisc/tlbflush.h30
-rw-r--r--include/asm-parisc/types.h2
-rw-r--r--include/asm-parisc/uaccess.h122
-rw-r--r--include/asm-parisc/unistd.h12
35 files changed, 291 insertions, 409 deletions
diff --git a/include/asm-parisc/assembly.h b/include/asm-parisc/assembly.h
index 5a1e0e8b1c32..5587f0023881 100644
--- a/include/asm-parisc/assembly.h
+++ b/include/asm-parisc/assembly.h
@@ -31,9 +31,13 @@
31#define STREGM std,ma 31#define STREGM std,ma
32#define SHRREG shrd 32#define SHRREG shrd
33#define SHLREG shld 33#define SHLREG shld
34#define ADDIB addib,*
35#define CMPB cmpb,*
36#define ANDCM andcm,*
34#define RP_OFFSET 16 37#define RP_OFFSET 16
35#define FRAME_SIZE 128 38#define FRAME_SIZE 128
36#define CALLEE_REG_FRAME_SIZE 144 39#define CALLEE_REG_FRAME_SIZE 144
40#define ASM_ULONG_INSN .dword
37#else /* CONFIG_64BIT */ 41#else /* CONFIG_64BIT */
38#define LDREG ldw 42#define LDREG ldw
39#define STREG stw 43#define STREG stw
@@ -42,9 +46,13 @@
42#define STREGM stwm 46#define STREGM stwm
43#define SHRREG shr 47#define SHRREG shr
44#define SHLREG shlw 48#define SHLREG shlw
49#define ADDIB addib,
50#define CMPB cmpb,
51#define ANDCM andcm
45#define RP_OFFSET 20 52#define RP_OFFSET 20
46#define FRAME_SIZE 64 53#define FRAME_SIZE 64
47#define CALLEE_REG_FRAME_SIZE 128 54#define CALLEE_REG_FRAME_SIZE 128
55#define ASM_ULONG_INSN .word
48#endif 56#endif
49 57
50#define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE) 58#define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE)
@@ -65,7 +73,7 @@
65 73
66#ifdef __ASSEMBLY__ 74#ifdef __ASSEMBLY__
67 75
68#ifdef __LP64__ 76#ifdef CONFIG_64BIT
69/* the 64-bit pa gnu assembler unfortunately defaults to .level 1.1 or 2.0 so 77/* the 64-bit pa gnu assembler unfortunately defaults to .level 1.1 or 2.0 so
70 * work around that for now... */ 78 * work around that for now... */
71 .level 2.0w 79 .level 2.0w
@@ -156,7 +164,7 @@
156 .endm 164 .endm
157 165
158 .macro loadgp 166 .macro loadgp
159#ifdef __LP64__ 167#ifdef CONFIG_64BIT
160 ldil L%__gp, %r27 168 ldil L%__gp, %r27
161 ldo R%__gp(%r27), %r27 169 ldo R%__gp(%r27), %r27
162#else 170#else
@@ -334,7 +342,7 @@
334 fldd,mb -8(%r30), %fr12 342 fldd,mb -8(%r30), %fr12
335 .endm 343 .endm
336 344
337#ifdef __LP64__ 345#ifdef CONFIG_64BIT
338 .macro callee_save 346 .macro callee_save
339 std,ma %r3, CALLEE_REG_FRAME_SIZE(%r30) 347 std,ma %r3, CALLEE_REG_FRAME_SIZE(%r30)
340 mfctl %cr27, %r3 348 mfctl %cr27, %r3
@@ -377,7 +385,7 @@
377 ldd,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3 385 ldd,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3
378 .endm 386 .endm
379 387
380#else /* ! __LP64__ */ 388#else /* ! CONFIG_64BIT */
381 389
382 .macro callee_save 390 .macro callee_save
383 stw,ma %r3, CALLEE_REG_FRAME_SIZE(%r30) 391 stw,ma %r3, CALLEE_REG_FRAME_SIZE(%r30)
@@ -420,7 +428,7 @@
420 mtctl %r3, %cr27 428 mtctl %r3, %cr27
421 ldw,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3 429 ldw,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3
422 .endm 430 .endm
423#endif /* ! __LP64__ */ 431#endif /* ! CONFIG_64BIT */
424 432
425 .macro save_specials regs 433 .macro save_specials regs
426 434
@@ -441,7 +449,7 @@
441 mtctl %r0, %cr18 449 mtctl %r0, %cr18
442 SAVE_CR (%cr18, PT_IAOQ1(\regs)) 450 SAVE_CR (%cr18, PT_IAOQ1(\regs))
443 451
444#ifdef __LP64__ 452#ifdef CONFIG_64BIT
445 /* cr11 (sar) is a funny one. 5 bits on PA1.1 and 6 bit on PA2.0 453 /* cr11 (sar) is a funny one. 5 bits on PA1.1 and 6 bit on PA2.0
446 * For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only 454 * For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only
447 * reads 5 bits. Use mfctl,w to read all six bits. Otherwise 455 * reads 5 bits. Use mfctl,w to read all six bits. Otherwise
diff --git a/include/asm-parisc/atomic.h b/include/asm-parisc/atomic.h
index 48bf9b8ab8ff..7d57d34fcca8 100644
--- a/include/asm-parisc/atomic.h
+++ b/include/asm-parisc/atomic.h
@@ -58,7 +58,7 @@ extern void __xchg_called_with_bad_pointer(void);
58/* __xchg32/64 defined in arch/parisc/lib/bitops.c */ 58/* __xchg32/64 defined in arch/parisc/lib/bitops.c */
59extern unsigned long __xchg8(char, char *); 59extern unsigned long __xchg8(char, char *);
60extern unsigned long __xchg32(int, int *); 60extern unsigned long __xchg32(int, int *);
61#ifdef __LP64__ 61#ifdef CONFIG_64BIT
62extern unsigned long __xchg64(unsigned long, unsigned long *); 62extern unsigned long __xchg64(unsigned long, unsigned long *);
63#endif 63#endif
64 64
@@ -67,7 +67,7 @@ static __inline__ unsigned long
67__xchg(unsigned long x, __volatile__ void * ptr, int size) 67__xchg(unsigned long x, __volatile__ void * ptr, int size)
68{ 68{
69 switch(size) { 69 switch(size) {
70#ifdef __LP64__ 70#ifdef CONFIG_64BIT
71 case 8: return __xchg64(x,(unsigned long *) ptr); 71 case 8: return __xchg64(x,(unsigned long *) ptr);
72#endif 72#endif
73 case 4: return __xchg32((int) x, (int *) ptr); 73 case 4: return __xchg32((int) x, (int *) ptr);
@@ -81,7 +81,7 @@ __xchg(unsigned long x, __volatile__ void * ptr, int size)
81/* 81/*
82** REVISIT - Abandoned use of LDCW in xchg() for now: 82** REVISIT - Abandoned use of LDCW in xchg() for now:
83** o need to test sizeof(*ptr) to avoid clearing adjacent bytes 83** o need to test sizeof(*ptr) to avoid clearing adjacent bytes
84** o and while we are at it, could __LP64__ code use LDCD too? 84** o and while we are at it, could CONFIG_64BIT code use LDCD too?
85** 85**
86** if (__builtin_constant_p(x) && (x == NULL)) 86** if (__builtin_constant_p(x) && (x == NULL))
87** if (((unsigned long)p & 0xf) == 0) 87** if (((unsigned long)p & 0xf) == 0)
@@ -105,7 +105,7 @@ static __inline__ unsigned long
105__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size) 105__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
106{ 106{
107 switch(size) { 107 switch(size) {
108#ifdef __LP64__ 108#ifdef CONFIG_64BIT
109 case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_); 109 case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_);
110#endif 110#endif
111 case 4: return __cmpxchg_u32((unsigned int *)ptr, (unsigned int) old, (unsigned int) new_); 111 case 4: return __cmpxchg_u32((unsigned int *)ptr, (unsigned int) old, (unsigned int) new_);
@@ -218,7 +218,7 @@ static __inline__ int atomic_read(const atomic_t *v)
218#define smp_mb__before_atomic_inc() smp_mb() 218#define smp_mb__before_atomic_inc() smp_mb()
219#define smp_mb__after_atomic_inc() smp_mb() 219#define smp_mb__after_atomic_inc() smp_mb()
220 220
221#ifdef __LP64__ 221#ifdef CONFIG_64BIT
222 222
223typedef struct { volatile s64 counter; } atomic64_t; 223typedef struct { volatile s64 counter; } atomic64_t;
224 224
@@ -270,7 +270,7 @@ atomic64_read(const atomic64_t *v)
270#define atomic64_dec_and_test(v) (atomic64_dec_return(v) == 0) 270#define atomic64_dec_and_test(v) (atomic64_dec_return(v) == 0)
271#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i),(v)) == 0) 271#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i),(v)) == 0)
272 272
273#endif /* __LP64__ */ 273#endif /* CONFIG_64BIT */
274 274
275#include <asm-generic/atomic.h> 275#include <asm-generic/atomic.h>
276 276
diff --git a/include/asm-parisc/bitops.h b/include/asm-parisc/bitops.h
index 900561922c4c..015cb0d379bd 100644
--- a/include/asm-parisc/bitops.h
+++ b/include/asm-parisc/bitops.h
@@ -60,31 +60,37 @@ static __inline__ void change_bit(int nr, volatile unsigned long * addr)
60static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr) 60static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
61{ 61{
62 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); 62 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
63 unsigned long oldbit; 63 unsigned long old;
64 unsigned long flags; 64 unsigned long flags;
65 int set;
65 66
66 addr += (nr >> SHIFT_PER_LONG); 67 addr += (nr >> SHIFT_PER_LONG);
67 _atomic_spin_lock_irqsave(addr, flags); 68 _atomic_spin_lock_irqsave(addr, flags);
68 oldbit = *addr; 69 old = *addr;
69 *addr = oldbit | mask; 70 set = (old & mask) ? 1 : 0;
71 if (!set)
72 *addr = old | mask;
70 _atomic_spin_unlock_irqrestore(addr, flags); 73 _atomic_spin_unlock_irqrestore(addr, flags);
71 74
72 return (oldbit & mask) ? 1 : 0; 75 return set;
73} 76}
74 77
75static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr) 78static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
76{ 79{
77 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); 80 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
78 unsigned long oldbit; 81 unsigned long old;
79 unsigned long flags; 82 unsigned long flags;
83 int set;
80 84
81 addr += (nr >> SHIFT_PER_LONG); 85 addr += (nr >> SHIFT_PER_LONG);
82 _atomic_spin_lock_irqsave(addr, flags); 86 _atomic_spin_lock_irqsave(addr, flags);
83 oldbit = *addr; 87 old = *addr;
84 *addr = oldbit & ~mask; 88 set = (old & mask) ? 1 : 0;
89 if (set)
90 *addr = old & ~mask;
85 _atomic_spin_unlock_irqrestore(addr, flags); 91 _atomic_spin_unlock_irqrestore(addr, flags);
86 92
87 return (oldbit & mask) ? 1 : 0; 93 return set;
88} 94}
89 95
90static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr) 96static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
@@ -130,7 +136,7 @@ static __inline__ unsigned long __ffs(unsigned long x)
130 unsigned long ret; 136 unsigned long ret;
131 137
132 __asm__( 138 __asm__(
133#ifdef __LP64__ 139#ifdef CONFIG_64BIT
134 " ldi 63,%1\n" 140 " ldi 63,%1\n"
135 " extrd,u,*<> %0,63,32,%%r0\n" 141 " extrd,u,*<> %0,63,32,%%r0\n"
136 " extrd,u,*TR %0,31,32,%0\n" /* move top 32-bits down */ 142 " extrd,u,*TR %0,31,32,%0\n" /* move top 32-bits down */
diff --git a/include/asm-parisc/bug.h b/include/asm-parisc/bug.h
index 695588da41f8..83ba510ed5d8 100644
--- a/include/asm-parisc/bug.h
+++ b/include/asm-parisc/bug.h
@@ -1,14 +1,92 @@
1#ifndef _PARISC_BUG_H 1#ifndef _PARISC_BUG_H
2#define _PARISC_BUG_H 2#define _PARISC_BUG_H
3 3
4/*
5 * Tell the user there is some problem.
6 * The offending file and line are encoded in the __bug_table section.
7 */
8
4#ifdef CONFIG_BUG 9#ifdef CONFIG_BUG
5#define HAVE_ARCH_BUG 10#define HAVE_ARCH_BUG
6#define BUG() do { \ 11#define HAVE_ARCH_WARN_ON
7 printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \ 12
8 dump_stack(); \ 13/* the break instruction is used as BUG() marker. */
9 panic("BUG!"); \ 14#define PARISC_BUG_BREAK_ASM "break 0x1f, 0x1fff"
10} while (0) 15#define PARISC_BUG_BREAK_INSN 0x03ffe01f /* PARISC_BUG_BREAK_ASM */
16
17#if defined(CONFIG_64BIT)
18#define ASM_WORD_INSN ".dword\t"
19#else
20#define ASM_WORD_INSN ".word\t"
21#endif
22
23#ifdef CONFIG_DEBUG_BUGVERBOSE
24#define BUG() \
25 do { \
26 asm volatile("\n" \
27 "1:\t" PARISC_BUG_BREAK_ASM "\n" \
28 "\t.pushsection __bug_table,\"a\"\n" \
29 "2:\t" ASM_WORD_INSN "1b, %c0\n" \
30 "\t.short %c1, %c2\n" \
31 "\t.org 2b+%c3\n" \
32 "\t.popsection" \
33 : : "i" (__FILE__), "i" (__LINE__), \
34 "i" (0), "i" (sizeof(struct bug_entry)) ); \
35 for(;;) ; \
36 } while(0)
37
38#else
39#define BUG() \
40 do { \
41 asm volatile(PARISC_BUG_BREAK_ASM : : ); \
42 for(;;) ; \
43 } while(0)
44#endif
45
46#ifdef CONFIG_DEBUG_BUGVERBOSE
47#define __WARN() \
48 do { \
49 asm volatile("\n" \
50 "1:\t" PARISC_BUG_BREAK_ASM "\n" \
51 "\t.pushsection __bug_table,\"a\"\n" \
52 "2:\t" ASM_WORD_INSN "1b, %c0\n" \
53 "\t.short %c1, %c2\n" \
54 "\t.org 2b+%c3\n" \
55 "\t.popsection" \
56 : : "i" (__FILE__), "i" (__LINE__), \
57 "i" (BUGFLAG_WARNING), \
58 "i" (sizeof(struct bug_entry)) ); \
59 } while(0)
60#else
61#define __WARN() \
62 do { \
63 asm volatile("\n" \
64 "1:\t" PARISC_BUG_BREAK_ASM "\n" \
65 "\t.pushsection __bug_table,\"a\"\n" \
66 "2:\t" ASM_WORD_INSN "1b\n" \
67 "\t.short %c0\n" \
68 "\t.org 2b+%c1\n" \
69 "\t.popsection" \
70 : : "i" (BUGFLAG_WARNING), \
71 "i" (sizeof(struct bug_entry)) ); \
72 } while(0)
73#endif
74
75
76#define WARN_ON(x) ({ \
77 typeof(x) __ret_warn_on = (x); \
78 if (__builtin_constant_p(__ret_warn_on)) { \
79 if (__ret_warn_on) \
80 __WARN(); \
81 } else { \
82 if (unlikely(__ret_warn_on)) \
83 __WARN(); \
84 } \
85 unlikely(__ret_warn_on); \
86})
87
11#endif 88#endif
12 89
13#include <asm-generic/bug.h> 90#include <asm-generic/bug.h>
14#endif 91#endif
92
diff --git a/include/asm-parisc/cache.h b/include/asm-parisc/cache.h
index 7d22fa206fc4..32c2cca74345 100644
--- a/include/asm-parisc/cache.h
+++ b/include/asm-parisc/cache.h
@@ -30,31 +30,11 @@
30 30
31#define __read_mostly __attribute__((__section__(".data.read_mostly"))) 31#define __read_mostly __attribute__((__section__(".data.read_mostly")))
32 32
33extern void flush_data_cache_local(void *); /* flushes local data-cache only */ 33void parisc_cache_init(void); /* initializes cache-flushing */
34extern void flush_instruction_cache_local(void *); /* flushes local code-cache only */ 34void disable_sr_hashing_asm(int); /* low level support for above */
35#ifdef CONFIG_SMP 35void disable_sr_hashing(void); /* turns off space register hashing */
36extern void flush_data_cache(void); /* flushes data-cache only (all processors) */ 36void free_sid(unsigned long);
37extern void flush_instruction_cache(void); /* flushes i-cache only (all processors) */
38#else
39#define flush_data_cache() flush_data_cache_local(NULL)
40#define flush_instruction_cache() flush_instruction_cache_local(NULL)
41#endif
42
43extern void parisc_cache_init(void); /* initializes cache-flushing */
44extern void flush_all_caches(void); /* flush everything (tlb & cache) */
45extern int get_cache_info(char *);
46extern void flush_user_icache_range_asm(unsigned long, unsigned long);
47extern void flush_kernel_icache_range_asm(unsigned long, unsigned long);
48extern void flush_user_dcache_range_asm(unsigned long, unsigned long);
49extern void flush_kernel_dcache_range_asm(unsigned long, unsigned long);
50extern void flush_kernel_dcache_page_asm(void *);
51extern void flush_kernel_icache_page(void *);
52extern void disable_sr_hashing(void); /* turns off space register hashing */
53extern void disable_sr_hashing_asm(int); /* low level support for above */
54extern void free_sid(unsigned long);
55unsigned long alloc_sid(void); 37unsigned long alloc_sid(void);
56extern void flush_user_dcache_page(unsigned long);
57extern void flush_user_icache_page(unsigned long);
58 38
59struct seq_file; 39struct seq_file;
60extern void show_cache_info(struct seq_file *m); 40extern void show_cache_info(struct seq_file *m);
@@ -63,6 +43,7 @@ extern int split_tlb;
63extern int dcache_stride; 43extern int dcache_stride;
64extern int icache_stride; 44extern int icache_stride;
65extern struct pdc_cache_info cache_info; 45extern struct pdc_cache_info cache_info;
46void parisc_setup_cache_timing(void);
66 47
67#define pdtlb(addr) asm volatile("pdtlb 0(%%sr1,%0)" : : "r" (addr)); 48#define pdtlb(addr) asm volatile("pdtlb 0(%%sr1,%0)" : : "r" (addr));
68#define pitlb(addr) asm volatile("pitlb 0(%%sr1,%0)" : : "r" (addr)); 49#define pitlb(addr) asm volatile("pitlb 0(%%sr1,%0)" : : "r" (addr));
diff --git a/include/asm-parisc/cacheflush.h b/include/asm-parisc/cacheflush.h
index a799dd8ef395..2f1e1b05440a 100644
--- a/include/asm-parisc/cacheflush.h
+++ b/include/asm-parisc/cacheflush.h
@@ -2,60 +2,46 @@
2#define _PARISC_CACHEFLUSH_H 2#define _PARISC_CACHEFLUSH_H
3 3
4#include <linux/mm.h> 4#include <linux/mm.h>
5#include <asm/cache.h> /* for flush_user_dcache_range_asm() proto */
6 5
7/* The usual comment is "Caches aren't brain-dead on the <architecture>". 6/* The usual comment is "Caches aren't brain-dead on the <architecture>".
8 * Unfortunately, that doesn't apply to PA-RISC. */ 7 * Unfortunately, that doesn't apply to PA-RISC. */
9 8
10/* Cache flush operations */ 9/* Internal implementation */
11 10void flush_data_cache_local(void *); /* flushes local data-cache only */
11void flush_instruction_cache_local(void *); /* flushes local code-cache only */
12#ifdef CONFIG_SMP 12#ifdef CONFIG_SMP
13#define flush_cache_mm(mm) flush_cache_all() 13void flush_data_cache(void); /* flushes data-cache only (all processors) */
14void flush_instruction_cache(void); /* flushes i-cache only (all processors) */
14#else 15#else
15#define flush_cache_mm(mm) flush_cache_all_local() 16#define flush_data_cache() flush_data_cache_local(NULL)
17#define flush_instruction_cache() flush_instruction_cache_local(NULL)
16#endif 18#endif
17 19
18#define flush_cache_dup_mm(mm) flush_cache_mm(mm) 20#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
19 21
20#define flush_kernel_dcache_range(start,size) \ 22void flush_user_icache_range_asm(unsigned long, unsigned long);
21 flush_kernel_dcache_range_asm((start), (start)+(size)); 23void flush_kernel_icache_range_asm(unsigned long, unsigned long);
24void flush_user_dcache_range_asm(unsigned long, unsigned long);
25void flush_kernel_dcache_range_asm(unsigned long, unsigned long);
26void flush_kernel_dcache_page_asm(void *);
27void flush_kernel_icache_page(void *);
28void flush_user_dcache_page(unsigned long);
29void flush_user_icache_page(unsigned long);
30void flush_user_dcache_range(unsigned long, unsigned long);
31void flush_user_icache_range(unsigned long, unsigned long);
22 32
23extern void flush_cache_all_local(void); 33/* Cache flush operations */
24 34
25static inline void cacheflush_h_tmp_function(void *dummy) 35void flush_cache_all_local(void);
26{ 36void flush_cache_all(void);
27 flush_cache_all_local(); 37void flush_cache_mm(struct mm_struct *mm);
28}
29 38
30static inline void flush_cache_all(void) 39#define flush_kernel_dcache_range(start,size) \
31{ 40 flush_kernel_dcache_range_asm((start), (start)+(size));
32 on_each_cpu(cacheflush_h_tmp_function, NULL, 1, 1);
33}
34 41
35#define flush_cache_vmap(start, end) flush_cache_all() 42#define flush_cache_vmap(start, end) flush_cache_all()
36#define flush_cache_vunmap(start, end) flush_cache_all() 43#define flush_cache_vunmap(start, end) flush_cache_all()
37 44
38extern int parisc_cache_flush_threshold;
39void parisc_setup_cache_timing(void);
40
41static inline void
42flush_user_dcache_range(unsigned long start, unsigned long end)
43{
44 if ((end - start) < parisc_cache_flush_threshold)
45 flush_user_dcache_range_asm(start,end);
46 else
47 flush_data_cache();
48}
49
50static inline void
51flush_user_icache_range(unsigned long start, unsigned long end)
52{
53 if ((end - start) < parisc_cache_flush_threshold)
54 flush_user_icache_range_asm(start,end);
55 else
56 flush_instruction_cache();
57}
58
59extern void flush_dcache_page(struct page *page); 45extern void flush_dcache_page(struct page *page);
60 46
61#define flush_dcache_mmap_lock(mapping) \ 47#define flush_dcache_mmap_lock(mapping) \
@@ -63,9 +49,15 @@ extern void flush_dcache_page(struct page *page);
63#define flush_dcache_mmap_unlock(mapping) \ 49#define flush_dcache_mmap_unlock(mapping) \
64 write_unlock_irq(&(mapping)->tree_lock) 50 write_unlock_irq(&(mapping)->tree_lock)
65 51
66#define flush_icache_page(vma,page) do { flush_kernel_dcache_page(page); flush_kernel_icache_page(page_address(page)); } while (0) 52#define flush_icache_page(vma,page) do { \
53 flush_kernel_dcache_page(page); \
54 flush_kernel_icache_page(page_address(page)); \
55} while (0)
67 56
68#define flush_icache_range(s,e) do { flush_kernel_dcache_range_asm(s,e); flush_kernel_icache_range_asm(s,e); } while (0) 57#define flush_icache_range(s,e) do { \
58 flush_kernel_dcache_range_asm(s,e); \
59 flush_kernel_icache_range_asm(s,e); \
60} while (0)
69 61
70#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ 62#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
71do { \ 63do { \
@@ -80,118 +72,17 @@ do { \
80 memcpy(dst, src, len); \ 72 memcpy(dst, src, len); \
81} while (0) 73} while (0)
82 74
83static inline void flush_cache_range(struct vm_area_struct *vma, 75void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn);
84 unsigned long start, unsigned long end) 76void flush_cache_range(struct vm_area_struct *vma,
85{ 77 unsigned long start, unsigned long end);
86 int sr3;
87
88 if (!vma->vm_mm->context) {
89 BUG();
90 return;
91 }
92
93 sr3 = mfsp(3);
94 if (vma->vm_mm->context == sr3) {
95 flush_user_dcache_range(start,end);
96 flush_user_icache_range(start,end);
97 } else {
98 flush_cache_all();
99 }
100}
101
102/* Simple function to work out if we have an existing address translation
103 * for a user space vma. */
104static inline int translation_exists(struct vm_area_struct *vma,
105 unsigned long addr, unsigned long pfn)
106{
107 pgd_t *pgd = pgd_offset(vma->vm_mm, addr);
108 pmd_t *pmd;
109 pte_t pte;
110
111 if(pgd_none(*pgd))
112 return 0;
113
114 pmd = pmd_offset(pgd, addr);
115 if(pmd_none(*pmd) || pmd_bad(*pmd))
116 return 0;
117
118 /* We cannot take the pte lock here: flush_cache_page is usually
119 * called with pte lock already held. Whereas flush_dcache_page
120 * takes flush_dcache_mmap_lock, which is lower in the hierarchy:
121 * the vma itself is secure, but the pte might come or go racily.
122 */
123 pte = *pte_offset_map(pmd, addr);
124 /* But pte_unmap() does nothing on this architecture */
125
126 /* Filter out coincidental file entries and swap entries */
127 if (!(pte_val(pte) & (_PAGE_FLUSH|_PAGE_PRESENT)))
128 return 0;
129
130 return pte_pfn(pte) == pfn;
131}
132
133/* Private function to flush a page from the cache of a non-current
134 * process. cr25 contains the Page Directory of the current user
135 * process; we're going to hijack both it and the user space %sr3 to
136 * temporarily make the non-current process current. We have to do
137 * this because cache flushing may cause a non-access tlb miss which
138 * the handlers have to fill in from the pgd of the non-current
139 * process. */
140static inline void
141flush_user_cache_page_non_current(struct vm_area_struct *vma,
142 unsigned long vmaddr)
143{
144 /* save the current process space and pgd */
145 unsigned long space = mfsp(3), pgd = mfctl(25);
146
147 /* we don't mind taking interrups since they may not
148 * do anything with user space, but we can't
149 * be preempted here */
150 preempt_disable();
151
152 /* make us current */
153 mtctl(__pa(vma->vm_mm->pgd), 25);
154 mtsp(vma->vm_mm->context, 3);
155
156 flush_user_dcache_page(vmaddr);
157 if(vma->vm_flags & VM_EXEC)
158 flush_user_icache_page(vmaddr);
159
160 /* put the old current process back */
161 mtsp(space, 3);
162 mtctl(pgd, 25);
163 preempt_enable();
164}
165
166static inline void
167__flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr)
168{
169 if (likely(vma->vm_mm->context == mfsp(3))) {
170 flush_user_dcache_page(vmaddr);
171 if (vma->vm_flags & VM_EXEC)
172 flush_user_icache_page(vmaddr);
173 } else {
174 flush_user_cache_page_non_current(vma, vmaddr);
175 }
176}
177
178static inline void
179flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn)
180{
181 BUG_ON(!vma->vm_mm->context);
182
183 if (likely(translation_exists(vma, vmaddr, pfn)))
184 __flush_cache_page(vma, vmaddr);
185
186}
187 78
79#define ARCH_HAS_FLUSH_ANON_PAGE
188static inline void 80static inline void
189flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) 81flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
190{ 82{
191 if (PageAnon(page)) 83 if (PageAnon(page))
192 flush_user_dcache_page(vmaddr); 84 flush_user_dcache_page(vmaddr);
193} 85}
194#define ARCH_HAS_FLUSH_ANON_PAGE
195 86
196#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE 87#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
197void flush_kernel_dcache_page_addr(void *addr); 88void flush_kernel_dcache_page_addr(void *addr);
diff --git a/include/asm-parisc/dma-mapping.h b/include/asm-parisc/dma-mapping.h
index 66f0b408c669..c6c0e9ff6bde 100644
--- a/include/asm-parisc/dma-mapping.h
+++ b/include/asm-parisc/dma-mapping.h
@@ -236,7 +236,7 @@ int ccio_allocate_resource(const struct parisc_device *dev,
236 unsigned long min, unsigned long max, unsigned long align); 236 unsigned long min, unsigned long max, unsigned long align);
237#else /* !CONFIG_IOMMU_CCIO */ 237#else /* !CONFIG_IOMMU_CCIO */
238#define ccio_get_iommu(dev) NULL 238#define ccio_get_iommu(dev) NULL
239#define ccio_request_resource(dev, res) request_resource(&iomem_resource, res) 239#define ccio_request_resource(dev, res) insert_resource(&iomem_resource, res)
240#define ccio_allocate_resource(dev, res, size, min, max, align) \ 240#define ccio_allocate_resource(dev, res, size, min, max, align) \
241 allocate_resource(&iomem_resource, res, size, min, max, \ 241 allocate_resource(&iomem_resource, res, size, min, max, \
242 align, NULL, NULL) 242 align, NULL, NULL)
diff --git a/include/asm-parisc/elf.h b/include/asm-parisc/elf.h
index adea65fc43c9..f628ac7de83d 100644
--- a/include/asm-parisc/elf.h
+++ b/include/asm-parisc/elf.h
@@ -220,7 +220,7 @@ typedef struct elf64_fdesc {
220 * macros, and then it includes fs/binfmt_elf.c to provide an alternate 220 * macros, and then it includes fs/binfmt_elf.c to provide an alternate
221 * elf binary handler for 32 bit binaries (on the 64 bit kernel). 221 * elf binary handler for 32 bit binaries (on the 64 bit kernel).
222 */ 222 */
223#ifdef __LP64__ 223#ifdef CONFIG_64BIT
224#define ELF_CLASS ELFCLASS64 224#define ELF_CLASS ELFCLASS64
225#else 225#else
226#define ELF_CLASS ELFCLASS32 226#define ELF_CLASS ELFCLASS32
diff --git a/include/asm-parisc/hardware.h b/include/asm-parisc/hardware.h
index 106d3f7cd882..76d880dc4bae 100644
--- a/include/asm-parisc/hardware.h
+++ b/include/asm-parisc/hardware.h
@@ -1,19 +1,13 @@
1#ifndef _PARISC_HARDWARE_H 1#ifndef _PARISC_HARDWARE_H
2#define _PARISC_HARDWARE_H 2#define _PARISC_HARDWARE_H
3 3
4#include <linux/mod_devicetable.h>
4#include <asm/pdc.h> 5#include <asm/pdc.h>
5 6
6struct parisc_device_id { 7#define HWTYPE_ANY_ID PA_HWTYPE_ANY_ID
7 unsigned char hw_type; /* 5 bits used */ 8#define HVERSION_ANY_ID PA_HVERSION_ANY_ID
8 unsigned char hversion_rev; /* 4 bits */ 9#define HVERSION_REV_ANY_ID PA_HVERSION_REV_ANY_ID
9 unsigned short hversion; /* 12 bits */ 10#define SVERSION_ANY_ID PA_SVERSION_ANY_ID
10 unsigned int sversion; /* 20 bits */
11};
12
13#define HWTYPE_ANY_ID 0xff
14#define HVERSION_REV_ANY_ID 0xff
15#define HVERSION_ANY_ID 0xffff
16#define SVERSION_ANY_ID 0xffffffffU
17 11
18struct hp_hardware { 12struct hp_hardware {
19 unsigned short hw_type:5; /* HPHW_xxx */ 13 unsigned short hw_type:5; /* HPHW_xxx */
diff --git a/include/asm-parisc/io.h b/include/asm-parisc/io.h
index ca46e7cc0940..c0fed91da3a2 100644
--- a/include/asm-parisc/io.h
+++ b/include/asm-parisc/io.h
@@ -67,7 +67,7 @@ static inline unsigned long long gsc_readq(unsigned long addr)
67{ 67{
68 unsigned long long ret; 68 unsigned long long ret;
69 69
70#ifdef __LP64__ 70#ifdef CONFIG_64BIT
71 __asm__ __volatile__( 71 __asm__ __volatile__(
72 " ldda 0(%1),%0\n" 72 " ldda 0(%1),%0\n"
73 : "=r" (ret) : "r" (addr) ); 73 : "=r" (ret) : "r" (addr) );
@@ -108,7 +108,7 @@ static inline void gsc_writel(unsigned int val, unsigned long addr)
108 108
109static inline void gsc_writeq(unsigned long long val, unsigned long addr) 109static inline void gsc_writeq(unsigned long long val, unsigned long addr)
110{ 110{
111#ifdef __LP64__ 111#ifdef CONFIG_64BIT
112 __asm__ __volatile__( 112 __asm__ __volatile__(
113 " stda %0,0(%1)\n" 113 " stda %0,0(%1)\n"
114 : : "r" (val), "r" (addr) ); 114 : : "r" (val), "r" (addr) );
diff --git a/include/asm-parisc/led.h b/include/asm-parisc/led.h
index efadfd543ec6..c3405ab9d60a 100644
--- a/include/asm-parisc/led.h
+++ b/include/asm-parisc/led.h
@@ -31,7 +31,7 @@ void __init register_led_regions(void);
31 31
32#ifdef CONFIG_CHASSIS_LCD_LED 32#ifdef CONFIG_CHASSIS_LCD_LED
33/* writes a string to the LCD display (if possible on this h/w) */ 33/* writes a string to the LCD display (if possible on this h/w) */
34int lcd_print(char *str); 34int lcd_print(const char *str);
35#else 35#else
36#define lcd_print(str) 36#define lcd_print(str)
37#endif 37#endif
diff --git a/include/asm-parisc/linkage.h b/include/asm-parisc/linkage.h
index 291c2d01c44f..7a09d911b538 100644
--- a/include/asm-parisc/linkage.h
+++ b/include/asm-parisc/linkage.h
@@ -1,6 +1,28 @@
1#ifndef __ASM_LINKAGE_H 1#ifndef __ASM_PARISC_LINKAGE_H
2#define __ASM_LINKAGE_H 2#define __ASM_PARISC_LINKAGE_H
3 3
4/* Nothing to see here... */ 4#ifndef __ALIGN
5#define __ALIGN .align 4
6#define __ALIGN_STR ".align 4"
7#endif
8
9/*
10 * In parisc assembly a semicolon marks a comment while a
11 * exclamation mark is used to seperate independend lines.
12 */
13#define ENTRY(name) \
14 .export name !\
15 ALIGN !\
16name:
5 17
18#ifdef CONFIG_64BIT
19#define ENDPROC(name) \
20 END(name)
21#else
22#define ENDPROC(name) \
23 .type name, @function !\
24 END(name)
6#endif 25#endif
26
27
28#endif /* __ASM_PARISC_LINKAGE_H */
diff --git a/include/asm-parisc/mmzone.h b/include/asm-parisc/mmzone.h
index c87813662d4d..9608d2cf214a 100644
--- a/include/asm-parisc/mmzone.h
+++ b/include/asm-parisc/mmzone.h
@@ -35,7 +35,7 @@ extern struct node_map_data node_data[];
35#define PFNNID_MAP_MAX 512 /* support 512GB */ 35#define PFNNID_MAP_MAX 512 /* support 512GB */
36extern unsigned char pfnnid_map[PFNNID_MAP_MAX]; 36extern unsigned char pfnnid_map[PFNNID_MAP_MAX];
37 37
38#ifndef __LP64__ 38#ifndef CONFIG_64BIT
39#define pfn_is_io(pfn) ((pfn & (0xf0000000UL >> PAGE_SHIFT)) == (0xf0000000UL >> PAGE_SHIFT)) 39#define pfn_is_io(pfn) ((pfn & (0xf0000000UL >> PAGE_SHIFT)) == (0xf0000000UL >> PAGE_SHIFT))
40#else 40#else
41/* io can be 0xf0f0f0f0f0xxxxxx or 0xfffffffff0000000 */ 41/* io can be 0xf0f0f0f0f0xxxxxx or 0xfffffffff0000000 */
diff --git a/include/asm-parisc/module.h b/include/asm-parisc/module.h
index 00f06885f843..c2cb49e934c1 100644
--- a/include/asm-parisc/module.h
+++ b/include/asm-parisc/module.h
@@ -3,7 +3,7 @@
3/* 3/*
4 * This file contains the parisc architecture specific module code. 4 * This file contains the parisc architecture specific module code.
5 */ 5 */
6#ifdef __LP64__ 6#ifdef CONFIG_64BIT
7#define Elf_Shdr Elf64_Shdr 7#define Elf_Shdr Elf64_Shdr
8#define Elf_Sym Elf64_Sym 8#define Elf_Sym Elf64_Sym
9#define Elf_Ehdr Elf64_Ehdr 9#define Elf_Ehdr Elf64_Ehdr
diff --git a/include/asm-parisc/msgbuf.h b/include/asm-parisc/msgbuf.h
index 14ffc2782f1e..fe88f2649418 100644
--- a/include/asm-parisc/msgbuf.h
+++ b/include/asm-parisc/msgbuf.h
@@ -13,15 +13,15 @@
13 13
14struct msqid64_ds { 14struct msqid64_ds {
15 struct ipc64_perm msg_perm; 15 struct ipc64_perm msg_perm;
16#ifndef __LP64__ 16#ifndef CONFIG_64BIT
17 unsigned int __pad1; 17 unsigned int __pad1;
18#endif 18#endif
19 __kernel_time_t msg_stime; /* last msgsnd time */ 19 __kernel_time_t msg_stime; /* last msgsnd time */
20#ifndef __LP64__ 20#ifndef CONFIG_64BIT
21 unsigned int __pad2; 21 unsigned int __pad2;
22#endif 22#endif
23 __kernel_time_t msg_rtime; /* last msgrcv time */ 23 __kernel_time_t msg_rtime; /* last msgrcv time */
24#ifndef __LP64__ 24#ifndef CONFIG_64BIT
25 unsigned int __pad3; 25 unsigned int __pad3;
26#endif 26#endif
27 __kernel_time_t msg_ctime; /* last change time */ 27 __kernel_time_t msg_ctime; /* last change time */
diff --git a/include/asm-parisc/page.h b/include/asm-parisc/page.h
index 3567208191e3..f6bba4c13664 100644
--- a/include/asm-parisc/page.h
+++ b/include/asm-parisc/page.h
@@ -105,7 +105,7 @@ extern int npmem_ranges;
105/* WARNING: The definitions below must match exactly to sizeof(pte_t) 105/* WARNING: The definitions below must match exactly to sizeof(pte_t)
106 * etc 106 * etc
107 */ 107 */
108#ifdef __LP64__ 108#ifdef CONFIG_64BIT
109#define BITS_PER_PTE_ENTRY 3 109#define BITS_PER_PTE_ENTRY 3
110#define BITS_PER_PMD_ENTRY 2 110#define BITS_PER_PMD_ENTRY 2
111#define BITS_PER_PGD_ENTRY 2 111#define BITS_PER_PGD_ENTRY 2
@@ -127,7 +127,11 @@ extern int npmem_ranges;
127/* This governs the relationship between virtual and physical addresses. 127/* This governs the relationship between virtual and physical addresses.
128 * If you alter it, make sure to take care of our various fixed mapping 128 * If you alter it, make sure to take care of our various fixed mapping
129 * segments in fixmap.h */ 129 * segments in fixmap.h */
130#define __PAGE_OFFSET (0x10000000) 130#ifdef CONFIG_64BIT
131#define __PAGE_OFFSET (0x40000000) /* 1GB */
132#else
133#define __PAGE_OFFSET (0x10000000) /* 256MB */
134#endif
131 135
132#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET) 136#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
133 137
diff --git a/include/asm-parisc/parisc-device.h b/include/asm-parisc/parisc-device.h
index e12624d8941d..7aa13f2add7a 100644
--- a/include/asm-parisc/parisc-device.h
+++ b/include/asm-parisc/parisc-device.h
@@ -15,7 +15,7 @@ struct parisc_device {
15 unsigned int num_addrs; /* some devices have additional address ranges. */ 15 unsigned int num_addrs; /* some devices have additional address ranges. */
16 unsigned long *addr; /* which will be stored here */ 16 unsigned long *addr; /* which will be stored here */
17 17
18#ifdef __LP64__ 18#ifdef CONFIG_64BIT
19 /* parms for pdc_pat_cell_module() call */ 19 /* parms for pdc_pat_cell_module() call */
20 unsigned long pcell_loc; /* Physical Cell location */ 20 unsigned long pcell_loc; /* Physical Cell location */
21 unsigned long mod_index; /* PAT specific - Misc Module info */ 21 unsigned long mod_index; /* PAT specific - Misc Module info */
diff --git a/include/asm-parisc/pdc.h b/include/asm-parisc/pdc.h
index 423c2b84b4a0..876fd8116d4a 100644
--- a/include/asm-parisc/pdc.h
+++ b/include/asm-parisc/pdc.h
@@ -341,7 +341,7 @@ struct pdc_model { /* for PDC_MODEL */
341 341
342struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */ 342struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
343 unsigned long 343 unsigned long
344#ifdef __LP64__ 344#ifdef CONFIG_64BIT
345 cc_padW:32, 345 cc_padW:32,
346#endif 346#endif
347 cc_alias: 4, /* alias boundaries for virtual addresses */ 347 cc_alias: 4, /* alias boundaries for virtual addresses */
@@ -357,7 +357,7 @@ struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
357 357
358struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */ 358struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
359 unsigned long tc_pad0:12, /* reserved */ 359 unsigned long tc_pad0:12, /* reserved */
360#ifdef __LP64__ 360#ifdef CONFIG_64BIT
361 tc_padW:32, 361 tc_padW:32,
362#endif 362#endif
363 tc_sh : 2, /* 0 = separate I/D-TLB, else shared I/D-TLB */ 363 tc_sh : 2, /* 0 = separate I/D-TLB, else shared I/D-TLB */
@@ -445,7 +445,7 @@ struct pdc_btlb_info { /* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
445 445
446#endif /* !CONFIG_PA20 */ 446#endif /* !CONFIG_PA20 */
447 447
448#ifdef __LP64__ 448#ifdef CONFIG_64BIT
449struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */ 449struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
450 unsigned long entries_returned; 450 unsigned long entries_returned;
451 unsigned long entries_total; 451 unsigned long entries_total;
@@ -456,7 +456,7 @@ struct pdc_memory_table { /* PDC_MEM/PDC_MEM_TABLE (arguments) */
456 unsigned int pages; 456 unsigned int pages;
457 unsigned int reserved; 457 unsigned int reserved;
458}; 458};
459#endif /* __LP64__ */ 459#endif /* CONFIG_64BIT */
460 460
461struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */ 461struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
462 unsigned long mod_addr; 462 unsigned long mod_addr;
@@ -752,7 +752,7 @@ int pdc_get_initiator(struct hardware_path *, struct pdc_initiator *);
752int pdc_tod_read(struct pdc_tod *tod); 752int pdc_tod_read(struct pdc_tod *tod);
753int pdc_tod_set(unsigned long sec, unsigned long usec); 753int pdc_tod_set(unsigned long sec, unsigned long usec);
754 754
755#ifdef __LP64__ 755#ifdef CONFIG_64BIT
756int pdc_mem_mem_table(struct pdc_memory_table_raddr *r_addr, 756int pdc_mem_mem_table(struct pdc_memory_table_raddr *r_addr,
757 struct pdc_memory_table *tbl, unsigned long entries); 757 struct pdc_memory_table *tbl, unsigned long entries);
758#endif 758#endif
diff --git a/include/asm-parisc/pdcpat.h b/include/asm-parisc/pdcpat.h
index b4b34c0e8c1a..47539f117958 100644
--- a/include/asm-parisc/pdcpat.h
+++ b/include/asm-parisc/pdcpat.h
@@ -250,7 +250,7 @@ struct pdc_pat_pd_addr_map_entry {
250#define PAT_GET_ENTITY(value) (((value) >> 56) & 0xffUL) 250#define PAT_GET_ENTITY(value) (((value) >> 56) & 0xffUL)
251#define PAT_GET_DVI(value) (((value) >> 48) & 0xffUL) 251#define PAT_GET_DVI(value) (((value) >> 48) & 0xffUL)
252#define PAT_GET_IOC(value) (((value) >> 40) & 0xffUL) 252#define PAT_GET_IOC(value) (((value) >> 40) & 0xffUL)
253#define PAT_GET_MOD_PAGES(value)(((value) & 0xffffffUL) 253#define PAT_GET_MOD_PAGES(value) ((value) & 0xffffffUL)
254 254
255 255
256/* 256/*
@@ -303,35 +303,6 @@ extern int pdc_pat_io_pci_cfg_write(unsigned long pci_addr, int pci_size, u32 va
303*/ 303*/
304extern int pdc_pat; /* arch/parisc/kernel/inventory.c */ 304extern int pdc_pat; /* arch/parisc/kernel/inventory.c */
305 305
306/********************************************************************
307* PDC_PAT_CELL[Return Cell Module] memaddr[0] conf_base_addr
308* ----------------------------------------------------------
309* Bit 0 to 51 - conf_base_addr
310* Bit 52 to 62 - reserved
311* Bit 63 - endianess bit
312********************************************************************/
313#define PAT_GET_CBA(value) ((value) & 0xfffffffffffff000UL)
314
315/********************************************************************
316* PDC_PAT_CELL[Return Cell Module] memaddr[1] mod_info
317* ----------------------------------------------------
318* Bit 0 to 7 - entity type
319* 0 = central agent, 1 = processor,
320* 2 = memory controller, 3 = system bus adapter,
321* 4 = local bus adapter, 5 = processor bus converter,
322* 6 = crossbar fabric connect, 7 = fabric interconnect,
323* 8 to 254 reserved, 255 = unknown.
324* Bit 8 to 15 - DVI
325* Bit 16 to 23 - IOC functions
326* Bit 24 to 39 - reserved
327* Bit 40 to 63 - mod_pages
328* number of 4K pages a module occupies starting at conf_base_addr
329********************************************************************/
330#define PAT_GET_ENTITY(value) (((value) >> 56) & 0xffUL)
331#define PAT_GET_DVI(value) (((value) >> 48) & 0xffUL)
332#define PAT_GET_IOC(value) (((value) >> 40) & 0xffUL)
333#define PAT_GET_MOD_PAGES(value)(((value) & 0xffffffUL)
334
335#endif /* __ASSEMBLY__ */ 306#endif /* __ASSEMBLY__ */
336 307
337#endif /* ! __PARISC_PATPDC_H */ 308#endif /* ! __PARISC_PATPDC_H */
diff --git a/include/asm-parisc/pgalloc.h b/include/asm-parisc/pgalloc.h
index 3122fad38a1b..1af1a41e0723 100644
--- a/include/asm-parisc/pgalloc.h
+++ b/include/asm-parisc/pgalloc.h
@@ -14,7 +14,7 @@
14 * Here (for 64 bit kernels) we implement a Hybrid L2/L3 scheme: we 14 * Here (for 64 bit kernels) we implement a Hybrid L2/L3 scheme: we
15 * allocate the first pmd adjacent to the pgd. This means that we can 15 * allocate the first pmd adjacent to the pgd. This means that we can
16 * subtract a constant offset to get to it. The pmd and pgd sizes are 16 * subtract a constant offset to get to it. The pmd and pgd sizes are
17 * arranged so that a single pmd covers 4GB (giving a full LP64 17 * arranged so that a single pmd covers 4GB (giving a full 64-bit
18 * process access to 8TB) so our lookups are effectively L2 for the 18 * process access to 8TB) so our lookups are effectively L2 for the
19 * first 4GB of the kernel (i.e. for all ILP32 processes and all the 19 * first 4GB of the kernel (i.e. for all ILP32 processes and all the
20 * kernel for machines with under 4GB of memory) */ 20 * kernel for machines with under 4GB of memory) */
@@ -26,7 +26,7 @@ static inline pgd_t *pgd_alloc(struct mm_struct *mm)
26 26
27 if (likely(pgd != NULL)) { 27 if (likely(pgd != NULL)) {
28 memset(pgd, 0, PAGE_SIZE<<PGD_ALLOC_ORDER); 28 memset(pgd, 0, PAGE_SIZE<<PGD_ALLOC_ORDER);
29#ifdef __LP64__ 29#ifdef CONFIG_64BIT
30 actual_pgd += PTRS_PER_PGD; 30 actual_pgd += PTRS_PER_PGD;
31 /* Populate first pmd with allocated memory. We mark it 31 /* Populate first pmd with allocated memory. We mark it
32 * with PxD_FLAG_ATTACHED as a signal to the system that this 32 * with PxD_FLAG_ATTACHED as a signal to the system that this
@@ -45,7 +45,7 @@ static inline pgd_t *pgd_alloc(struct mm_struct *mm)
45 45
46static inline void pgd_free(pgd_t *pgd) 46static inline void pgd_free(pgd_t *pgd)
47{ 47{
48#ifdef __LP64__ 48#ifdef CONFIG_64BIT
49 pgd -= PTRS_PER_PGD; 49 pgd -= PTRS_PER_PGD;
50#endif 50#endif
51 free_pages((unsigned long)pgd, PGD_ALLOC_ORDER); 51 free_pages((unsigned long)pgd, PGD_ALLOC_ORDER);
@@ -72,7 +72,7 @@ static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
72 72
73static inline void pmd_free(pmd_t *pmd) 73static inline void pmd_free(pmd_t *pmd)
74{ 74{
75#ifdef __LP64__ 75#ifdef CONFIG_64BIT
76 if(pmd_flag(*pmd) & PxD_FLAG_ATTACHED) 76 if(pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
77 /* This is the permanent pmd attached to the pgd; 77 /* This is the permanent pmd attached to the pgd;
78 * cannot free it */ 78 * cannot free it */
@@ -99,7 +99,7 @@ static inline void pmd_free(pmd_t *pmd)
99static inline void 99static inline void
100pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *pte) 100pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *pte)
101{ 101{
102#ifdef __LP64__ 102#ifdef CONFIG_64BIT
103 /* preserve the gateway marker if this is the beginning of 103 /* preserve the gateway marker if this is the beginning of
104 * the permanent pmd */ 104 * the permanent pmd */
105 if(pmd_flag(*pmd) & PxD_FLAG_ATTACHED) 105 if(pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
diff --git a/include/asm-parisc/pgtable.h b/include/asm-parisc/pgtable.h
index c0b61e0d1497..d7e1b10da5c6 100644
--- a/include/asm-parisc/pgtable.h
+++ b/include/asm-parisc/pgtable.h
@@ -10,7 +10,6 @@
10 * we simulate an x86-style page table for the linux mm code 10 * we simulate an x86-style page table for the linux mm code
11 */ 11 */
12 12
13#include <linux/spinlock.h>
14#include <linux/mm.h> /* for vm_area_struct */ 13#include <linux/mm.h> /* for vm_area_struct */
15#include <asm/processor.h> 14#include <asm/processor.h>
16#include <asm/cache.h> 15#include <asm/cache.h>
diff --git a/include/asm-parisc/posix_types.h b/include/asm-parisc/posix_types.h
index 9b19970de619..b634e3c47fdc 100644
--- a/include/asm-parisc/posix_types.h
+++ b/include/asm-parisc/posix_types.h
@@ -20,7 +20,7 @@ typedef int __kernel_timer_t;
20typedef int __kernel_clockid_t; 20typedef int __kernel_clockid_t;
21typedef int __kernel_daddr_t; 21typedef int __kernel_daddr_t;
22/* Note these change from narrow to wide kernels */ 22/* Note these change from narrow to wide kernels */
23#ifdef __LP64__ 23#ifdef CONFIG_64BIT
24typedef unsigned long __kernel_size_t; 24typedef unsigned long __kernel_size_t;
25typedef long __kernel_ssize_t; 25typedef long __kernel_ssize_t;
26typedef long __kernel_ptrdiff_t; 26typedef long __kernel_ptrdiff_t;
diff --git a/include/asm-parisc/processor.h b/include/asm-parisc/processor.h
index fd7866dc8c83..d2f396721d3e 100644
--- a/include/asm-parisc/processor.h
+++ b/include/asm-parisc/processor.h
@@ -9,13 +9,10 @@
9#define __ASM_PARISC_PROCESSOR_H 9#define __ASM_PARISC_PROCESSOR_H
10 10
11#ifndef __ASSEMBLY__ 11#ifndef __ASSEMBLY__
12#include <asm/prefetch.h> /* lockdep.h needs <linux/prefetch.h> */
13
14#include <linux/threads.h> 12#include <linux/threads.h>
15#include <linux/spinlock_types.h>
16 13
14#include <asm/prefetch.h>
17#include <asm/hardware.h> 15#include <asm/hardware.h>
18#include <asm/page.h>
19#include <asm/pdc.h> 16#include <asm/pdc.h>
20#include <asm/ptrace.h> 17#include <asm/ptrace.h>
21#include <asm/types.h> 18#include <asm/types.h>
@@ -41,7 +38,7 @@
41#define DEFAULT_TASK_SIZE32 (0xFFF00000UL) 38#define DEFAULT_TASK_SIZE32 (0xFFF00000UL)
42#define DEFAULT_MAP_BASE32 (0x40000000UL) 39#define DEFAULT_MAP_BASE32 (0x40000000UL)
43 40
44#ifdef __LP64__ 41#ifdef CONFIG_64BIT
45#define DEFAULT_TASK_SIZE (MAX_ADDRESS-0xf000000) 42#define DEFAULT_TASK_SIZE (MAX_ADDRESS-0xf000000)
46#define DEFAULT_MAP_BASE (0x200000000UL) 43#define DEFAULT_MAP_BASE (0x200000000UL)
47#else 44#else
@@ -87,7 +84,6 @@ struct cpuinfo_parisc {
87 unsigned long hpa; /* Host Physical address */ 84 unsigned long hpa; /* Host Physical address */
88 unsigned long txn_addr; /* MMIO addr of EIR or id_eid */ 85 unsigned long txn_addr; /* MMIO addr of EIR or id_eid */
89#ifdef CONFIG_SMP 86#ifdef CONFIG_SMP
90 spinlock_t lock; /* synchronization for ipi's */
91 unsigned long pending_ipi; /* bitmap of type ipi_message_type */ 87 unsigned long pending_ipi; /* bitmap of type ipi_message_type */
92 unsigned long ipi_count; /* number ipi Interrupts */ 88 unsigned long ipi_count; /* number ipi Interrupts */
93#endif 89#endif
@@ -277,7 +273,7 @@ on downward growing arches, it looks like this:
277 * it in here from the current->personality 273 * it in here from the current->personality
278 */ 274 */
279 275
280#ifdef __LP64__ 276#ifdef CONFIG_64BIT
281#define USER_WIDE_MODE (!test_thread_flag(TIF_32BIT)) 277#define USER_WIDE_MODE (!test_thread_flag(TIF_32BIT))
282#else 278#else
283#define USER_WIDE_MODE 0 279#define USER_WIDE_MODE 0
diff --git a/include/asm-parisc/sembuf.h b/include/asm-parisc/sembuf.h
index 1083368ef8db..1e59ffd3bd1e 100644
--- a/include/asm-parisc/sembuf.h
+++ b/include/asm-parisc/sembuf.h
@@ -13,11 +13,11 @@
13 13
14struct semid64_ds { 14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ 15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16#ifndef __LP64__ 16#ifndef CONFIG_64BIT
17 unsigned int __pad1; 17 unsigned int __pad1;
18#endif 18#endif
19 __kernel_time_t sem_otime; /* last semop time */ 19 __kernel_time_t sem_otime; /* last semop time */
20#ifndef __LP64__ 20#ifndef CONFIG_64BIT
21 unsigned int __pad2; 21 unsigned int __pad2;
22#endif 22#endif
23 __kernel_time_t sem_ctime; /* last change time */ 23 __kernel_time_t sem_ctime; /* last change time */
diff --git a/include/asm-parisc/shmbuf.h b/include/asm-parisc/shmbuf.h
index 623b6c0c49e6..0a3eada1863b 100644
--- a/include/asm-parisc/shmbuf.h
+++ b/include/asm-parisc/shmbuf.h
@@ -13,19 +13,19 @@
13 13
14struct shmid64_ds { 14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */ 15 struct ipc64_perm shm_perm; /* operation perms */
16#ifndef __LP64__ 16#ifndef CONFIG_64BIT
17 unsigned int __pad1; 17 unsigned int __pad1;
18#endif 18#endif
19 __kernel_time_t shm_atime; /* last attach time */ 19 __kernel_time_t shm_atime; /* last attach time */
20#ifndef __LP64__ 20#ifndef CONFIG_64BIT
21 unsigned int __pad2; 21 unsigned int __pad2;
22#endif 22#endif
23 __kernel_time_t shm_dtime; /* last detach time */ 23 __kernel_time_t shm_dtime; /* last detach time */
24#ifndef __LP64__ 24#ifndef CONFIG_64BIT
25 unsigned int __pad3; 25 unsigned int __pad3;
26#endif 26#endif
27 __kernel_time_t shm_ctime; /* last change time */ 27 __kernel_time_t shm_ctime; /* last change time */
28#ifndef __LP64__ 28#ifndef CONFIG_64BIT
29 unsigned int __pad4; 29 unsigned int __pad4;
30#endif 30#endif
31 size_t shm_segsz; /* size of segment (bytes) */ 31 size_t shm_segsz; /* size of segment (bytes) */
@@ -36,7 +36,7 @@ struct shmid64_ds {
36 unsigned int __unused2; 36 unsigned int __unused2;
37}; 37};
38 38
39#ifdef __LP64__ 39#ifdef CONFIG_64BIT
40/* The 'unsigned int' (formerly 'unsigned long') data types below will 40/* The 'unsigned int' (formerly 'unsigned long') data types below will
41 * ensure that a 32-bit app calling shmctl(*,IPC_INFO,*) will work on 41 * ensure that a 32-bit app calling shmctl(*,IPC_INFO,*) will work on
42 * a wide kernel, but if some of these values are meant to contain pointers 42 * a wide kernel, but if some of these values are meant to contain pointers
diff --git a/include/asm-parisc/signal.h b/include/asm-parisc/signal.h
index 98a82fa0cfdb..c20356375d1d 100644
--- a/include/asm-parisc/signal.h
+++ b/include/asm-parisc/signal.h
@@ -105,7 +105,7 @@
105struct siginfo; 105struct siginfo;
106 106
107/* Type of a signal handler. */ 107/* Type of a signal handler. */
108#ifdef __LP64__ 108#ifdef CONFIG_64BIT
109/* function pointers on 64-bit parisc are pointers to little structs and the 109/* function pointers on 64-bit parisc are pointers to little structs and the
110 * compiler doesn't support code which changes or tests the address of 110 * compiler doesn't support code which changes or tests the address of
111 * the function in the little struct. This is really ugly -PB 111 * the function in the little struct. This is really ugly -PB
diff --git a/include/asm-parisc/smp.h b/include/asm-parisc/smp.h
index d4c0e26afcd1..306f4950e32e 100644
--- a/include/asm-parisc/smp.h
+++ b/include/asm-parisc/smp.h
@@ -41,14 +41,6 @@ extern void smp_send_all_nop(void);
41 41
42#define PROC_CHANGE_PENALTY 15 /* Schedule penalty */ 42#define PROC_CHANGE_PENALTY 15 /* Schedule penalty */
43 43
44#undef ENTRY_SYS_CPUS
45#ifdef ENTRY_SYS_CPUS
46#define STATE_RENDEZVOUS 0
47#define STATE_STOPPED 1
48#define STATE_RUNNING 2
49#define STATE_HALTED 3
50#endif
51
52extern unsigned long cpu_present_mask; 44extern unsigned long cpu_present_mask;
53 45
54#define raw_smp_processor_id() (current_thread_info()->cpu) 46#define raw_smp_processor_id() (current_thread_info()->cpu)
diff --git a/include/asm-parisc/spinlock_types.h b/include/asm-parisc/spinlock_types.h
index d6b479bdb886..3f72f47cf4b2 100644
--- a/include/asm-parisc/spinlock_types.h
+++ b/include/asm-parisc/spinlock_types.h
@@ -1,10 +1,6 @@
1#ifndef __ASM_SPINLOCK_TYPES_H 1#ifndef __ASM_SPINLOCK_TYPES_H
2#define __ASM_SPINLOCK_TYPES_H 2#define __ASM_SPINLOCK_TYPES_H
3 3
4#ifndef __LINUX_SPINLOCK_TYPES_H
5# error "please don't include this file directly"
6#endif
7
8typedef struct { 4typedef struct {
9#ifdef CONFIG_PA20 5#ifdef CONFIG_PA20
10 volatile unsigned int slock; 6 volatile unsigned int slock;
diff --git a/include/asm-parisc/statfs.h b/include/asm-parisc/statfs.h
index a52d8f93f05c..1d2b8130b23d 100644
--- a/include/asm-parisc/statfs.h
+++ b/include/asm-parisc/statfs.h
@@ -30,11 +30,11 @@ struct statfs {
30struct statfs64 { 30struct statfs64 {
31 long f_type; 31 long f_type;
32 long f_bsize; 32 long f_bsize;
33 u64 f_blocks; 33 __u64 f_blocks;
34 u64 f_bfree; 34 __u64 f_bfree;
35 u64 f_bavail; 35 __u64 f_bavail;
36 u64 f_files; 36 __u64 f_files;
37 u64 f_ffree; 37 __u64 f_ffree;
38 __kernel_fsid_t f_fsid; 38 __kernel_fsid_t f_fsid;
39 long f_namelen; 39 long f_namelen;
40 long f_frsize; 40 long f_frsize;
diff --git a/include/asm-parisc/system.h b/include/asm-parisc/system.h
index 74f037a39e6f..7e9afa720d43 100644
--- a/include/asm-parisc/system.h
+++ b/include/asm-parisc/system.h
@@ -34,7 +34,7 @@ struct pa_psw {
34 unsigned int i:1; 34 unsigned int i:1;
35}; 35};
36 36
37#ifdef __LP64__ 37#ifdef CONFIG_64BIT
38#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW + 4)) 38#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW + 4))
39#else 39#else
40#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW)) 40#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW))
diff --git a/include/asm-parisc/thread_info.h b/include/asm-parisc/thread_info.h
index f2f83b04cd8b..949314cf6188 100644
--- a/include/asm-parisc/thread_info.h
+++ b/include/asm-parisc/thread_info.h
@@ -62,6 +62,7 @@ struct thread_info {
62#define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 62#define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling TIF_NEED_RESCHED */
63#define TIF_32BIT 5 /* 32 bit binary */ 63#define TIF_32BIT 5 /* 32 bit binary */
64#define TIF_MEMDIE 6 64#define TIF_MEMDIE 6
65#define TIF_RESTORE_SIGMASK 7 /* restore saved signal mask */
65 66
66#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) 67#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
67#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) 68#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
@@ -69,9 +70,10 @@ struct thread_info {
69#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) 70#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
70#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) 71#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
71#define _TIF_32BIT (1 << TIF_32BIT) 72#define _TIF_32BIT (1 << TIF_32BIT)
73#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
72 74
73#define _TIF_USER_WORK_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | \ 75#define _TIF_USER_WORK_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | \
74 _TIF_NEED_RESCHED) 76 _TIF_NEED_RESCHED | _TIF_RESTORE_SIGMASK)
75 77
76#endif /* __KERNEL__ */ 78#endif /* __KERNEL__ */
77 79
diff --git a/include/asm-parisc/tlbflush.h b/include/asm-parisc/tlbflush.h
index f662e837dea1..3313da9ea00f 100644
--- a/include/asm-parisc/tlbflush.h
+++ b/include/asm-parisc/tlbflush.h
@@ -73,33 +73,11 @@ static inline void flush_tlb_page(struct vm_area_struct *vma,
73 purge_tlb_end(); 73 purge_tlb_end();
74} 74}
75 75
76static inline void flush_tlb_range(struct vm_area_struct *vma, 76void __flush_tlb_range(unsigned long sid,
77 unsigned long start, unsigned long end) 77 unsigned long start, unsigned long end);
78{
79 unsigned long npages;
80 78
81 npages = ((end - (start & PAGE_MASK)) + (PAGE_SIZE - 1)) >> PAGE_SHIFT; 79#define flush_tlb_range(vma,start,end) __flush_tlb_range((vma)->vm_mm->context,start,end)
82 if (npages >= 512) /* 2MB of space: arbitrary, should be tuned */
83 flush_tlb_all();
84 else {
85 mtsp(vma->vm_mm->context,1);
86 purge_tlb_start();
87 if (split_tlb) {
88 while (npages--) {
89 pdtlb(start);
90 pitlb(start);
91 start += PAGE_SIZE;
92 }
93 } else {
94 while (npages--) {
95 pdtlb(start);
96 start += PAGE_SIZE;
97 }
98 }
99 purge_tlb_end();
100 }
101}
102 80
103#define flush_tlb_kernel_range(start, end) flush_tlb_all() 81#define flush_tlb_kernel_range(start, end) __flush_tlb_range(0,start,end)
104 82
105#endif 83#endif
diff --git a/include/asm-parisc/types.h b/include/asm-parisc/types.h
index 34fdce361a5a..d4aa33033d98 100644
--- a/include/asm-parisc/types.h
+++ b/include/asm-parisc/types.h
@@ -31,7 +31,7 @@ typedef unsigned long long __u64;
31 */ 31 */
32#ifdef __KERNEL__ 32#ifdef __KERNEL__
33 33
34#ifdef __LP64__ 34#ifdef CONFIG_64BIT
35#define BITS_PER_LONG 64 35#define BITS_PER_LONG 64
36#define SHIFT_PER_LONG 6 36#define SHIFT_PER_LONG 6
37#else 37#else
diff --git a/include/asm-parisc/uaccess.h b/include/asm-parisc/uaccess.h
index d973e8b3466c..4878b9501f24 100644
--- a/include/asm-parisc/uaccess.h
+++ b/include/asm-parisc/uaccess.h
@@ -4,7 +4,6 @@
4/* 4/*
5 * User space memory access functions 5 * User space memory access functions
6 */ 6 */
7#include <linux/sched.h>
8#include <asm/page.h> 7#include <asm/page.h>
9#include <asm/system.h> 8#include <asm/system.h>
10#include <asm/cache.h> 9#include <asm/cache.h>
@@ -43,16 +42,18 @@ static inline long access_ok(int type, const void __user * addr,
43#define put_user __put_user 42#define put_user __put_user
44#define get_user __get_user 43#define get_user __get_user
45 44
46#if BITS_PER_LONG == 32 45#if !defined(CONFIG_64BIT)
47#define LDD_KERNEL(ptr) __get_kernel_bad(); 46#define LDD_KERNEL(ptr) __get_kernel_bad();
48#define LDD_USER(ptr) __get_user_bad(); 47#define LDD_USER(ptr) __get_user_bad();
49#define STD_KERNEL(x, ptr) __put_kernel_asm64(x,ptr) 48#define STD_KERNEL(x, ptr) __put_kernel_asm64(x,ptr)
50#define STD_USER(x, ptr) __put_user_asm64(x,ptr) 49#define STD_USER(x, ptr) __put_user_asm64(x,ptr)
50#define ASM_WORD_INSN ".word\t"
51#else 51#else
52#define LDD_KERNEL(ptr) __get_kernel_asm("ldd",ptr) 52#define LDD_KERNEL(ptr) __get_kernel_asm("ldd",ptr)
53#define LDD_USER(ptr) __get_user_asm("ldd",ptr) 53#define LDD_USER(ptr) __get_user_asm("ldd",ptr)
54#define STD_KERNEL(x, ptr) __put_kernel_asm("std",x,ptr) 54#define STD_KERNEL(x, ptr) __put_kernel_asm("std",x,ptr)
55#define STD_USER(x, ptr) __put_user_asm("std",x,ptr) 55#define STD_USER(x, ptr) __put_user_asm("std",x,ptr)
56#define ASM_WORD_INSN ".dword\t"
56#endif 57#endif
57 58
58/* 59/*
@@ -66,6 +67,11 @@ struct exception_table_entry {
66 long fixup; /* fixup routine */ 67 long fixup; /* fixup routine */
67}; 68};
68 69
70#define ASM_EXCEPTIONTABLE_ENTRY( fault_addr, except_addr )\
71 ".section __ex_table,\"aw\"\n" \
72 ASM_WORD_INSN #fault_addr ", " #except_addr "\n\t" \
73 ".previous\n"
74
69/* 75/*
70 * The page fault handler stores, in a per-cpu area, the following information 76 * The page fault handler stores, in a per-cpu area, the following information
71 * if a fixup routine is available. 77 * if a fixup routine is available.
@@ -104,43 +110,19 @@ struct exception_data {
104 __gu_err; \ 110 __gu_err; \
105}) 111})
106 112
107#ifdef __LP64__
108#define __get_kernel_asm(ldx,ptr) \
109 __asm__("\n1:\t" ldx "\t0(%2),%0\n" \
110 "\t.section __ex_table,\"aw\"\n" \
111 "\t.dword\t1b,fixup_get_user_skip_1\n" \
112 "\t.previous" \
113 : "=r"(__gu_val), "=r"(__gu_err) \
114 : "r"(ptr), "1"(__gu_err) \
115 : "r1");
116
117#define __get_user_asm(ldx,ptr) \
118 __asm__("\n1:\t" ldx "\t0(%%sr3,%2),%0\n" \
119 "\t.section __ex_table,\"aw\"\n" \
120 "\t.dword\t1b,fixup_get_user_skip_1\n" \
121 "\t.previous" \
122 : "=r"(__gu_val), "=r"(__gu_err) \
123 : "r"(ptr), "1"(__gu_err) \
124 : "r1");
125#else
126#define __get_kernel_asm(ldx,ptr) \ 113#define __get_kernel_asm(ldx,ptr) \
127 __asm__("\n1:\t" ldx "\t0(%2),%0\n" \ 114 __asm__("\n1:\t" ldx "\t0(%2),%0\n\t" \
128 "\t.section __ex_table,\"aw\"\n" \ 115 ASM_EXCEPTIONTABLE_ENTRY(1b, fixup_get_user_skip_1)\
129 "\t.word\t1b,fixup_get_user_skip_1\n" \
130 "\t.previous" \
131 : "=r"(__gu_val), "=r"(__gu_err) \ 116 : "=r"(__gu_val), "=r"(__gu_err) \
132 : "r"(ptr), "1"(__gu_err) \ 117 : "r"(ptr), "1"(__gu_err) \
133 : "r1"); 118 : "r1");
134 119
135#define __get_user_asm(ldx,ptr) \ 120#define __get_user_asm(ldx,ptr) \
136 __asm__("\n1:\t" ldx "\t0(%%sr3,%2),%0\n" \ 121 __asm__("\n1:\t" ldx "\t0(%%sr3,%2),%0\n\t" \
137 "\t.section __ex_table,\"aw\"\n" \ 122 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_get_user_skip_1)\
138 "\t.word\t1b,fixup_get_user_skip_1\n" \
139 "\t.previous" \
140 : "=r"(__gu_val), "=r"(__gu_err) \ 123 : "=r"(__gu_val), "=r"(__gu_err) \
141 : "r"(ptr), "1"(__gu_err) \ 124 : "r"(ptr), "1"(__gu_err) \
142 : "r1"); 125 : "r1");
143#endif /* !__LP64__ */
144 126
145#define __put_user(x,ptr) \ 127#define __put_user(x,ptr) \
146({ \ 128({ \
@@ -179,80 +161,54 @@ struct exception_data {
179 * r8/r9 are already listed as err/val. 161 * r8/r9 are already listed as err/val.
180 */ 162 */
181 163
182#ifdef __LP64__
183#define __put_kernel_asm(stx,x,ptr) \ 164#define __put_kernel_asm(stx,x,ptr) \
184 __asm__ __volatile__ ( \ 165 __asm__ __volatile__ ( \
185 "\n1:\t" stx "\t%2,0(%1)\n" \ 166 "\n1:\t" stx "\t%2,0(%1)\n\t" \
186 "\t.section __ex_table,\"aw\"\n" \ 167 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_1)\
187 "\t.dword\t1b,fixup_put_user_skip_1\n" \
188 "\t.previous" \
189 : "=r"(__pu_err) \ 168 : "=r"(__pu_err) \
190 : "r"(ptr), "r"(x), "0"(__pu_err) \ 169 : "r"(ptr), "r"(x), "0"(__pu_err) \
191 : "r1") 170 : "r1")
192 171
193#define __put_user_asm(stx,x,ptr) \ 172#define __put_user_asm(stx,x,ptr) \
194 __asm__ __volatile__ ( \ 173 __asm__ __volatile__ ( \
195 "\n1:\t" stx "\t%2,0(%%sr3,%1)\n" \ 174 "\n1:\t" stx "\t%2,0(%%sr3,%1)\n\t" \
196 "\t.section __ex_table,\"aw\"\n" \ 175 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_1)\
197 "\t.dword\t1b,fixup_put_user_skip_1\n" \
198 "\t.previous" \
199 : "=r"(__pu_err) \
200 : "r"(ptr), "r"(x), "0"(__pu_err) \
201 : "r1")
202#else
203#define __put_kernel_asm(stx,x,ptr) \
204 __asm__ __volatile__ ( \
205 "\n1:\t" stx "\t%2,0(%1)\n" \
206 "\t.section __ex_table,\"aw\"\n" \
207 "\t.word\t1b,fixup_put_user_skip_1\n" \
208 "\t.previous" \
209 : "=r"(__pu_err) \ 176 : "=r"(__pu_err) \
210 : "r"(ptr), "r"(x), "0"(__pu_err) \ 177 : "r"(ptr), "r"(x), "0"(__pu_err) \
211 : "r1") 178 : "r1")
212 179
213#define __put_user_asm(stx,x,ptr) \
214 __asm__ __volatile__ ( \
215 "\n1:\t" stx "\t%2,0(%%sr3,%1)\n" \
216 "\t.section __ex_table,\"aw\"\n" \
217 "\t.word\t1b,fixup_put_user_skip_1\n" \
218 "\t.previous" \
219 : "=r"(__pu_err) \
220 : "r"(ptr), "r"(x), "0"(__pu_err) \
221 : "r1")
222 180
223#define __put_kernel_asm64(__val,ptr) do { \ 181#if !defined(CONFIG_64BIT)
224 u64 __val64 = (u64)(__val); \ 182
225 u32 hi = (__val64) >> 32; \ 183#define __put_kernel_asm64(__val,ptr) do { \
226 u32 lo = (__val64) & 0xffffffff; \ 184 u64 __val64 = (u64)(__val); \
185 u32 hi = (__val64) >> 32; \
186 u32 lo = (__val64) & 0xffffffff; \
227 __asm__ __volatile__ ( \ 187 __asm__ __volatile__ ( \
228 "\n1:\tstw %2,0(%1)\n" \ 188 "\n1:\tstw %2,0(%1)" \
229 "\n2:\tstw %3,4(%1)\n" \ 189 "\n2:\tstw %3,4(%1)\n\t" \
230 "\t.section __ex_table,\"aw\"\n" \ 190 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_2)\
231 "\t.word\t1b,fixup_put_user_skip_2\n" \ 191 ASM_EXCEPTIONTABLE_ENTRY(2b,fixup_put_user_skip_1)\
232 "\t.word\t2b,fixup_put_user_skip_1\n" \
233 "\t.previous" \
234 : "=r"(__pu_err) \ 192 : "=r"(__pu_err) \
235 : "r"(ptr), "r"(hi), "r"(lo), "0"(__pu_err) \ 193 : "r"(ptr), "r"(hi), "r"(lo), "0"(__pu_err) \
236 : "r1"); \ 194 : "r1"); \
237} while (0) 195} while (0)
238 196
239#define __put_user_asm64(__val,ptr) do { \ 197#define __put_user_asm64(__val,ptr) do { \
240 u64 __val64 = (u64)__val; \ 198 u64 __val64 = (u64)(__val); \
241 u32 hi = (__val64) >> 32; \ 199 u32 hi = (__val64) >> 32; \
242 u32 lo = (__val64) & 0xffffffff; \ 200 u32 lo = (__val64) & 0xffffffff; \
243 __asm__ __volatile__ ( \ 201 __asm__ __volatile__ ( \
244 "\n1:\tstw %2,0(%%sr3,%1)\n" \ 202 "\n1:\tstw %2,0(%%sr3,%1)" \
245 "\n2:\tstw %3,4(%%sr3,%1)\n" \ 203 "\n2:\tstw %3,4(%%sr3,%1)\n\t" \
246 "\t.section __ex_table,\"aw\"\n" \ 204 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_2)\
247 "\t.word\t1b,fixup_get_user_skip_2\n" \ 205 ASM_EXCEPTIONTABLE_ENTRY(2b,fixup_put_user_skip_1)\
248 "\t.word\t2b,fixup_get_user_skip_1\n" \
249 "\t.previous" \
250 : "=r"(__pu_err) \ 206 : "=r"(__pu_err) \
251 : "r"(ptr), "r"(hi), "r"(lo), "0"(__pu_err) \ 207 : "r"(ptr), "r"(hi), "r"(lo), "0"(__pu_err) \
252 : "r1"); \ 208 : "r1"); \
253} while (0) 209} while (0)
254 210
255#endif /* !__LP64__ */ 211#endif /* !defined(CONFIG_64BIT) */
256 212
257 213
258/* 214/*
diff --git a/include/asm-parisc/unistd.h b/include/asm-parisc/unistd.h
index 53b0f5d290e4..2f7c40861c91 100644
--- a/include/asm-parisc/unistd.h
+++ b/include/asm-parisc/unistd.h
@@ -772,7 +772,7 @@
772#define __NR_mknodat (__NR_Linux + 277) 772#define __NR_mknodat (__NR_Linux + 277)
773#define __NR_fchownat (__NR_Linux + 278) 773#define __NR_fchownat (__NR_Linux + 278)
774#define __NR_futimesat (__NR_Linux + 279) 774#define __NR_futimesat (__NR_Linux + 279)
775#define __NR_newfstatat (__NR_Linux + 280) 775#define __NR_fstatat64 (__NR_Linux + 280)
776#define __NR_unlinkat (__NR_Linux + 281) 776#define __NR_unlinkat (__NR_Linux + 281)
777#define __NR_renameat (__NR_Linux + 282) 777#define __NR_renameat (__NR_Linux + 282)
778#define __NR_linkat (__NR_Linux + 283) 778#define __NR_linkat (__NR_Linux + 283)
@@ -786,8 +786,14 @@
786#define __NR_splice (__NR_Linux + 291) 786#define __NR_splice (__NR_Linux + 291)
787#define __NR_sync_file_range (__NR_Linux + 292) 787#define __NR_sync_file_range (__NR_Linux + 292)
788#define __NR_tee (__NR_Linux + 293) 788#define __NR_tee (__NR_Linux + 293)
789#define __NR_vmsplice (__NR_Linux + 294)
790#define __NR_move_pages (__NR_Linux + 295)
791#define __NR_getcpu (__NR_Linux + 296)
792#define __NR_epoll_pwait (__NR_Linux + 297)
793#define __NR_statfs64 (__NR_Linux + 298)
794#define __NR_fstatfs64 (__NR_Linux + 299)
789 795
790#define __NR_Linux_syscalls 294 796#define __NR_Linux_syscalls (__NR_fstatfs64 + 1)
791 797
792#define HPUX_GATEWAY_ADDR 0xC0000004 798#define HPUX_GATEWAY_ADDR 0xC0000004
793#define LINUX_GATEWAY_ADDR 0x100 799#define LINUX_GATEWAY_ADDR 0x100
@@ -951,6 +957,8 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
951#define __ARCH_WANT_SYS_SIGPENDING 957#define __ARCH_WANT_SYS_SIGPENDING
952#define __ARCH_WANT_SYS_SIGPROCMASK 958#define __ARCH_WANT_SYS_SIGPROCMASK
953#define __ARCH_WANT_SYS_RT_SIGACTION 959#define __ARCH_WANT_SYS_RT_SIGACTION
960#define __ARCH_WANT_SYS_RT_SIGSUSPEND
961#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
954 962
955#endif /* __ASSEMBLY__ */ 963#endif /* __ASSEMBLY__ */
956 964
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-24 04:07:34 -0500