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-rw-r--r--include/asm-parisc/system.h28
1 files changed, 14 insertions, 14 deletions
diff --git a/include/asm-parisc/system.h b/include/asm-parisc/system.h
index 863876134b2c..74f037a39e6f 100644
--- a/include/asm-parisc/system.h
+++ b/include/asm-parisc/system.h
@@ -143,8 +143,6 @@ static inline void set_eiem(unsigned long val)
143#define read_barrier_depends() do { } while(0) 143#define read_barrier_depends() do { } while(0)
144 144
145#define set_mb(var, value) do { var = value; mb(); } while (0) 145#define set_mb(var, value) do { var = value; mb(); } while (0)
146#define set_wmb(var, value) do { var = value; wmb(); } while (0)
147
148 146
149#ifndef CONFIG_PA20 147#ifndef CONFIG_PA20
150/* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data, 148/* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data,
@@ -155,13 +153,14 @@ static inline void set_eiem(unsigned long val)
155 type and dynamically select the 16-byte aligned int from the array 153 type and dynamically select the 16-byte aligned int from the array
156 for the semaphore. */ 154 for the semaphore. */
157 155
158#define __PA_LDCW_ALIGNMENT 16 156#define __PA_LDCW_ALIGNMENT 16
159#define __ldcw_align(a) ({ \ 157#define __ldcw_align(a) ({ \
160 unsigned long __ret = (unsigned long) &(a)->lock[0]; \ 158 unsigned long __ret = (unsigned long) &(a)->lock[0]; \
161 __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) & ~(__PA_LDCW_ALIGNMENT - 1); \ 159 __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) \
162 (volatile unsigned int *) __ret; \ 160 & ~(__PA_LDCW_ALIGNMENT - 1); \
161 (volatile unsigned int *) __ret; \
163}) 162})
164#define LDCW "ldcw" 163#define __LDCW "ldcw"
165 164
166#else /*CONFIG_PA20*/ 165#else /*CONFIG_PA20*/
167/* From: "Jim Hull" <jim.hull of hp.com> 166/* From: "Jim Hull" <jim.hull of hp.com>
@@ -171,17 +170,18 @@ static inline void set_eiem(unsigned long val)
171 they only require "natural" alignment (4-byte for ldcw, 8-byte for 170 they only require "natural" alignment (4-byte for ldcw, 8-byte for
172 ldcd). */ 171 ldcd). */
173 172
174#define __PA_LDCW_ALIGNMENT 4 173#define __PA_LDCW_ALIGNMENT 4
175#define __ldcw_align(a) ((volatile unsigned int *)a) 174#define __ldcw_align(a) ((volatile unsigned int *)a)
176#define LDCW "ldcw,co" 175#define __LDCW "ldcw,co"
177 176
178#endif /*!CONFIG_PA20*/ 177#endif /*!CONFIG_PA20*/
179 178
180/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */ 179/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */
181#define __ldcw(a) ({ \ 180#define __ldcw(a) ({ \
182 unsigned __ret; \ 181 unsigned __ret; \
183 __asm__ __volatile__(LDCW " 0(%1),%0" : "=r" (__ret) : "r" (a)); \ 182 __asm__ __volatile__(__LDCW " 0(%1),%0" \
184 __ret; \ 183 : "=r" (__ret) : "r" (a)); \
184 __ret; \
185}) 185})
186 186
187#ifdef CONFIG_SMP 187#ifdef CONFIG_SMP