aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-parisc/io.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/asm-parisc/io.h')
-rw-r--r--include/asm-parisc/io.h17
1 files changed, 5 insertions, 12 deletions
diff --git a/include/asm-parisc/io.h b/include/asm-parisc/io.h
index 29da31194b91..244f6b8883f4 100644
--- a/include/asm-parisc/io.h
+++ b/include/asm-parisc/io.h
@@ -126,24 +126,17 @@ static inline void gsc_writeq(unsigned long long val, unsigned long addr)
126 126
127extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); 127extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
128 128
129extern inline void __iomem * ioremap(unsigned long offset, unsigned long size) 129/* Most machines react poorly to I/O-space being cacheable... Instead let's
130{ 130 * define ioremap() in terms of ioremap_nocache().
131 return __ioremap(offset, size, 0);
132}
133
134/*
135 * This one maps high address device memory and turns off caching for that area.
136 * it's useful if some control registers are in such an area and write combining
137 * or read caching is not desirable:
138 */ 131 */
139extern inline void * ioremap_nocache(unsigned long offset, unsigned long size) 132extern inline void __iomem * ioremap(unsigned long offset, unsigned long size)
140{ 133{
141 return __ioremap(offset, size, _PAGE_NO_CACHE /* _PAGE_PCD */); 134 return __ioremap(offset, size, _PAGE_NO_CACHE);
142} 135}
136#define ioremap_nocache(off, sz) ioremap((off), (sz))
143 137
144extern void iounmap(void __iomem *addr); 138extern void iounmap(void __iomem *addr);
145 139
146
147static inline unsigned char __raw_readb(const volatile void __iomem *addr) 140static inline unsigned char __raw_readb(const volatile void __iomem *addr)
148{ 141{
149 return (*(volatile unsigned char __force *) (addr)); 142 return (*(volatile unsigned char __force *) (addr));