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Diffstat (limited to 'include/asm-mn10300/proc-mn103e010/cache.h')
-rw-r--r-- | include/asm-mn10300/proc-mn103e010/cache.h | 33 |
1 files changed, 0 insertions, 33 deletions
diff --git a/include/asm-mn10300/proc-mn103e010/cache.h b/include/asm-mn10300/proc-mn103e010/cache.h deleted file mode 100644 index bdc1f9a59b4c..000000000000 --- a/include/asm-mn10300/proc-mn103e010/cache.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* MN103E010 Cache specification | ||
2 | * | ||
3 | * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public Licence | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the Licence, or (at your option) any later version. | ||
10 | */ | ||
11 | #ifndef _ASM_PROC_CACHE_H | ||
12 | #define _ASM_PROC_CACHE_H | ||
13 | |||
14 | /* L1 cache */ | ||
15 | |||
16 | #define L1_CACHE_NWAYS 4 /* number of ways in caches */ | ||
17 | #define L1_CACHE_NENTRIES 256 /* number of entries in each way */ | ||
18 | #define L1_CACHE_BYTES 16 /* bytes per entry */ | ||
19 | #define L1_CACHE_SHIFT 4 /* shift for bytes per entry */ | ||
20 | #define L1_CACHE_WAYDISP 0x1000 /* displacement of one way from the next */ | ||
21 | |||
22 | #define L1_CACHE_TAG_VALID 0x00000001 /* cache tag valid bit */ | ||
23 | #define L1_CACHE_TAG_DIRTY 0x00000008 /* data cache tag dirty bit */ | ||
24 | #define L1_CACHE_TAG_ENTRY 0x00000ff0 /* cache tag entry address mask */ | ||
25 | #define L1_CACHE_TAG_ADDRESS 0xfffff000 /* cache tag line address mask */ | ||
26 | |||
27 | /* | ||
28 | * specification of the interval between interrupt checking intervals whilst | ||
29 | * managing the cache with the interrupts disabled | ||
30 | */ | ||
31 | #define MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL 4 | ||
32 | |||
33 | #endif /* _ASM_PROC_CACHE_H */ | ||