143 files changed, 986 insertions, 823 deletions
diff --git a/include/asm-mips/a.out.h b/include/asm-mips/a.out.h
index 2b3dc3bed4da..ef33c3f13484 100644
--- a/include/asm-mips/a.out.h
+++ b/include/asm-mips/a.out.h
@@ -10,7 +10,6 @@
 #ifdef __KERNEL__
-#include <linux/config.h>
 #endif
diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h
index 1386af1cb7d9..45c706e34df1 100644
--- a/include/asm-mips/addrspace.h
+++ b/include/asm-mips/addrspace.h
@@ -10,7 +10,6 @@
 #ifndef _ASM_ADDRSPACE_H
 #define _ASM_ADDRSPACE_H
-#include <linux/config.h>
 #include <spaces.h>
 /*
@@ -133,57 +132,22 @@
    || defined (CONFIG_CPU_NEVADA)                                      \
    || defined (CONFIG_CPU_TX49XX)                                      \
    || defined (CONFIG_CPU_MIPS64)
-#define KUSIZE          _LLCONST_(0x0000010000000000)   /* 2^^40 */
-#define KUSIZE_64       _LLCONST_(0x0000010000000000)   /* 2^^40 */
-#define K0SIZE          _LLCONST_(0x0000001000000000)   /* 2^^36 */
-#define K1SIZE          _LLCONST_(0x0000001000000000)   /* 2^^36 */
-#define K2SIZE          _LLCONST_(0x000000ff80000000)
-#define KSEGSIZE        _LLCONST_(0x000000ff80000000)   /* max syssegsz */
 #define TO_PHYS_MASK    _LLCONST_(0x0000000fffffffff)   /* 2^^36 - 1 */
 #endif
 #if defined (CONFIG_CPU_R8000)
 /* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */
-#define KUSIZE          _LLCONST_(0x0000010000000000)   /* 2^^40 */
-#define KUSIZE_64       _LLCONST_(0x0000010000000000)   /* 2^^40 */
-#define K0SIZE          _LLCONST_(0x0000010000000000)   /* 2^^40 */
-#define K1SIZE          _LLCONST_(0x0000010000000000)   /* 2^^40 */
-#define K2SIZE          _LLCONST_(0x0001000000000000)
-#define KSEGSIZE        _LLCONST_(0x0000010000000000)   /* max syssegsz */
 #define TO_PHYS_MASK    _LLCONST_(0x000000ffffffffff)   /* 2^^40 - 1 */
 #endif
 #if defined (CONFIG_CPU_R10000)
-#define KUSIZE          _LLCONST_(0x0000010000000000)   /* 2^^40 */
-#define KUSIZE_64       _LLCONST_(0x0000010000000000)   /* 2^^40 */
-#define K0SIZE          _LLCONST_(0x0000010000000000)   /* 2^^40 */
-#define K1SIZE          _LLCONST_(0x0000010000000000)   /* 2^^40 */
-#define K2SIZE          _LLCONST_(0x00000fff80000000)
-#define KSEGSIZE        _LLCONST_(0x00000fff80000000)   /* max syssegsz */
 #define TO_PHYS_MASK    _LLCONST_(0x000000ffffffffff)   /* 2^^40 - 1 */
 #endif
 #if defined(CONFIG_CPU_SB1) || defined(CONFIG_CPU_SB1A)
-#define KUSIZE          _LLCONST_(0x0000100000000000)   /* 2^^44 */
-#define KUSIZE_64       _LLCONST_(0x0000100000000000)   /* 2^^44 */
-#define K0SIZE          _LLCONST_(0x0000100000000000)   /* 2^^44 */
-#define K1SIZE          _LLCONST_(0x0000100000000000)   /* 2^^44 */
-#define K2SIZE          _LLCONST_(0x0000ffff80000000)
-#define KSEGSIZE        _LLCONST_(0x0000ffff80000000)   /* max syssegsz */
 #define TO_PHYS_MASK    _LLCONST_(0x00000fffffffffff)   /* 2^^44 - 1 */
 #endif
-/*
- * Further names for SGI source compatibility.  These are stolen from
- * IRIX's <sys/mips_addrspace.h>.
- */
-#define KUBASE          _LLCONST_(0)
-#define KUSIZE_32       _LLCONST_(0x0000000080000000)   /* KUSIZE
-                                                           for a 32 bit proc */
-#define K0BASE_EXL_WR   _LLCONST_(0xa800000000000000)   /* exclusive on write */
-#define K0BASE_NONCOH   _LLCONST_(0x9800000000000000)   /* noncoherent */
-#define K0BASE_EXL      _LLCONST_(0xa000000000000000)   /* exclusive */
 #ifndef CONFIG_CPU_R8000
 /*
diff --git a/include/asm-mips/apm.h b/include/asm-mips/apm.h
new file mode 100644
index 000000000000..e8c69208f63a
--- /dev/null
+++ b/include/asm-mips/apm.h
@@ -0,0 +1,65 @@
+/* -*- linux-c -*-
+ *
+ * (C) 2003 zecke@handhelds.org
+ *
+ * GPL version 2
+ *
+ * based on arch/arm/kernel/apm.c
+ * factor out the information needed by architectures to provide
+ * apm status
+ *
+ *
+ */
+#ifndef MIPS_ASM_SA1100_APM_H
+#define MIPS_ASM_SA1100_APM_H
+#include <linux/config.h>
+#include <linux/apm_bios.h>
+/*
+ * This structure gets filled in by the machine specific 'get_power_status'
+ * implementation.  Any fields which are not set default to a safe value.
+ */
+struct apm_power_info {
+        unsigned char   ac_line_status;
+#define APM_AC_OFFLINE                  0
+#define APM_AC_ONLINE                   1
+#define APM_AC_BACKUP                   2
+#define APM_AC_UNKNOWN                  0xff
+        unsigned char   battery_status;
+#define APM_BATTERY_STATUS_HIGH         0
+#define APM_BATTERY_STATUS_LOW          1
+#define APM_BATTERY_STATUS_CRITICAL     2
+#define APM_BATTERY_STATUS_CHARGING     3
+#define APM_BATTERY_STATUS_NOT_PRESENT  4
+#define APM_BATTERY_STATUS_UNKNOWN      0xff
+        unsigned char   battery_flag;
+#define APM_BATTERY_FLAG_HIGH           (1 << 0)
+#define APM_BATTERY_FLAG_LOW            (1 << 1)
+#define APM_BATTERY_FLAG_CRITICAL       (1 << 2)
+#define APM_BATTERY_FLAG_CHARGING       (1 << 3)
+#define APM_BATTERY_FLAG_NOT_PRESENT    (1 << 7)
+#define APM_BATTERY_FLAG_UNKNOWN        0xff
+        int             battery_life;
+        int             time;
+        int             units;
+#define APM_UNITS_MINS                  0
+#define APM_UNITS_SECS                  1
+#define APM_UNITS_UNKNOWN               -1
+};
+/*
+ * This allows machines to provide their own "apm get power status" function.
+ */
+extern void (*apm_get_power_status)(struct apm_power_info *);
+/*
+ * Queue an event (APM_SYS_SUSPEND or APM_CRITICAL_SUSPEND)
+ */
+void apm_queue_event(apm_event_t event);
+#endif
diff --git a/include/asm-mips/arc/types.h b/include/asm-mips/arc/types.h
index bbb725c366fb..b9adcd6f0860 100644
--- a/include/asm-mips/arc/types.h
+++ b/include/asm-mips/arc/types.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_ARC_TYPES_H
 #define _ASM_ARC_TYPES_H
-#include <linux/config.h>
 #ifdef CONFIG_ARC32
diff --git a/include/asm-mips/asm.h b/include/asm-mips/asm.h
index 4b090f3142e0..e3038a4599ee 100644
--- a/include/asm-mips/asm.h
+++ b/include/asm-mips/asm.h
@@ -17,7 +17,6 @@
 #ifndef __ASM_ASM_H
 #define __ASM_ASM_H
-#include <linux/config.h>
 #include <asm/sgidefs.h>
 #ifndef CAT
diff --git a/include/asm-mips/asmmacro-32.h b/include/asm-mips/asmmacro-32.h
index 11daf5ceb7b4..5de3963f511e 100644
--- a/include/asm-mips/asmmacro-32.h
+++ b/include/asm-mips/asmmacro-32.h
@@ -12,7 +12,7 @@
 #include <asm/fpregdef.h>
 #include <asm/mipsregs.h>
-        .macro  fpu_save_double thread status tmp1=t0 tmp2
+        .macro  fpu_save_double thread status tmp1=t0
        cfc1    \tmp1,  fcr31
        sdc1    $f0,  THREAD_FPR0(\thread)
        sdc1    $f2,  THREAD_FPR2(\thread)
@@ -70,7 +70,7 @@
        sw      \tmp, THREAD_FCR31(\thread)
        .endm
-        .macro  fpu_restore_double thread tmp=t0
+        .macro  fpu_restore_double thread status tmp=t0
        lw      \tmp, THREAD_FCR31(\thread)
        ldc1    $f0,  THREAD_FPR0(\thread)
        ldc1    $f2,  THREAD_FPR2(\thread)
diff --git a/include/asm-mips/asmmacro-64.h b/include/asm-mips/asmmacro-64.h
index 559c355b9b86..225feefcb25d 100644
--- a/include/asm-mips/asmmacro-64.h
+++ b/include/asm-mips/asmmacro-64.h
@@ -53,12 +53,12 @@
        sdc1    $f31, THREAD_FPR31(\thread)
        .endm
-        .macro  fpu_save_double thread status tmp1 tmp2
+        .macro  fpu_save_double thread status tmp
-        sll     \tmp2, \tmp1, 5
+        sll     \tmp, \status, 5
-        bgez    \tmp2, 2f
+        bgez    \tmp, 2f
        fpu_save_16odd \thread
 2:
-        fpu_save_16even \thread \tmp1                   # clobbers t1
+        fpu_save_16even \thread \tmp
        .endm
        .macro  fpu_restore_16even thread tmp=t0
@@ -101,13 +101,12 @@
        ldc1    $f31, THREAD_FPR31(\thread)
        .endm
-        .macro  fpu_restore_double thread tmp
+        .macro  fpu_restore_double thread status tmp
-        mfc0    t0, CP0_STATUS
+        sll     \tmp, \status, 5
-        sll     t1, t0, 5
+        bgez    \tmp, 1f                                # 16 register mode?
-        bgez    t1, 1f                          # 16 register mode?
-        fpu_restore_16odd a0
+        fpu_restore_16odd \thread
-1:      fpu_restore_16even a0, t0               # clobbers t0
+1:      fpu_restore_16even \thread \tmp
        .endm
        .macro  cpu_save_nonscratch thread
diff --git a/include/asm-mips/asmmacro.h b/include/asm-mips/asmmacro.h
index f54aa147ec19..2c42f6b00a49 100644
--- a/include/asm-mips/asmmacro.h
+++ b/include/asm-mips/asmmacro.h
@@ -8,7 +8,6 @@
 #ifndef _ASM_ASMMACRO_H
 #define _ASM_ASMMACRO_H
-#include <linux/config.h>
 #include <asm/hazards.h>
 #ifdef CONFIG_32BIT
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 2c8b853376c9..13d44e14025a 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -17,7 +17,6 @@
 * <linux/spinlock.h> we have to include <linux/spinlock.h> outside the
 * main big wrapper ...
 */
-#include <linux/config.h>
 #include <linux/spinlock.h>
 #ifndef _ASM_ATOMIC_H
diff --git a/include/asm-mips/bcache.h b/include/asm-mips/bcache.h
index 446102b34f4e..3646a3f2ed38 100644
--- a/include/asm-mips/bcache.h
+++ b/include/asm-mips/bcache.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_BCACHE_H
 #define _ASM_BCACHE_H
-#include <linux/config.h>
 /* Some R4000 / R4400 / R4600 / R5000 machines may have a non-dma-coherent,
   chipset implemented caches.  On machines with other CPUs the CPU does the
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index d2f444537e4b..098cec263681 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_BITOPS_H
 #define _ASM_BITOPS_H
-#include <linux/config.h>
 #include <linux/compiler.h>
 #include <linux/types.h>
 #include <asm/bug.h>
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
index 14fc88f27226..3b745e76f429 100644
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -217,6 +217,13 @@
 */
 #define MACH_GROUP_TITAN       22       /* PMC-Sierra Titan             */
 #define  MACH_TITAN_YOSEMITE    1       /* PMC-Sierra Yosemite          */
+#define  MACH_TITAN_EXCITE      2       /* Basler eXcite                */
+/*
+ * Valid machtype for group NEC EMMA2RH
+ */
+#define MACH_GROUP_NEC_EMMA2RH 25       /* NEC EMMA2RH (was 23)         */
+#define  MACH_NEC_MARKEINS      0       /* NEC EMMA2RH Mark-eins        */
 #define CL_SIZE                 COMMAND_LINE_SIZE
@@ -258,4 +265,10 @@ extern char arcs_cmdline[CL_SIZE];
 * Registers a0, a1, a3 and a4 as passed to the kenrel entry by firmware
 */
 extern unsigned long fw_arg0, fw_arg1, fw_arg2, fw_arg3;
+/*
+ * Platform memory detection hook called by setup_arch
+ */
+extern void plat_mem_setup(void);
 #endif /* _ASM_BOOTINFO_H */
diff --git a/include/asm-mips/bug.h b/include/asm-mips/bug.h
index 87d49a5bdc63..7b4739dc8f3f 100644
--- a/include/asm-mips/bug.h
+++ b/include/asm-mips/bug.h
@@ -1,7 +1,6 @@
 #ifndef __ASM_BUG_H
 #define __ASM_BUG_H
-#include <linux/config.h>
 #ifdef CONFIG_BUG
diff --git a/include/asm-mips/bugs.h b/include/asm-mips/bugs.h
index cb2ea7c15c7a..0d7f9c1f5546 100644
--- a/include/asm-mips/bugs.h
+++ b/include/asm-mips/bugs.h
@@ -7,7 +7,6 @@
 #ifndef _ASM_BUGS_H
 #define _ASM_BUGS_H
-#include <linux/config.h>
 #include <linux/delay.h>
 #include <asm/cpu.h>
 #include <asm/cpu-info.h>
diff --git a/include/asm-mips/byteorder.h b/include/asm-mips/byteorder.h
index aefc02f16fd8..eee83cbdf2b0 100644
--- a/include/asm-mips/byteorder.h
+++ b/include/asm-mips/byteorder.h
@@ -8,7 +8,6 @@
 #ifndef _ASM_BYTEORDER_H
 #define _ASM_BYTEORDER_H
-#include <linux/config.h>
 #include <linux/compiler.h>
 #include <asm/types.h>
diff --git a/include/asm-mips/cache.h b/include/asm-mips/cache.h
index 55e19f2ff0e0..37f175c42bb5 100644
--- a/include/asm-mips/cache.h
+++ b/include/asm-mips/cache.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_CACHE_H
 #define _ASM_CACHE_H
-#include <linux/config.h>
 #include <kmalloc.h>
 #define L1_CACHE_SHIFT          CONFIG_MIPS_L1_CACHE_SHIFT
diff --git a/include/asm-mips/checksum.h b/include/asm-mips/checksum.h
index b09f8971e95d..a5e6050ec0f3 100644
--- a/include/asm-mips/checksum.h
+++ b/include/asm-mips/checksum.h
@@ -11,7 +11,6 @@
 #ifndef _ASM_CHECKSUM_H
 #define _ASM_CHECKSUM_H
-#include <linux/config.h>
 #include <linux/in6.h>
 #include <asm/uaccess.h>
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h
index 254e11ed247b..881ce1f9803d 100644
--- a/include/asm-mips/cpu-features.h
+++ b/include/asm-mips/cpu-features.h
@@ -9,7 +9,6 @@
 #ifndef __ASM_CPU_FEATURES_H
 #define __ASM_CPU_FEATURES_H
-#include <linux/config.h>
 #include <asm/cpu.h>
 #include <asm/cpu-info.h>
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h
index 6572ac703662..a2f0c8ea9160 100644
--- a/include/asm-mips/cpu-info.h
+++ b/include/asm-mips/cpu-info.h
@@ -12,7 +12,6 @@
 #ifndef __ASM_CPU_INFO_H
 #define __ASM_CPU_INFO_H
-#include <linux/config.h>
 #include <asm/cache.h>
 #ifdef CONFIG_SGI_IP27
diff --git a/include/asm-mips/ddb5074.h b/include/asm-mips/ddb5074.h
deleted file mode 100644
index 0d09ac27f9a5..000000000000
--- a/include/asm-mips/ddb5074.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- *  include/asm-mips/ddb5074.h -- NEC DDB Vrc-5074 definitions
- *
- *  Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
- *                     Sony Software Development Center Europe (SDCE), Brussels
- */
-extern void ddb5074_led_hex(int hex);
-extern void ddb5074_led_d2(int on);
-extern void ddb5074_led_d3(int on);
diff --git a/include/asm-mips/ddb5xxx/ddb5074.h b/include/asm-mips/ddb5xxx/ddb5074.h
deleted file mode 100644
index 58d88306af65..000000000000
--- a/include/asm-mips/ddb5xxx/ddb5074.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- *  include/asm-mips/ddb5074.h -- NEC DDB Vrc-5074 definitions
- *
- *  Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
- *                     Sony Software Development Center Europe (SDCE), Brussels
- */
-#ifndef _ASM_DDB5XXX_DDB5074_H
-#define _ASM_DDB5XXX_DDB5074_H
-#include <asm/nile4.h>
-#define DDB_SDRAM_SIZE      0x04000000      /* 64MB */
-#define DDB_PCI_IO_BASE     0x06000000
-#define DDB_PCI_IO_SIZE     0x02000000      /* 32 MB */
-#define DDB_PCI_MEM_BASE    0x08000000
-#define DDB_PCI_MEM_SIZE    0x08000000  /* 128 MB */
-#define DDB_PCI_CONFIG_BASE DDB_PCI_MEM_BASE
-#define DDB_PCI_CONFIG_SIZE DDB_PCI_MEM_SIZE
-#define NILE4_PCI_IO_BASE   0xa6000000
-#define NILE4_PCI_MEM_BASE  0xa8000000
-#define NILE4_PCI_CFG_BASE  NILE4_PCI_MEM_BASE
-#define DDB_PCI_IACK_BASE NILE4_PCI_IO_BASE
-#define NILE4_IRQ_BASE NUM_I8259_INTERRUPTS
-#define CPU_IRQ_BASE (NUM_NILE4_INTERRUPTS + NILE4_IRQ_BASE)
-#define CPU_NILE4_CASCADE 2
-extern void ddb5074_led_hex(int hex);
-extern void ddb5074_led_d2(int on);
-extern void ddb5074_led_d3(int on);
-extern void nile4_irq_setup(u32 base);
-#endif
diff --git a/include/asm-mips/ddb5xxx/ddb5476.h b/include/asm-mips/ddb5xxx/ddb5476.h
deleted file mode 100644
index 4c23390d9354..000000000000
--- a/include/asm-mips/ddb5xxx/ddb5476.h
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * header file specific for ddb5476
- *
- * Copyright (C) 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
-/*
- *  Memory map (physical address)
- *
- *  Note most of the following address must be properly aligned by the
- *  corresponding size.  For example, if PCI_IO_SIZE is 16MB, then
- *  PCI_IO_BASE must be aligned along 16MB boundary.
- */
-#define DDB_SDRAM_BASE          0x00000000
-#define DDB_SDRAM_SIZE          0x04000000      /* 64MB */
-#define DDB_DCS3_BASE           0x04000000      /* flash 1 */
-#define DDB_DCS3_SIZE           0x01000000      /* 16MB */
-#define DDB_DCS2_BASE           0x05000000      /* flash 2 */
-#define DDB_DCS2_SIZE           0x01000000      /* 16MB */
-#define DDB_PCI_IO_BASE         0x06000000
-#define DDB_PCI_IO_SIZE         0x02000000      /* 32 MB */
-#define DDB_PCI_MEM_BASE        0x08000000
-#define DDB_PCI_MEM_SIZE        0x08000000      /* 128 MB */
-#define DDB_DCS5_BASE           0x13000000      /* DDB status regs */
-#define DDB_DCS5_SIZE           0x00200000      /* 2MB, 8-bit */
-#define DDB_DCS4_BASE           0x14000000      /* DDB control regs */
-#define DDB_DCS4_SIZE           0x00200000      /* 2MB, 8-bit */
-#define DDB_INTCS_BASE          0x1fa00000      /* VRC5476 control regs */
-#define DDB_INTCS_SIZE          0x00200000      /* 2MB */
-#define DDB_BOOTCS_BASE         0x1fc00000      /* Boot ROM / EPROM /Flash */
-#define DDB_BOOTCS_SIZE         0x00200000      /* 2 MB - doc says 4MB */
-/* aliases */
-#define DDB_PCI_CONFIG_BASE     DDB_PCI_MEM_BASE
-#define DDB_PCI_CONFIG_SIZE     DDB_PCI_MEM_SIZE
-/* PCI intr ack share PCIW0 with PCI IO */
-#define DDB_PCI_IACK_BASE       DDB_PCI_IO_BASE
-/*
- * Interrupt mapping
- *
- * We have three interrupt controllers:
- *
- *   . CPU itself - 8 sources
- *   . i8259 - 16 sources
- *   . vrc5476 - 16 sources
- *
- *  They connected as follows:
- *    all vrc5476 interrupts are routed to cpu IP2 (by software setting)
- *    all i2869 are routed to INTC in vrc5476 (by hardware connection)
- *
- *  All VRC5476 PCI interrupts are level-triggered (no ack needed).
- *  All PCI irq but INTC are active low.
- */
-/*
- * irq number block assignment
- */
-#define NUM_CPU_IRQ             8
-#define NUM_I8259_IRQ           16
-#define NUM_VRC5476_IRQ         16
-#define DDB_IRQ_BASE            0
-#define I8259_IRQ_BASE          DDB_IRQ_BASE
-#define VRC5476_IRQ_BASE        (I8259_IRQ_BASE + NUM_I8259_IRQ)
-#define CPU_IRQ_BASE            (VRC5476_IRQ_BASE + NUM_VRC5476_IRQ)
-/*
- * vrc5476 irq defs, see page 52-64 of Vrc5074 system controller manual
- */
-#define VRC5476_IRQ_CPCE        0       /* cpu parity error */
-#define VRC5476_IRQ_CNTD        1       /* cpu no target */
-#define VRC5476_IRQ_MCE         2       /* memory check error */
-#define VRC5476_IRQ_DMA         3       /* DMA */
-#define VRC5476_IRQ_UART        4       /* vrc5476 builtin UART, not used */
-#define VRC5476_IRQ_WDOG        5       /* watchdog timer */
-#define VRC5476_IRQ_GPT         6       /* general purpose timer */
-#define VRC5476_IRQ_LBRT        7       /* local bus read timeout */
-#define VRC5476_IRQ_INTA        8       /* PCI INT #A */
-#define VRC5476_IRQ_INTB        9       /* PCI INT #B */
-#define VRC5476_IRQ_INTC        10      /* PCI INT #C */
-#define VRC5476_IRQ_INTD        11      /* PCI INT #D */
-#define VRC5476_IRQ_INTE        12      /* PCI INT #E */
-#define VRC5476_IRQ_RESERVED_13 13      /* reserved  */
-#define VRC5476_IRQ_PCIS        14      /* PCI SERR #  */
-#define VRC5476_IRQ_PCI         15      /* PCI internal error */
-/*
- * i2859 irq assignment
- */
-#define I8259_IRQ_RESERVED_0    0
-#define I8259_IRQ_KEYBOARD      1       /* M1543 default */
-#define I8259_IRQ_CASCADE       2
-#define I8259_IRQ_UART_B        3       /* M1543 default, may conflict with RTC according to schematic diagram  */
-#define I8259_IRQ_UART_A        4       /* M1543 default */
-#define I8259_IRQ_PARALLEL      5       /* M1543 default */
-#define I8259_IRQ_RESERVED_6    6
-#define I8259_IRQ_RESERVED_7    7
-#define I8259_IRQ_RTC           8       /* who set this? */
-#define I8259_IRQ_USB           9       /* ddb_setup */
-#define I8259_IRQ_PMU           10      /* ddb_setup */
-#define I8259_IRQ_RESERVED_11   11
-#define I8259_IRQ_RESERVED_12   12      /* m1543_irq_setup */
-#define I8259_IRQ_RESERVED_13   13
-#define I8259_IRQ_HDC1          14      /* default and ddb_setup */
-#define I8259_IRQ_HDC2          15      /* default */
-/*
- * misc
- */
-#define VRC5476_I8259_CASCADE   VRC5476_IRQ_INTC
-#define CPU_VRC5476_CASCADE     2
-#define is_i8259_irq(irq)       ((irq) < NUM_I8259_IRQ)
-#define nile4_to_irq(n)         ((n)+NUM_I8259_IRQ)
-#define irq_to_nile4(n)         ((n)-NUM_I8259_IRQ)
-/*
- * low-level irq functions
- */
-#ifndef __ASSEMBLY__
-extern void nile4_map_irq(int nile4_irq, int cpu_irq);
-extern void nile4_map_irq_all(int cpu_irq);
-extern void nile4_enable_irq(int nile4_irq);
-extern void nile4_disable_irq(int nile4_irq);
-extern void nile4_disable_irq_all(void);
-extern u16 nile4_get_irq_stat(int cpu_irq);
-extern void nile4_enable_irq_output(int cpu_irq);
-extern void nile4_disable_irq_output(int cpu_irq);
-extern void nile4_set_pci_irq_polarity(int pci_irq, int high);
-extern void nile4_set_pci_irq_level_or_edge(int pci_irq, int level);
-extern void nile4_clear_irq(int nile4_irq);
-extern void nile4_clear_irq_mask(u32 mask);
-extern u8 nile4_i8259_iack(void);
-extern void nile4_dump_irq_status(void);        /* Debug */
-#endif /* !__ASSEMBLY__ */
diff --git a/include/asm-mips/ddb5xxx/ddb5477.h b/include/asm-mips/ddb5xxx/ddb5477.h
index a438548e6ef3..c5af4b73fdd7 100644
--- a/include/asm-mips/ddb5xxx/ddb5477.h
+++ b/include/asm-mips/ddb5xxx/ddb5477.h
@@ -17,7 +17,6 @@
 #ifndef __ASM_DDB5XXX_DDB5477_H
 #define __ASM_DDB5XXX_DDB5477_H
-#include <linux/config.h>
 /*
 * This contains macros that are specific to DDB5477 or renamed from
diff --git a/include/asm-mips/ddb5xxx/ddb5xxx.h b/include/asm-mips/ddb5xxx/ddb5xxx.h
index 873c03f2c5fe..e97fcc8d548b 100644
--- a/include/asm-mips/ddb5xxx/ddb5xxx.h
+++ b/include/asm-mips/ddb5xxx/ddb5xxx.h
@@ -18,7 +18,6 @@
 #ifndef __ASM_DDB5XXX_DDB5XXX_H
 #define __ASM_DDB5XXX_DDB5XXX_H
-#include <linux/config.h>
 #include <linux/types.h>
 /*
@@ -174,13 +173,8 @@
 static inline void ddb_sync(void)
 {
-/* The DDB5074 doesn't seem to like these accesses. They kill the board on
- * interrupt load
- */
-#ifndef CONFIG_DDB5074
    volatile u32 *p = (volatile u32 *)0xbfc00000;
    (void)(*p);
-#endif
 }
 static inline void ddb_out32(u32 offset, u32 val)
@@ -260,11 +254,7 @@ extern void ddb_pci_reset_bus(void);
 /*
 * include the board dependent part
 */
-#if defined(CONFIG_DDB5074)
+#if defined(CONFIG_DDB5477)
-#include <asm/ddb5xxx/ddb5074.h>
-#elif defined(CONFIG_DDB5476)
-#include <asm/ddb5xxx/ddb5476.h>
-#elif defined(CONFIG_DDB5477)
 #include <asm/ddb5xxx/ddb5477.h>
 #else
 #error "Unknown DDB board!"
diff --git a/include/asm-mips/debug.h b/include/asm-mips/debug.h
index 930f2b75e766..1fd5a2b39445 100644
--- a/include/asm-mips/debug.h
+++ b/include/asm-mips/debug.h
@@ -15,7 +15,6 @@
 #ifndef _ASM_DEBUG_H
 #define _ASM_DEBUG_H
-#include <linux/config.h>
 /*
 * run-time macros for catching spurious errors.  Eable CONFIG_RUNTIME_DEBUG in
diff --git a/include/asm-mips/dec/prom.h b/include/asm-mips/dec/prom.h
index 1384dd0964b9..b9c8203688d5 100644
--- a/include/asm-mips/dec/prom.h
+++ b/include/asm-mips/dec/prom.h
@@ -15,7 +15,6 @@
 #ifndef _ASM_DEC_PROM_H
 #define _ASM_DEC_PROM_H
-#include <linux/config.h>
 #include <linux/types.h>
 #include <asm/addrspace.h>
diff --git a/include/asm-mips/delay.h b/include/asm-mips/delay.h
index 928f30f8c45c..ea77050f8e3a 100644
--- a/include/asm-mips/delay.h
+++ b/include/asm-mips/delay.h
@@ -10,7 +10,6 @@
 #ifndef _ASM_DELAY_H
 #define _ASM_DELAY_H
-#include <linux/config.h>
 #include <linux/param.h>
 #include <linux/smp.h>
 #include <asm/compiler.h>
diff --git a/include/asm-mips/dma.h b/include/asm-mips/dma.h
index 6aaf9939a716..e85849ac165f 100644
--- a/include/asm-mips/dma.h
+++ b/include/asm-mips/dma.h
@@ -12,7 +12,6 @@
 #ifndef _ASM_DMA_H
 #define _ASM_DMA_H
-#include <linux/config.h>
 #include <asm/io.h>                     /* need byte IO */
 #include <linux/spinlock.h>             /* And spinlocks */
 #include <linux/delay.h>
diff --git a/include/asm-mips/elf.h b/include/asm-mips/elf.h
index bdc9de2df1ef..ebd6bfb19d66 100644
--- a/include/asm-mips/elf.h
+++ b/include/asm-mips/elf.h
@@ -8,7 +8,6 @@
 #ifndef _ASM_ELF_H
 #define _ASM_ELF_H
-#include <linux/config.h>
 /* ELF header e_flags defines. */
 /* MIPS architecture level. */
diff --git a/include/asm-mips/emma2rh/emma2rh.h b/include/asm-mips/emma2rh/emma2rh.h
new file mode 100644
index 000000000000..4fb8df71caa9
--- /dev/null
+++ b/include/asm-mips/emma2rh/emma2rh.h
@@ -0,0 +1,330 @@
+/*
+ *  include/asm-mips/emma2rh/emma2rh.h
+ *      This file is EMMA2RH common header.
+ *
+ *  Copyright (C) NEC Electronics Corporation 2005-2006
+ *
+ *  This file based on include/asm-mips/ddb5xxx/ddb5xxx.h
+ *          Copyright 2001 MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __ASM_EMMA2RH_EMMA2RH_H
+#define __ASM_EMMA2RH_EMMA2RH_H
+/*
+ * EMMA2RH registers
+ */
+#define REGBASE 0x10000000
+#define EMMA2RH_BHIF_STRAP_0    (0x000010+REGBASE)
+#define EMMA2RH_BHIF_INT_ST_0   (0x000030+REGBASE)
+#define EMMA2RH_BHIF_INT_ST_1   (0x000034+REGBASE)
+#define EMMA2RH_BHIF_INT_ST_2   (0x000038+REGBASE)
+#define EMMA2RH_BHIF_INT_EN_0   (0x000040+REGBASE)
+#define EMMA2RH_BHIF_INT_EN_1   (0x000044+REGBASE)
+#define EMMA2RH_BHIF_INT_EN_2   (0x000048+REGBASE)
+#define EMMA2RH_BHIF_INT1_EN_0  (0x000050+REGBASE)
+#define EMMA2RH_BHIF_INT1_EN_1  (0x000054+REGBASE)
+#define EMMA2RH_BHIF_INT1_EN_2  (0x000058+REGBASE)
+#define EMMA2RH_BHIF_SW_INT     (0x000070+REGBASE)
+#define EMMA2RH_BHIF_SW_INT_EN  (0x000080+REGBASE)
+#define EMMA2RH_BHIF_SW_INT_CLR (0x000090+REGBASE)
+#define EMMA2RH_BHIF_MAIN_CTRL  (0x0000b4+REGBASE)
+#define EMMA2RH_BHIF_EXCEPT_VECT_BASE_ADDRESS   (0x0000c0+REGBASE)
+#define EMMA2RH_GPIO_DIR        (0x110d20+REGBASE)
+#define EMMA2RH_GPIO_INT_ST     (0x110d30+REGBASE)
+#define EMMA2RH_GPIO_INT_MASK   (0x110d3c+REGBASE)
+#define EMMA2RH_GPIO_INT_MODE   (0x110d48+REGBASE)
+#define EMMA2RH_GPIO_INT_CND_A  (0x110d54+REGBASE)
+#define EMMA2RH_GPIO_INT_CND_B  (0x110d60+REGBASE)
+#define EMMA2RH_PBRD_INT_EN     (0x100010+REGBASE)
+#define EMMA2RH_PBRD_CLKSEL     (0x100028+REGBASE)
+#define EMMA2RH_PFUR0_BASE      (0x101000+REGBASE)
+#define EMMA2RH_PFUR1_BASE      (0x102000+REGBASE)
+#define EMMA2RH_PFUR2_BASE      (0x103000+REGBASE)
+#define EMMA2RH_PIIC0_BASE      (0x107000+REGBASE)
+#define EMMA2RH_PIIC1_BASE      (0x108000+REGBASE)
+#define EMMA2RH_PIIC2_BASE      (0x109000+REGBASE)
+#define EMMA2RH_PCI_CONTROL     (0x200000+REGBASE)
+#define EMMA2RH_PCI_ARBIT_CTR   (0x200004+REGBASE)
+#define EMMA2RH_PCI_IWIN0_CTR   (0x200010+REGBASE)
+#define EMMA2RH_PCI_IWIN1_CTR   (0x200014+REGBASE)
+#define EMMA2RH_PCI_INIT_ESWP   (0x200018+REGBASE)
+#define EMMA2RH_PCI_INT         (0x200020+REGBASE)
+#define EMMA2RH_PCI_INT_EN      (0x200024+REGBASE)
+#define EMMA2RH_PCI_TWIN_CTR    (0x200030+REGBASE)
+#define EMMA2RH_PCI_TWIN_BADR   (0x200034+REGBASE)
+#define EMMA2RH_PCI_TWIN0_DADR  (0x200038+REGBASE)
+#define EMMA2RH_PCI_TWIN1_DADR  (0x20003c+REGBASE)
+/*
+ *  Memory map (physical address)
+ *
+ *  Note most of the following address must be properly aligned by the
+ *  corresponding size.  For example, if PCI_IO_SIZE is 16MB, then
+ *  PCI_IO_BASE must be aligned along 16MB boundary.
+ */
+/* the actual ram size is detected at run-time */
+#define EMMA2RH_RAM_BASE        0x00000000
+#define EMMA2RH_RAM_SIZE        0x10000000      /* less than 256MB */
+#define EMMA2RH_IO_BASE         0x10000000
+#define EMMA2RH_IO_SIZE         0x01000000      /* 16 MB */
+#define EMMA2RH_GENERALIO_BASE  0x11000000
+#define EMMA2RH_GENERALIO_SIZE  0x01000000      /* 16 MB */
+#define EMMA2RH_PCI_IO_BASE     0x12000000
+#define EMMA2RH_PCI_IO_SIZE     0x02000000      /* 32 MB */
+#define EMMA2RH_PCI_MEM_BASE    0x14000000
+#define EMMA2RH_PCI_MEM_SIZE    0x08000000      /* 128 MB */
+#define EMMA2RH_ROM_BASE        0x1c000000
+#define EMMA2RH_ROM_SIZE        0x04000000      /* 64 MB */
+#define EMMA2RH_PCI_CONFIG_BASE EMMA2RH_PCI_IO_BASE
+#define EMMA2RH_PCI_CONFIG_SIZE EMMA2RH_PCI_IO_SIZE
+#define NUM_CPU_IRQ             8
+#define NUM_EMMA2RH_IRQ         96
+#define CPU_EMMA2RH_CASCADE     2
+#define EMMA2RH_IRQ_BASE        0
+/*
+ * emma2rh irq defs
+ */
+#define EMMA2RH_IRQ_INT0        (0 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT1        (1 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT2        (2 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT3        (3 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT4        (4 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT5        (5 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT6        (6 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT7        (7 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT8        (8 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT9        (9 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT10       (10 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT11       (11 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT12       (12 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT13       (13 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT14       (14 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT15       (15 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT16       (16 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT17       (17 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT18       (18 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT19       (19 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT20       (20 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT21       (21 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT22       (22 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT23       (23 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT24       (24 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT25       (25 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT26       (26 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT27       (27 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT28       (28 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT29       (29 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT30       (30 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT31       (31 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT32       (32 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT33       (33 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT34       (34 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT35       (35 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT36       (36 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT37       (37 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT38       (38 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT39       (39 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT40       (40 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT41       (41 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT42       (42 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT43       (43 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT44       (44 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT45       (45 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT46       (46 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT47       (47 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT48       (48 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT49       (49 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT50       (50 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT51       (51 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT52       (52 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT53       (53 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT54       (54 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT55       (55 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT56       (56 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT57       (57 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT58       (58 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT59       (59 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT60       (60 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT61       (61 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT62       (62 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT63       (63 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_PFUR0       EMMA2RH_IRQ_INT49
+#define EMMA2RH_IRQ_PFUR1       EMMA2RH_IRQ_INT50
+#define EMMA2RH_IRQ_PFUR2       EMMA2RH_IRQ_INT51
+#define EMMA2RH_IRQ_PIIC0       EMMA2RH_IRQ_INT56
+#define EMMA2RH_IRQ_PIIC1       EMMA2RH_IRQ_INT57
+#define EMMA2RH_IRQ_PIIC2       EMMA2RH_IRQ_INT58
+/*
+ *  EMMA2RH Register Access
+ */
+#define EMMA2RH_BASE (0xa0000000)
+static inline void emma2rh_sync(void)
+{
+        volatile u32 *p = (volatile u32 *)0xbfc00000;
+        (void)(*p);
+}
+static inline void emma2rh_out32(u32 offset, u32 val)
+{
+        *(volatile u32 *)(EMMA2RH_BASE | offset) = val;
+        emma2rh_sync();
+}
+static inline u32 emma2rh_in32(u32 offset)
+{
+        u32 val = *(volatile u32 *)(EMMA2RH_BASE | offset);
+        emma2rh_sync();
+        return val;
+}
+static inline void emma2rh_out16(u32 offset, u16 val)
+{
+        *(volatile u16 *)(EMMA2RH_BASE | offset) = val;
+        emma2rh_sync();
+}
+static inline u16 emma2rh_in16(u32 offset)
+{
+        u16 val = *(volatile u16 *)(EMMA2RH_BASE | offset);
+        emma2rh_sync();
+        return val;
+}
+static inline void emma2rh_out8(u32 offset, u8 val)
+{
+        *(volatile u8 *)(EMMA2RH_BASE | offset) = val;
+        emma2rh_sync();
+}
+static inline u8 emma2rh_in8(u32 offset)
+{
+        u8 val = *(volatile u8 *)(EMMA2RH_BASE | offset);
+        emma2rh_sync();
+        return val;
+}
+/**
+ * IIC registers map
+ **/
+/*---------------------------------------------------------------------------*/
+/* CNT - Control register (00H R/W)                                          */
+/*---------------------------------------------------------------------------*/
+#define SPT         0x00000001
+#define STT         0x00000002
+#define ACKE        0x00000004
+#define WTIM        0x00000008
+#define SPIE        0x00000010
+#define WREL        0x00000020
+#define LREL        0x00000040
+#define IICE        0x00000080
+#define CNT_RESERVED    0x000000ff      /* reserved bit 0 */
+#define I2C_EMMA_START      (IICE | STT)
+#define I2C_EMMA_STOP       (IICE | SPT)
+#define I2C_EMMA_REPSTART   I2C_EMMA_START
+/*---------------------------------------------------------------------------*/
+/* STA - Status register (10H Read)                                          */
+/*---------------------------------------------------------------------------*/
+#define MSTS        0x00000080
+#define ALD         0x00000040
+#define EXC         0x00000020
+#define COI         0x00000010
+#define TRC         0x00000008
+#define ACKD        0x00000004
+#define STD         0x00000002
+#define SPD         0x00000001
+/*---------------------------------------------------------------------------*/
+/* CSEL - Clock select register (20H R/W)                                    */
+/*---------------------------------------------------------------------------*/
+#define FCL         0x00000080
+#define ND50        0x00000040
+#define CLD         0x00000020
+#define DAD         0x00000010
+#define SMC         0x00000008
+#define DFC         0x00000004
+#define CL          0x00000003
+#define CSEL_RESERVED   0x000000ff      /* reserved bit 0 */
+#define FAST397     0x0000008b
+#define FAST297     0x0000008a
+#define FAST347     0x0000000b
+#define FAST260     0x0000000a
+#define FAST130     0x00000008
+#define STANDARD108 0x00000083
+#define STANDARD83  0x00000082
+#define STANDARD95  0x00000003
+#define STANDARD73  0x00000002
+#define STANDARD36  0x00000001
+#define STANDARD71  0x00000000
+/*---------------------------------------------------------------------------*/
+/* SVA - Slave address register (30H R/W)                                    */
+/*---------------------------------------------------------------------------*/
+#define SVA         0x000000fe
+/*---------------------------------------------------------------------------*/
+/* SHR - Shift register (40H R/W)                                            */
+/*---------------------------------------------------------------------------*/
+#define SR          0x000000ff
+/*---------------------------------------------------------------------------*/
+/* INT - Interrupt register (50H R/W)                                        */
+/* INTM - Interrupt mask register (60H R/W)                                  */
+/*---------------------------------------------------------------------------*/
+#define INTE0       0x00000001
+/***********************************************************************
+ * I2C registers
+ ***********************************************************************
+ */
+#define I2C_EMMA_CNT            0x00
+#define I2C_EMMA_STA            0x10
+#define I2C_EMMA_CSEL           0x20
+#define I2C_EMMA_SVA            0x30
+#define I2C_EMMA_SHR            0x40
+#define I2C_EMMA_INT            0x50
+#define I2C_EMMA_INTM           0x60
+/*
+ * include the board dependent part
+ */
+#if defined(CONFIG_MARKEINS)
+#include <asm/emma2rh/markeins.h>
+#else
+#error "Unknown EMMA2RH board!"
+#endif
+#endif /* __ASM_EMMA2RH_EMMA2RH_H */
diff --git a/include/asm-mips/emma2rh/markeins.h b/include/asm-mips/emma2rh/markeins.h
new file mode 100644
index 000000000000..8fa766795078
--- /dev/null
+++ b/include/asm-mips/emma2rh/markeins.h
@@ -0,0 +1,76 @@
+/*
+ *  include/asm-mips/emma2rh/markeins.h
+ *      This file is EMMA2RH board depended header.
+ *
+ *  Copyright (C) NEC Electronics Corporation 2005-2006
+ *
+ *  This file based on include/asm-mips/ddb5xxx/ddb5xxx.h
+ *          Copyright 2001 MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef MARKEINS_H
+#define MARKEINS_H
+#define NUM_EMMA2RH_IRQ_SW      32
+#define NUM_EMMA2RH_IRQ_GPIO    32
+#define EMMA2RH_SW_CASCADE      (EMMA2RH_IRQ_INT7 - EMMA2RH_IRQ_INT0)
+#define EMMA2RH_GPIO_CASCADE    (EMMA2RH_IRQ_INT46 - EMMA2RH_IRQ_INT0)
+#define EMMA2RH_SW_IRQ_BASE     (EMMA2RH_IRQ_BASE + NUM_EMMA2RH_IRQ)
+#define EMMA2RH_GPIO_IRQ_BASE   (EMMA2RH_SW_IRQ_BASE + NUM_EMMA2RH_IRQ_SW)
+#define CPU_IRQ_BASE            (EMMA2RH_GPIO_IRQ_BASE + NUM_EMMA2RH_IRQ_GPIO)
+#define EMMA2RH_SW_IRQ_INT0     (0+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT1     (1+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT2     (2+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT3     (3+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT4     (4+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT5     (5+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT6     (6+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT7     (7+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT8     (8+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT9     (9+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT10    (10+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT11    (11+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT12    (12+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT13    (13+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT14    (14+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT15    (15+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT16    (16+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT17    (17+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT18    (18+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT19    (19+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT20    (20+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT21    (21+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT22    (22+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT23    (23+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT24    (24+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT25    (25+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT26    (26+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT27    (27+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT28    (28+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT29    (29+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT30    (30+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT31    (31+EMMA2RH_SW_IRQ_BASE)
+#define MARKEINS_PCI_IRQ_INTA   EMMA2RH_GPIO_IRQ_BASE+15
+#define MARKEINS_PCI_IRQ_INTB   EMMA2RH_GPIO_IRQ_BASE+16
+#define MARKEINS_PCI_IRQ_INTC   EMMA2RH_GPIO_IRQ_BASE+17
+#define MARKEINS_PCI_IRQ_INTD   EMMA2RH_GPIO_IRQ_BASE+18
+#endif /* CONFIG_MARKEINS */
diff --git a/include/asm-mips/fcntl.h b/include/asm-mips/fcntl.h
index 43d047a9a6af..787220e6c1fc 100644
--- a/include/asm-mips/fcntl.h
+++ b/include/asm-mips/fcntl.h
@@ -8,7 +8,6 @@
 #ifndef _ASM_FCNTL_H
 #define _ASM_FCNTL_H
-#include <linux/config.h>
 #define O_APPEND        0x0008
 #define O_SYNC          0x0010
diff --git a/include/asm-mips/fixmap.h b/include/asm-mips/fixmap.h
index 73a3028dd9f9..1cadefbbc037 100644
--- a/include/asm-mips/fixmap.h
+++ b/include/asm-mips/fixmap.h
@@ -13,7 +13,6 @@
 #ifndef _ASM_FIXMAP_H
 #define _ASM_FIXMAP_H
-#include <linux/config.h>
 #include <asm/page.h>
 #ifdef CONFIG_HIGHMEM
 #include <linux/threads.h>
diff --git a/include/asm-mips/fpu.h b/include/asm-mips/fpu.h
index b0f50015e252..58c561a9ec6b 100644
--- a/include/asm-mips/fpu.h
+++ b/include/asm-mips/fpu.h
@@ -10,7 +10,6 @@
 #ifndef _ASM_FPU_H
 #define _ASM_FPU_H
-#include <linux/config.h>
 #include <linux/sched.h>
 #include <linux/thread_info.h>
@@ -138,10 +137,9 @@ static inline fpureg_t *get_fpu_regs(struct task_struct *tsk)
        if (cpu_has_fpu) {
                if ((tsk == current) && __is_fpu_owner())
                        _save_fp(current);
-                return tsk->thread.fpu.hard.fpr;
        }
-        return tsk->thread.fpu.soft.fpr;
+        return tsk->thread.fpu.fpr;
 }
 #endif /* _ASM_FPU_H */
diff --git a/include/asm-mips/fpu_emulator.h b/include/asm-mips/fpu_emulator.h
index 16cb4d11dd0b..2731c38bd7ae 100644
--- a/include/asm-mips/fpu_emulator.h
+++ b/include/asm-mips/fpu_emulator.h
@@ -12,8 +12,8 @@
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
- * Further private data for which no space exists in mips_fpu_soft_struct.
+ * Further private data for which no space exists in mips_fpu_struct.
- * This should be subsumed into the mips_fpu_soft_struct structure as
+ * This should be subsumed into the mips_fpu_struct structure as
 * defined in processor.h as soon as the absurd wired absolute assembler
 * offsets become dynamic at compile time.
 *
diff --git a/include/asm-mips/futex.h b/include/asm-mips/futex.h
index 12d118f1bc9c..ed023eae0674 100644
--- a/include/asm-mips/futex.h
+++ b/include/asm-mips/futex.h
@@ -3,7 +3,6 @@
 #ifdef __KERNEL__
-#include <linux/config.h>
 #include <linux/futex.h>
 #include <asm/errno.h>
 #include <asm/uaccess.h>
@@ -22,51 +21,53 @@
                "       .set    push                            \n"     \
                "       .set    noat                            \n"     \
                "       .set    mips3                           \n"     \
-                "1:     ll      %1, (%3)        # __futex_atomic_op     \n" \
+                "1:     ll      %1, %4  # __futex_atomic_op     \n"     \
                "       .set    mips0                           \n"     \
                "       " insn  "                               \n"     \
                "       .set    mips3                           \n"     \
-                "2:     sc      $1, (%3)                        \n"     \
+                "2:     sc      $1, %2                          \n"     \
                "       beqzl   $1, 1b                          \n"     \
                __FUTEX_SMP_SYNC                                        \
                "3:                                             \n"     \
                "       .set    pop                             \n"     \
                "       .set    mips0                           \n"     \
                "       .section .fixup,\"ax\"                  \n"     \
-                "4:     li      %0, %5                          \n"     \
+                "4:     li      %0, %6                          \n"     \
                "       j       2b                              \n"     \
                "       .previous                               \n"     \
                "       .section __ex_table,\"a\"               \n"     \
                "       "__UA_ADDR "\t1b, 4b                    \n"     \
                "       "__UA_ADDR "\t2b, 4b                    \n"     \
                "       .previous                               \n"     \
-                : "=r" (ret), "=r" (oldval)                             \
+                : "=r" (ret), "=&r" (oldval), "=R" (*uaddr)             \
-                : "0" (0), "r" (uaddr), "Jr" (oparg), "i" (-EFAULT));   \
+                : "0" (0), "R" (*uaddr), "Jr" (oparg), "i" (-EFAULT)    \
+                : "memory");                                            \
        } else if (cpu_has_llsc) {                                      \
                __asm__ __volatile__(                                   \
                "       .set    push                            \n"     \
                "       .set    noat                            \n"     \
                "       .set    mips3                           \n"     \
-                "1:     ll      %1, (%3)        # __futex_atomic_op     \n" \
+                "1:     ll      %1, %4  # __futex_atomic_op     \n"     \
                "       .set    mips0                           \n"     \
                "       " insn  "                               \n"     \
                "       .set    mips3                           \n"     \
-                "2:     sc      $1, (%3)                        \n"     \
+                "2:     sc      $1, %2                          \n"     \
                "       beqz    $1, 1b                          \n"     \
                __FUTEX_SMP_SYNC                                        \
                "3:                                             \n"     \
                "       .set    pop                             \n"     \
                "       .set    mips0                           \n"     \
                "       .section .fixup,\"ax\"                  \n"     \
-                "4:     li      %0, %5                          \n"     \
+                "4:     li      %0, %6                          \n"     \
                "       j       2b                              \n"     \
                "       .previous                               \n"     \
                "       .section __ex_table,\"a\"               \n"     \
                "       "__UA_ADDR "\t1b, 4b                    \n"     \
                "       "__UA_ADDR "\t2b, 4b                    \n"     \
                "       .previous                               \n"     \
-                : "=r" (ret), "=r" (oldval)                             \
+                : "=r" (ret), "=&r" (oldval), "=R" (*uaddr)             \
-                : "0" (0), "r" (uaddr), "Jr" (oparg), "i" (-EFAULT));   \
+                : "0" (0), "R" (*uaddr), "Jr" (oparg), "i" (-EFAULT)    \
+                : "memory");                                            \
        } else                                                          \
                ret = -ENOSYS;                                          \
 }
@@ -89,23 +90,23 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
        switch (op) {
        case FUTEX_OP_SET:
-                __futex_atomic_op("move $1, %z4", ret, oldval, uaddr, oparg);
+                __futex_atomic_op("move $1, %z5", ret, oldval, uaddr, oparg);
                break;
        case FUTEX_OP_ADD:
-                __futex_atomic_op("addu $1, %1, %z4",
+                __futex_atomic_op("addu $1, %1, %z5",
                                  ret, oldval, uaddr, oparg);
                break;
        case FUTEX_OP_OR:
-                __futex_atomic_op("or   $1, %1, %z4",
+                __futex_atomic_op("or   $1, %1, %z5",
                                  ret, oldval, uaddr, oparg);
                break;
        case FUTEX_OP_ANDN:
-                __futex_atomic_op("and  $1, %1, %z4",
+                __futex_atomic_op("and  $1, %1, %z5",
                                  ret, oldval, uaddr, ~oparg);
                break;
        case FUTEX_OP_XOR:
-                __futex_atomic_op("xor  $1, %1, %z4",
+                __futex_atomic_op("xor  $1, %1, %z5",
                                  ret, oldval, uaddr, oparg);
                break;
        default:
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h
index dadc05188db7..66943c451c1d 100644
--- a/include/asm-mips/hazards.h
+++ b/include/asm-mips/hazards.h
@@ -10,7 +10,6 @@
 #ifndef _ASM_HAZARDS_H
 #define _ASM_HAZARDS_H
-#include <linux/config.h>
 #ifdef __ASSEMBLY__
diff --git a/include/asm-mips/highmem.h b/include/asm-mips/highmem.h
index 8cf598402492..c976bfaaba83 100644
--- a/include/asm-mips/highmem.h
+++ b/include/asm-mips/highmem.h
@@ -19,7 +19,6 @@
 #ifdef __KERNEL__
-#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <asm/kmap_types.h>
diff --git a/include/asm-mips/interrupt.h b/include/asm-mips/interrupt.h
index 4bb9c06f4410..a99d6867510f 100644
--- a/include/asm-mips/interrupt.h
+++ b/include/asm-mips/interrupt.h
@@ -11,7 +11,6 @@
 #ifndef _ASM_INTERRUPT_H
 #define _ASM_INTERRUPT_H
-#include <linux/config.h>
 #include <asm/hazards.h>
 __asm__ (
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 6b17eb9d79a5..df624e1ee6e2 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -12,7 +12,6 @@
 #ifndef _ASM_IO_H
 #define _ASM_IO_H
-#include <linux/config.h>
 #include <linux/compiler.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
diff --git a/include/asm-mips/ip32/machine.h b/include/asm-mips/ip32/machine.h
index e440fdf4b232..1b631b8da6f8 100644
--- a/include/asm-mips/ip32/machine.h
+++ b/include/asm-mips/ip32/machine.h
@@ -10,7 +10,6 @@
 #ifndef _ASM_IP32_MACHINE_H
 #define _ASM_IP32_MACHINE_H
-#include <linux/config.h>
 #ifdef CONFIG_SGI_IP32
diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h
index dde677f02bc0..d35c61776a02 100644
--- a/include/asm-mips/irq.h
+++ b/include/asm-mips/irq.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_IRQ_H
 #define _ASM_IRQ_H
-#include <linux/config.h>
 #include <linux/linkage.h>
 #include <asm/mipsmtregs.h>
diff --git a/include/asm-mips/isadep.h b/include/asm-mips/isadep.h
index 7bb003511d9e..24c6cda79377 100644
--- a/include/asm-mips/isadep.h
+++ b/include/asm-mips/isadep.h
@@ -5,7 +5,6 @@
 *
 * Copyright (c) 1998 Harald Koerfgen
 */
-#include <linux/config.h>
 #ifndef __ASM_ISADEP_H
 #define __ASM_ISADEP_H
diff --git a/include/asm-mips/jmr3927/irq.h b/include/asm-mips/jmr3927/irq.h
index b0c325a22343..fe551f33a74f 100644
--- a/include/asm-mips/jmr3927/irq.h
+++ b/include/asm-mips/jmr3927/irq.h
@@ -12,7 +12,6 @@
 #ifndef __ASSEMBLY__
-#include <linux/config.h>
 #include <asm/irq.h>
 struct tb_irq_space {
diff --git a/include/asm-mips/kmap_types.h b/include/asm-mips/kmap_types.h
index 6886a0c3fedf..806aae3c5338 100644
--- a/include/asm-mips/kmap_types.h
+++ b/include/asm-mips/kmap_types.h
@@ -1,7 +1,6 @@
 #ifndef _ASM_KMAP_TYPES_H
 #define _ASM_KMAP_TYPES_H
-#include <linux/config.h>
 #ifdef CONFIG_DEBUG_HIGHMEM
 # define D(n) __KM_FENCE_##n ,
diff --git a/include/asm-mips/local.h b/include/asm-mips/local.h
index c38844f615fc..9e2d43bae388 100644
--- a/include/asm-mips/local.h
+++ b/include/asm-mips/local.h
@@ -1,7 +1,6 @@
 #ifndef _ASM_LOCAL_H
 #define _ASM_LOCAL_H
-#include <linux/config.h>
 #include <linux/percpu.h>
 #include <asm/atomic.h>
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 4686e17c206c..582acd8adb81 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -35,7 +35,6 @@
 #ifndef _AU1000_H_
 #define _AU1000_H_
-#include <linux/config.h>
 #ifndef _LANGUAGE_ASSEMBLY
diff --git a/include/asm-mips/mach-au1x00/au1xxx.h b/include/asm-mips/mach-au1x00/au1xxx.h
index b7b46dd9b929..947135941033 100644
--- a/include/asm-mips/mach-au1x00/au1xxx.h
+++ b/include/asm-mips/mach-au1x00/au1xxx.h
@@ -23,7 +23,6 @@
 #ifndef _AU1XXX_H_
 #define _AU1XXX_H_
-#include <linux/config.h>
 #include <asm/mach-au1x00/au1000.h>
diff --git a/include/asm-mips/mach-au1x00/au1xxx_dbdma.h b/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
index b327bcd3fee1..d5b38a247e5a 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
@@ -34,7 +34,6 @@
 #ifndef _AU1000_DBDMA_H_
 #define _AU1000_DBDMA_H_
-#include <linux/config.h>
 #ifndef _LANGUAGE_ASSEMBLY
diff --git a/include/asm-mips/mach-au1x00/au1xxx_ide.h b/include/asm-mips/mach-au1x00/au1xxx_ide.h
index e867b4ef96d1..301e71300779 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_ide.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_ide.h
@@ -29,7 +29,6 @@
 * Note: for more information, please refer "AMD Alchemy Au1200/Au1550 IDE
 *       Interface and Linux Device Driver" Application Note.
 */
-#include <linux/config.h>
 #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
        #define DMA_WAIT_TIMEOUT        100
diff --git a/include/asm-mips/mach-au1x00/au1xxx_psc.h b/include/asm-mips/mach-au1x00/au1xxx_psc.h
index 8e5fb3c7da4d..5c3e2a38ce12 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_psc.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_psc.h
@@ -33,7 +33,6 @@
 #ifndef _AU1000_PSC_H_
 #define _AU1000_PSC_H_
-#include <linux/config.h>
 /* The PSC base addresses.  */
 #ifdef CONFIG_SOC_AU1550
diff --git a/include/asm-mips/mach-au1x00/ioremap.h b/include/asm-mips/mach-au1x00/ioremap.h
index d3ec6274575a..098fca4289bb 100644
--- a/include/asm-mips/mach-au1x00/ioremap.h
+++ b/include/asm-mips/mach-au1x00/ioremap.h
@@ -9,7 +9,6 @@
 #ifndef __ASM_MACH_AU1X00_IOREMAP_H
 #define __ASM_MACH_AU1X00_IOREMAP_H
-#include <linux/config.h>
 #include <linux/types.h>
 #ifdef CONFIG_64BIT_PHYS_ADDR
diff --git a/include/asm-mips/mach-cobalt/cpu-feature-overrides.h b/include/asm-mips/mach-cobalt/cpu-feature-overrides.h
index ace8c5ef9701..e0e08fc5d7f7 100644
--- a/include/asm-mips/mach-cobalt/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-cobalt/cpu-feature-overrides.h
@@ -8,7 +8,6 @@
 #ifndef __ASM_COBALT_CPU_FEATURE_OVERRIDES_H
 #define __ASM_COBALT_CPU_FEATURE_OVERRIDES_H
-#include <linux/config.h>
 #define cpu_has_tlb             1
 #define cpu_has_4kex            1
diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h
index 7b28b23f91ce..8fbb4b42a8b5 100644
--- a/include/asm-mips/mach-db1x00/db1x00.h
+++ b/include/asm-mips/mach-db1x00/db1x00.h
@@ -28,7 +28,6 @@
 #ifndef __ASM_DB1X00_H
 #define __ASM_DB1X00_H
-#include <linux/config.h>
 #ifdef CONFIG_MIPS_DB1550
 #define BCSR_KSEG1_ADDR 0xAF000000
diff --git a/include/asm-mips/mach-ddb5074/mc146818rtc.h b/include/asm-mips/mach-ddb5074/mc146818rtc.h
deleted file mode 100644
index 2eb9acb10a5a..000000000000
--- a/include/asm-mips/mach-ddb5074/mc146818rtc.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1998, 2001, 03 by Ralf Baechle
- *
- * RTC routines for PC style attached Dallas chip.
- */
-#ifndef __ASM_MACH_DDB5074_MC146818RTC_H
-#define __ASM_MACH_DDB5074_MC146818RTC_H
-#include <asm/ddb5xxx/ddb5074.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-#define RTC_PORT(x)     (0x70 + (x))
-#define RTC_IRQ         8
-static inline unsigned char CMOS_READ(unsigned long addr)
-{
-        return *(volatile unsigned char *)(KSEG1ADDR(DDB_PCI_MEM_BASE)+addr);
-}
-static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
-{
-        *(volatile unsigned char *)(KSEG1ADDR(DDB_PCI_MEM_BASE)+addr) = data;
-}
-#define RTC_ALWAYS_BCD  1
-#endif /* __ASM_MACH_DDB5074_MC146818RTC_H */
diff --git a/include/asm-mips/mach-dec/param.h b/include/asm-mips/mach-dec/param.h
deleted file mode 100644
index 3e4f0e390847..000000000000
--- a/include/asm-mips/mach-dec/param.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2003 by Ralf Baechle
- */
-#ifndef __ASM_MACH_DEC_PARAM_H
-#define __ASM_MACH_DEC_PARAM_H
-/*
- * log2(HZ), change this here if you want another HZ value. This is also
- * used in dec_time_init.  Minimum is 1, Maximum is 15.
- */
-#define LOG_2_HZ 7
-#define HZ (1 << LOG_2_HZ)
-#endif /* __ASM_MACH_DEC_PARAM_H */
diff --git a/include/asm-mips/mach-mips/param.h b/include/asm-mips/mach-emma2rh/irq.h
index 805ef6d27d3c..bce64244b800 100644
--- a/include/asm-mips/mach-mips/param.h
+++ b/include/asm-mips/mach-emma2rh/irq.h
@@ -5,9 +5,9 @@
 *
 * Copyright (C) 2003 by Ralf Baechle
 */
-#ifndef __ASM_MACH_MIPS_PARAM_H
+#ifndef __ASM_MACH_EMMA2RH_IRQ_H
-#define __ASM_MACH_MIPS_PARAM_H
+#define __ASM_MACH_EMMA2RH_IRQ_H
-#define HZ              100             /* Internal kernel timer frequency */
+#define NR_IRQS 256
-#endif /* __ASM_MACH_MIPS_PARAM_H */
+#endif /* __ASM_MACH_EMMA2RH_IRQ_H */
diff --git a/include/asm-mips/mach-excite/cpu-feature-overrides.h b/include/asm-mips/mach-excite/cpu-feature-overrides.h
new file mode 100644
index 000000000000..abb76b2fd865
--- /dev/null
+++ b/include/asm-mips/mach-excite/cpu-feature-overrides.h
@@ -0,0 +1,40 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2004 Thomas Koeller <thomas.koeller@baslerweb.com>
+ */
+#ifndef __ASM_MACH_EXCITE_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_EXCITE_CPU_FEATURE_OVERRIDES_H
+/*
+ * Basler eXcite has an RM9122 processor.
+ */
+#define cpu_has_watch           1
+#define cpu_has_mips16          0
+#define cpu_has_divec           0
+#define cpu_has_vce             0
+#define cpu_has_cache_cdex_p    0
+#define cpu_has_cache_cdex_s    0
+#define cpu_has_prefetch        1
+#define cpu_has_mcheck          0
+#define cpu_has_ejtag           0
+#define cpu_has_llsc            1
+#define cpu_has_vtag_icache     0
+#define cpu_has_dc_aliases      0
+#define cpu_has_ic_fills_f_dc   0
+#define cpu_has_dsp             0
+#define cpu_icache_snoops_remote_store  0
+#define cpu_has_nofpuex         0
+#define cpu_has_64bits          1
+#define cpu_has_subset_pcaches  0
+#define cpu_dcache_line_size()  32
+#define cpu_icache_line_size()  32
+#define cpu_scache_line_size()  32
+#endif /* __ASM_MACH_EXCITE_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-excite/excite.h b/include/asm-mips/mach-excite/excite.h
new file mode 100644
index 000000000000..c52610de2b3a
--- /dev/null
+++ b/include/asm-mips/mach-excite/excite.h
@@ -0,0 +1,155 @@
+#ifndef __EXCITE_H__
+#define __EXCITE_H__
+#include <linux/config.h>
+#include <linux/init.h>
+#include <asm/addrspace.h>
+#include <asm/types.h>
+#define EXCITE_CPU_EXT_CLOCK 100000000
+#if !defined(__ASSEMBLER__)
+void __init excite_kgdb_init(void);
+void excite_procfs_init(void);
+extern unsigned long memsize;
+extern char modetty[];
+extern u32 unit_id;
+#endif
+/* Base name for XICAP devices */
+#define XICAP_NAME      "xicap_gpi"
+/* OCD register offsets */
+#define LKB0            0x0038
+#define LKB5            0x0128
+#define LKM5            0x012C
+#define LKB7            0x0138
+#define LKM7            0x013c
+#define LKB8            0x0140
+#define LKM8            0x0144
+#define LKB9            0x0148
+#define LKM9            0x014c
+#define LKB10           0x0150
+#define LKM10           0x0154
+#define LKB11           0x0158
+#define LKM11           0x015c
+#define LKB12           0x0160
+#define LKM12           0x0164
+#define LKB13           0x0168
+#define LKM13           0x016c
+#define LDP0            0x0200
+#define LDP1            0x0210
+#define LDP2            0x0220
+#define LDP3            0x0230
+#define INTPIN0         0x0A40
+#define INTPIN1         0x0A44
+#define INTPIN2         0x0A48
+#define INTPIN3         0x0A4C
+#define INTPIN4         0x0A50
+#define INTPIN5         0x0A54
+#define INTPIN6         0x0A58
+#define INTPIN7         0x0A5C
+/* TITAN register offsets */
+#define CPRR            0x0004
+#define CPDSR           0x0008
+#define CPTC0R          0x000c
+#define CPTC1R          0x0010
+#define CPCFG0          0x0020
+#define CPCFG1          0x0024
+#define CPDST0A         0x0028
+#define CPDST0B         0x002c
+#define CPDST1A         0x0030
+#define CPDST1B         0x0034
+#define CPXDSTA         0x0038
+#define CPXDSTB         0x003c
+#define CPXCISRA        0x0048
+#define CPXCISRB        0x004c
+#define CPGIG0ER        0x0050
+#define CPGIG1ER        0x0054
+#define CPGRWL          0x0068
+#define CPURSLMT        0x00f8
+#define UACFG           0x0200
+#define UAINTS          0x0204
+#define SDRXFCIE        0x4828
+#define SDTXFCIE        0x4928
+#define INTP0Status0    0x1B00
+#define INTP0Mask0      0x1B04
+#define INTP0Set0       0x1B08
+#define INTP0Clear0     0x1B0C
+#define GXCFG           0x5000
+#define GXDMADRPFX      0x5018
+#define GXDMA_DESCADR   0x501c
+#define GXCH0TDESSTRT   0x5054
+/* IRQ definitions */
+#define NMICONFIG               0xac0
+#define TITAN_MSGINT    0xc4
+#define TITAN_IRQ       ((TITAN_MSGINT / 0x20) + 2)
+#define FPGA0_MSGINT    0x5a
+#define FPGA0_IRQ       ((FPGA0_MSGINT / 0x20) + 2)
+#define FPGA1_MSGINT    0x7b
+#define FPGA1_IRQ       ((FPGA1_MSGINT / 0x20) + 2)
+#define PHY_MSGINT      0x9c
+#define PHY_IRQ         ((PHY_MSGINT   / 0x20) + 2)
+#if defined(CONFIG_BASLER_EXCITE_PROTOTYPE)
+/* Pre-release units used interrupt pin #9 */
+#define USB_IRQ         11
+#else
+/* Re-designed units use interrupt pin #1 */
+#define USB_MSGINT      0x39
+#define USB_IRQ         ((USB_MSGINT / 0x20) + 2)
+#endif
+#define TIMER_IRQ       12
+/* Device address ranges */
+#define EXCITE_OFFS_OCD         0x1fffc000
+#define EXCITE_SIZE_OCD         (16 * 1024)
+#define EXCITE_PHYS_OCD         CPHYSADDR(EXCITE_OFFS_OCD)
+#define EXCITE_ADDR_OCD         CKSEG1ADDR(EXCITE_OFFS_OCD)
+#define EXCITE_OFFS_SCRAM       0x1fffa000
+#define EXCITE_SIZE_SCRAM       (8 << 10)
+#define EXCITE_PHYS_SCRAM       CPHYSADDR(EXCITE_OFFS_SCRAM)
+#define EXCITE_ADDR_SCRAM       CKSEG1ADDR(EXCITE_OFFS_SCRAM)
+#define EXCITE_OFFS_PCI_IO      0x1fff8000
+#define EXCITE_SIZE_PCI_IO      (8 << 10)
+#define EXCITE_PHYS_PCI_IO      CPHYSADDR(EXCITE_OFFS_PCI_IO)
+#define EXCITE_ADDR_PCI_IO      CKSEG1ADDR(EXCITE_OFFS_PCI_IO)
+#define EXCITE_OFFS_TITAN       0x1fff0000
+#define EXCITE_SIZE_TITAN       (32 << 10)
+#define EXCITE_PHYS_TITAN       CPHYSADDR(EXCITE_OFFS_TITAN)
+#define EXCITE_ADDR_TITAN       CKSEG1ADDR(EXCITE_OFFS_TITAN)
+#define EXCITE_OFFS_PCI_MEM     0x1ffe0000
+#define EXCITE_SIZE_PCI_MEM     (64 << 10)
+#define EXCITE_PHYS_PCI_MEM     CPHYSADDR(EXCITE_OFFS_PCI_MEM)
+#define EXCITE_ADDR_PCI_MEM     CKSEG1ADDR(EXCITE_OFFS_PCI_MEM)
+#define EXCITE_OFFS_FPGA        0x1ffdc000
+#define EXCITE_SIZE_FPGA        (16 << 10)
+#define EXCITE_PHYS_FPGA        CPHYSADDR(EXCITE_OFFS_FPGA)
+#define EXCITE_ADDR_FPGA        CKSEG1ADDR(EXCITE_OFFS_FPGA)
+#define EXCITE_OFFS_NAND        0x1ffd8000
+#define EXCITE_SIZE_NAND        (16 << 10)
+#define EXCITE_PHYS_NAND        CPHYSADDR(EXCITE_OFFS_NAND)
+#define EXCITE_ADDR_NAND        CKSEG1ADDR(EXCITE_OFFS_NAND)
+#define EXCITE_OFFS_BOOTROM     0x1f000000
+#define EXCITE_SIZE_BOOTROM     (8 << 20)
+#define EXCITE_PHYS_BOOTROM     CPHYSADDR(EXCITE_OFFS_BOOTROM)
+#define EXCITE_ADDR_BOOTROM     CKSEG1ADDR(EXCITE_OFFS_BOOTROM)
+/* FPGA address offsets */
+#define EXCITE_FPGA_DPR         0x0104  /* dual-ported ram */
+#define EXCITE_FPGA_SYSCTL      0x0200  /* system control register block */
+#endif /* __EXCITE_H__ */
diff --git a/include/asm-mips/mach-excite/excite_nandflash.h b/include/asm-mips/mach-excite/excite_nandflash.h
new file mode 100644
index 000000000000..c4cf6140622e
--- /dev/null
+++ b/include/asm-mips/mach-excite/excite_nandflash.h
@@ -0,0 +1,7 @@
+#ifndef __EXCITE_NANDFLASH_H__
+#define __EXCITE_NANDFLASH_H__
+/* Resource names */
+#define EXCITE_NANDFLASH_RESOURCE_REGS  "excite_nandflash_regs"
+#endif /* __EXCITE_NANDFLASH_H__ */
diff --git a/include/asm-mips/mach-excite/rm9k_eth.h b/include/asm-mips/mach-excite/rm9k_eth.h
new file mode 100644
index 000000000000..94705a46f72e
--- /dev/null
+++ b/include/asm-mips/mach-excite/rm9k_eth.h
@@ -0,0 +1,23 @@
+#if !defined(__RM9K_ETH_H__)
+#define __RM9K_ETH_H__
+#define RM9K_GE_NAME                    "rm9k_ge"
+/* Resource names */
+#define RM9K_GE_RESOURCE_MAC            "rm9k_ge_mac"
+#define RM9K_GE_RESOURCE_MSTAT          "rm9k_ge_mstat"
+#define RM9K_GE_RESOURCE_PKTPROC        "rm9k_ge_pktproc"
+#define RM9K_GE_RESOURCE_XDMA           "rm9k_ge_xdma"
+#define RM9K_GE_RESOURCE_FIFO_RX        "rm9k_ge_fifo_rx"
+#define RM9K_GE_RESOURCE_FIFO_TX        "rm9k_ge_fifo_tx"
+#define RM9K_GE_RESOURCE_FIFOMEM_RX     "rm9k_ge_fifo_memory_rx"
+#define RM9K_GE_RESOURCE_FIFOMEM_TX     "rm9k_ge_fifo_memory_tx"
+#define RM9K_GE_RESOURCE_PHY            "rm9k_ge_phy"
+#define RM9K_GE_RESOURCE_DMADESC_RX     "rm9k_ge_dmadesc_rx"
+#define RM9K_GE_RESOURCE_DMADESC_TX     "rm9k_ge_dmadesc_tx"
+#define RM9K_GE_RESOURCE_IRQ_MAIN       "rm9k_ge_irq_main"
+#define RM9K_GE_RESOURCE_IRQ_PHY        "rm9k_ge_irq_phy"
+#define RM9K_GE_RESOURCE_GPI_SLICE      "rm9k_ge_gpi_slice"
+#define RM9K_GE_RESOURCE_MDIO_CHANNEL   "rm9k_ge_mdio_channel"
+#endif /* !defined(__RM9K_ETH_H__) */
diff --git a/include/asm-mips/mach-excite/rm9k_wdt.h b/include/asm-mips/mach-excite/rm9k_wdt.h
new file mode 100644
index 000000000000..3fa3c08d2da7
--- /dev/null
+++ b/include/asm-mips/mach-excite/rm9k_wdt.h
@@ -0,0 +1,12 @@
+#ifndef __RM9K_WDT_H__
+#define __RM9K_WDT_H__
+/* Device name */
+#define WDT_NAME                "wdt_gpi"
+/* Resource names */
+#define WDT_RESOURCE_REGS       "excite_watchdog_regs"
+#define WDT_RESOURCE_IRQ        "excite_watchdog_irq"
+#define WDT_RESOURCE_COUNTER    "excite_watchdog_counter"
+#endif /* __RM9K_WDT_H__ */
diff --git a/include/asm-mips/mach-excite/rm9k_xicap.h b/include/asm-mips/mach-excite/rm9k_xicap.h
new file mode 100644
index 000000000000..009577734a8d
--- /dev/null
+++ b/include/asm-mips/mach-excite/rm9k_xicap.h
@@ -0,0 +1,16 @@
+#ifndef __EXCITE_XICAP_H__
+#define __EXCITE_XICAP_H__
+/* Resource names */
+#define XICAP_RESOURCE_FIFO_RX          "xicap_fifo_rx"
+#define XICAP_RESOURCE_FIFO_TX          "xicap_fifo_tx"
+#define XICAP_RESOURCE_XDMA             "xicap_xdma"
+#define XICAP_RESOURCE_DMADESC          "xicap_dmadesc"
+#define XICAP_RESOURCE_PKTPROC          "xicap_pktproc"
+#define XICAP_RESOURCE_IRQ              "xicap_irq"
+#define XICAP_RESOURCE_GPI_SLICE        "xicap_gpi_slice"
+#define XICAP_RESOURCE_FIFO_BLK         "xicap_fifo_blocks"
+#define XICAP_RESOURCE_PKT_STREAM       "xicap_pkt_stream"
+#endif /* __EXCITE_XICAP_H__ */
diff --git a/include/asm-mips/mach-generic/ide.h b/include/asm-mips/mach-generic/ide.h
index e3315359500a..6eba2e576aaa 100644
--- a/include/asm-mips/mach-generic/ide.h
+++ b/include/asm-mips/mach-generic/ide.h
@@ -15,7 +15,6 @@
 #ifdef __KERNEL__
-#include <linux/config.h>
 #include <linux/pci.h>
 #include <linux/stddef.h>
 #include <asm/processor.h>
diff --git a/include/asm-mips/mach-generic/kmalloc.h b/include/asm-mips/mach-generic/kmalloc.h
index 373d66dee9d7..410ab5f6c563 100644
--- a/include/asm-mips/mach-generic/kmalloc.h
+++ b/include/asm-mips/mach-generic/kmalloc.h
@@ -1,7 +1,6 @@
 #ifndef __ASM_MACH_GENERIC_KMALLOC_H
 #define __ASM_MACH_GENERIC_KMALLOC_H
-#include <linux/config.h>
 #ifndef CONFIG_DMA_COHERENT
 /*
diff --git a/include/asm-mips/mach-generic/param.h b/include/asm-mips/mach-generic/param.h
deleted file mode 100644
index a0d12f964e4f..000000000000
--- a/include/asm-mips/mach-generic/param.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2003 by Ralf Baechle
- */
-#ifndef __ASM_MACH_GENERIC_PARAM_H
-#define __ASM_MACH_GENERIC_PARAM_H
-#define HZ              1000            /* Internal kernel timer frequency */
-#endif /* __ASM_MACH_GENERIC_PARAM_H */
diff --git a/include/asm-mips/mach-generic/spaces.h b/include/asm-mips/mach-generic/spaces.h
index b849d8dd7e78..0ae9997bc9a8 100644
--- a/include/asm-mips/mach-generic/spaces.h
+++ b/include/asm-mips/mach-generic/spaces.h
@@ -10,7 +10,6 @@
 #ifndef _ASM_MACH_GENERIC_SPACES_H
 #define _ASM_MACH_GENERIC_SPACES_H
-#include <linux/config.h>
 #ifdef CONFIG_32BIT
diff --git a/include/asm-mips/mach-ip22/cpu-feature-overrides.h b/include/asm-mips/mach-ip22/cpu-feature-overrides.h
index 2a37bedb4053..f7c5dc8a5336 100644
--- a/include/asm-mips/mach-ip22/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ip22/cpu-feature-overrides.h
@@ -13,7 +13,7 @@
 */
 #define cpu_has_tlb             1
 #define cpu_has_4kex            1
-#define cpu_has_4kcache         1
+#define cpu_has_4k_cache        1
 #define cpu_has_fpu             1
 #define cpu_has_32fpr           1
 #define cpu_has_counter         1
diff --git a/include/asm-mips/mach-ip22/spaces.h b/include/asm-mips/mach-ip22/spaces.h
index 8385f716798d..ab20c026fd19 100644
--- a/include/asm-mips/mach-ip22/spaces.h
+++ b/include/asm-mips/mach-ip22/spaces.h
@@ -10,7 +10,6 @@
 #ifndef _ASM_MACH_IP22_SPACES_H
 #define _ASM_MACH_IP22_SPACES_H
-#include <linux/config.h>
 #ifdef CONFIG_32BIT
diff --git a/include/asm-mips/mach-ip27/cpu-feature-overrides.h b/include/asm-mips/mach-ip27/cpu-feature-overrides.h
index 2d2f5b91e47f..19c2d135985b 100644
--- a/include/asm-mips/mach-ip27/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ip27/cpu-feature-overrides.h
@@ -31,6 +31,9 @@
 #define cpu_has_nofpuex         0
 #define cpu_has_64bits          1
+#define cpu_has_4kex            1
+#define cpu_has_4k_cache        1
 #define cpu_has_subset_pcaches  1
 #define cpu_dcache_line_size()  32
diff --git a/include/asm-mips/mach-ip32/cpu-feature-overrides.h b/include/asm-mips/mach-ip32/cpu-feature-overrides.h
index 36070b5654ab..2a3de092bf13 100644
--- a/include/asm-mips/mach-ip32/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ip32/cpu-feature-overrides.h
@@ -9,7 +9,6 @@
 #ifndef __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H
 #define __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H
-#include <linux/config.h>
 /*
 * R5000 has an interesting "restriction":  ll(d)/sc(d)
@@ -38,6 +37,8 @@
 #define cpu_has_vtag_icache     0
 #define cpu_has_ic_fills_f_dc   0
 #define cpu_has_dsp             0
+#define cpu_has_4k_cache        1
 #define cpu_has_mips32r1        0
 #define cpu_has_mips32r2        0
diff --git a/include/asm-mips/mach-ip32/kmalloc.h b/include/asm-mips/mach-ip32/kmalloc.h
index 9d2d4d9ac036..f6198a21fba1 100644
--- a/include/asm-mips/mach-ip32/kmalloc.h
+++ b/include/asm-mips/mach-ip32/kmalloc.h
@@ -1,7 +1,6 @@
 #ifndef __ASM_MACH_IP32_KMALLOC_H
 #define __ASM_MACH_IP32_KMALLOC_H
-#include <linux/config.h>
 #if defined(CONFIG_CPU_R5000) || defined (CONFIG_CPU_RM7000)
 #define ARCH_KMALLOC_MINALIGN   32
diff --git a/include/asm-mips/mach-jazz/param.h b/include/asm-mips/mach-jazz/param.h
deleted file mode 100644
index 639763a517bc..000000000000
--- a/include/asm-mips/mach-jazz/param.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2003 by Ralf Baechle
- */
-#ifndef __ASM_MACH_JAZZ_PARAM_H
-#define __ASM_MACH_JAZZ_PARAM_H
-/*
- * Jazz is currently using the internal 100Hz timer of the R4030
- */
-#define HZ              100             /* Internal kernel timer frequency */
-#endif /* __ASM_MACH_JAZZ_PARAM_H */
diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-mips/cpu-feature-overrides.h
index e06af6c86f86..e960679f54ba 100644
--- a/include/asm-mips/mach-mips/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-mips/cpu-feature-overrides.h
@@ -9,7 +9,6 @@
 #ifndef __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H
 #define __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H
-#include <linux/config.h>
 /*
 * CPU feature overrides for MIPS boards
@@ -17,7 +16,7 @@
 #ifdef CONFIG_CPU_MIPS32
 #define cpu_has_tlb             1
 #define cpu_has_4kex            1
-#define cpu_has_4kcache         1
+#define cpu_has_4k_cache        1
 /* #define cpu_has_fpu          ? */
 /* #define cpu_has_32fpr        ? */
 #define cpu_has_counter         1
@@ -47,7 +46,7 @@
 #ifdef CONFIG_CPU_MIPS64
 #define cpu_has_tlb             1
 #define cpu_has_4kex            1
-#define cpu_has_4kcache         1
+#define cpu_has_4k_cache        1
 /* #define cpu_has_fpu          ? */
 /* #define cpu_has_32fpr        ? */
 #define cpu_has_counter         1
diff --git a/include/asm-mips/mach-mips/irq.h b/include/asm-mips/mach-mips/irq.h
index f8579696ca54..083d9c512a04 100644
--- a/include/asm-mips/mach-mips/irq.h
+++ b/include/asm-mips/mach-mips/irq.h
@@ -1,7 +1,6 @@
 #ifndef __ASM_MACH_MIPS_IRQ_H
 #define __ASM_MACH_MIPS_IRQ_H
-#include <linux/config.h>
 #define NR_IRQS 256
diff --git a/include/asm-mips/mach-pb1x00/pb1550.h b/include/asm-mips/mach-pb1x00/pb1550.h
index 9578ead11e8a..9a4955ce3b4a 100644
--- a/include/asm-mips/mach-pb1x00/pb1550.h
+++ b/include/asm-mips/mach-pb1x00/pb1550.h
@@ -27,7 +27,6 @@
 #ifndef __ASM_PB1550_H
 #define __ASM_PB1550_H
-#include <linux/config.h>
 #include <linux/types.h>
 #define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
diff --git a/include/asm-mips/mach-qemu/param.h b/include/asm-mips/mach-qemu/param.h
deleted file mode 100644
index cb30ee490ae6..000000000000
--- a/include/asm-mips/mach-qemu/param.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2005 by Ralf Baechle
- */
-#ifndef __ASM_MACH_QEMU_PARAM_H
-#define __ASM_MACH_QEMU_PARAM_H
-#define HZ              100             /* Internal kernel timer frequency */
-#endif /* __ASM_MACH_QEMU_PARAM_H */
diff --git a/include/asm-mips/mach-rm200/cpu-feature-overrides.h b/include/asm-mips/mach-rm200/cpu-feature-overrides.h
index 91e7cf5f2bfe..11410ae10d36 100644
--- a/include/asm-mips/mach-rm200/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-rm200/cpu-feature-overrides.h
@@ -14,7 +14,7 @@
 #define cpu_has_tlb             1
 #define cpu_has_4kex            1
-#define cpu_has_4kcache         1
+#define cpu_has_4k_cache        1
 #define cpu_has_fpu             1
 #define cpu_has_32fpr           1
 #define cpu_has_counter         1
@@ -35,10 +35,8 @@
 #define cpu_has_nofpuex         0
 #define cpu_has_64bits          1
-#define cpu_has_subset_pcaches  0       /* No S-cache on R5000 I think ...  */
 #define cpu_dcache_line_size()  32
 #define cpu_icache_line_size()  32
-#define cpu_scache_line_size()  0       /* No S-cache on R5000 I think ...  */
 #define cpu_has_mips32r1        0
 #define cpu_has_mips32r2        0
diff --git a/include/asm-mips/mach-sim/cpu-feature-overrides.h b/include/asm-mips/mach-sim/cpu-feature-overrides.h
index cadbe8eda79c..d736bdadb6df 100644
--- a/include/asm-mips/mach-sim/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-sim/cpu-feature-overrides.h
@@ -8,7 +8,6 @@
 #ifndef __ASM_MACH_SIM_CPU_FEATURE_OVERRIDES_H
 #define __ASM_MACH_SIM_CPU_FEATURE_OVERRIDES_H
-#include <linux/config.h>
 /*
 * CPU feature overrides for MIPS boards
@@ -16,7 +15,7 @@
 #ifdef CONFIG_CPU_MIPS32
 #define cpu_has_tlb             1
 #define cpu_has_4kex            1
-#define cpu_has_4kcache         1
+#define cpu_has_4k_cache        1
 #define cpu_has_fpu             0
 /* #define cpu_has_32fpr        ? */
 #define cpu_has_counter         1
@@ -41,7 +40,7 @@
 #ifdef CONFIG_CPU_MIPS64
 #define cpu_has_tlb             1
 #define cpu_has_4kex            1
-#define cpu_has_4kcache         1
+#define cpu_has_4k_cache        1
 /* #define cpu_has_fpu          ? */
 /* #define cpu_has_32fpr        ? */
 #define cpu_has_counter         1
diff --git a/include/asm-mips/mach-wrppmc/mach-gt64120.h b/include/asm-mips/mach-wrppmc/mach-gt64120.h
new file mode 100644
index 000000000000..ba9205a04582
--- /dev/null
+++ b/include/asm-mips/mach-wrppmc/mach-gt64120.h
@@ -0,0 +1,84 @@
+/*
+ * This is a direct copy of the ev96100.h file, with a global
+ * search and replace.  The numbers are the same.
+ *
+ * The reason I'm duplicating this is so that the 64120/96100
+ * defines won't be confusing in the source code.
+ */
+#ifndef __ASM_MIPS_GT64120_H
+#define __ASM_MIPS_GT64120_H
+/*
+ * This is the CPU physical memory map of PPMC Board:
+ *
+ *    0x00000000-0x03FFFFFF      - 64MB SDRAM (SCS[0]#)
+ *    0x1C000000-0x1C000000      - LED (CS0)
+ *    0x1C800000-0x1C800007      - UART 16550 port (CS1)
+ *    0x1F000000-0x1F000000      - MailBox (CS3)
+ *    0x1FC00000-0x20000000      - 4MB Flash (BOOT CS)
+ */
+#define WRPPMC_SDRAM_SCS0_BASE  0x00000000
+#define WRPPMC_SDRAM_SCS0_SIZE  0x04000000
+#define WRPPMC_UART16550_BASE   0x1C800000
+#define WRPPMC_UART16550_CLOCK  3686400 /* 3.68MHZ */
+#define WRPPMC_LED_BASE         0x1C000000
+#define WRPPMC_MBOX_BASE        0x1F000000
+#define WRPPMC_BOOTROM_BASE     0x1FC00000
+#define WRPPMC_BOOTROM_SIZE     0x00400000 /* 4M Flash */
+#define WRPPMC_MIPS_TIMER_IRQ   7 /* MIPS compare/count timer interrupt */
+#define WRPPMC_UART16550_IRQ    6
+#define WRPPMC_PCI_INTA_IRQ     3
+/*
+ * PCI Bus I/O and Memory resources allocation
+ *
+ * NOTE: We only have PCI_0 hose interface
+ */
+#define GT_PCI_MEM_BASE 0x13000000UL
+#define GT_PCI_MEM_SIZE 0x02000000UL
+#define GT_PCI_IO_BASE  0x11000000UL
+#define GT_PCI_IO_SIZE  0x02000000UL
+#define GT_ISA_IO_BASE  PCI_IO_BASE
+/*
+ * PCI interrupts will come in on either the INTA or INTD interrups lines,
+ * which are mapped to the #2 and #5 interrupt pins of the MIPS.  On our
+ * boards, they all either come in on IntD or they all come in on IntA, they
+ * aren't mixed. There can be numerous PCI interrupts, so we keep a list of the
+ * "requested" interrupt numbers and go through the list whenever we get an
+ * IntA/D.
+ *
+ * Interrupts < 8 are directly wired to the processor; PCI INTA is 8 and
+ * INTD is 11.
+ */
+#define GT_TIMER        4
+#define GT_INTA         2
+#define GT_INTD         5
+#ifndef __ASSEMBLY__
+/*
+ * GT64120 internal register space base address
+ */
+extern unsigned long gt64120_base;
+#define GT64120_BASE    (gt64120_base)
+/* define WRPPMC_EARLY_DEBUG to enable early output something to UART */
+#undef WRPPMC_EARLY_DEBUG
+#ifdef WRPPMC_EARLY_DEBUG
+extern void wrppmc_led_on(int mask);
+extern void wrppmc_led_off(int mask);
+extern void wrppmc_early_printk(const char *fmt, ...);
+#else
+#define wrppmc_early_printk(fmt, ...) do {} while (0)
+#endif /* WRPPMC_EARLY_DEBUG */
+#endif /* __ASSEMBLY__ */
+#endif /* __ASM_MIPS_GT64120_H */
diff --git a/include/asm-mips/mips-boards/generic.h b/include/asm-mips/mips-boards/generic.h
index fa8b913cc3e0..b98f1658cfd0 100644
--- a/include/asm-mips/mips-boards/generic.h
+++ b/include/asm-mips/mips-boards/generic.h
@@ -20,7 +20,6 @@
 #ifndef __ASM_MIPS_BOARDS_GENERIC_H
 #define __ASM_MIPS_BOARDS_GENERIC_H
-#include <linux/config.h>
 #include <asm/addrspace.h>
 #include <asm/byteorder.h>
 #include <asm/mips-boards/bonito64.h>
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index 5af7517fce8a..673977901ed3 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -13,7 +13,6 @@
 #ifndef _ASM_MIPSREGS_H
 #define _ASM_MIPSREGS_H
-#include <linux/config.h>
 #include <linux/linkage.h>
 #include <asm/hazards.h>
@@ -1451,12 +1450,10 @@ static inline void __emt(unsigned int previous)
 {
        if ((previous & __EMT_ENABLE))
                __asm__ __volatile__(
-                "       .set    noreorder                               \n"
                "       .set    mips32r2                                \n"
                "       .word   0x41600be1              # emt           \n"
                "       ehb                                             \n"
-                "       .set    mips0                                   \n"
+                "       .set    mips0                                   \n");
-                "       .set    reorder                                 \n");
 }
 static inline void __ehb(void)
diff --git a/include/asm-mips/mmu_context.h b/include/asm-mips/mmu_context.h
index 6e09f4c87211..18b69de87daa 100644
--- a/include/asm-mips/mmu_context.h
+++ b/include/asm-mips/mmu_context.h
@@ -11,7 +11,6 @@
 #ifndef _ASM_MMU_CONTEXT_H
 #define _ASM_MMU_CONTEXT_H
-#include <linux/config.h>
 #include <linux/errno.h>
 #include <linux/sched.h>
 #include <linux/slab.h>
diff --git a/include/asm-mips/mmzone.h b/include/asm-mips/mmzone.h
index 7bde4432092b..dc231c89bef9 100644
--- a/include/asm-mips/mmzone.h
+++ b/include/asm-mips/mmzone.h
@@ -5,7 +5,6 @@
 #ifndef _ASM_MMZONE_H_
 #define _ASM_MMZONE_H_
-#include <linux/config.h>
 #include <asm/page.h>
 #include <mmzone.h>
@@ -14,17 +13,6 @@
 #define kvaddr_to_nid(kvaddr)   pa_to_nid(__pa(kvaddr))
 #define pfn_to_nid(pfn)         pa_to_nid((pfn) << PAGE_SHIFT)
-#define pfn_valid(pfn)                                          \
-({                                                              \
-        unsigned long __pfn = (pfn);                            \
-        int __n = pfn_to_nid(__pfn);                            \
-        ((__n >= 0) ? (__pfn < NODE_DATA(__n)->node_start_pfn + \
-                       NODE_DATA(__n)->node_spanned_pages) : 0);\
-})
-/* XXX: FIXME -- wli */
-#define kern_addr_valid(addr)   (0)
 #endif /* CONFIG_DISCONTIGMEM */
 #endif /* _ASM_MMZONE_H_ */
diff --git a/include/asm-mips/module.h b/include/asm-mips/module.h
index 2af496c78c12..399d03f1c4fc 100644
--- a/include/asm-mips/module.h
+++ b/include/asm-mips/module.h
@@ -1,7 +1,6 @@
 #ifndef _ASM_MODULE_H
 #define _ASM_MODULE_H
-#include <linux/config.h>
 #include <linux/list.h>
 #include <asm/uaccess.h>
diff --git a/include/asm-mips/msgbuf.h b/include/asm-mips/msgbuf.h
index a1533959742e..0d6c7f14de31 100644
--- a/include/asm-mips/msgbuf.h
+++ b/include/asm-mips/msgbuf.h
@@ -1,7 +1,6 @@
 #ifndef _ASM_MSGBUF_H
 #define _ASM_MSGBUF_H
-#include <linux/config.h>
 /*
 * The msqid64_ds structure for the MIPS architecture.
diff --git a/include/asm-mips/paccess.h b/include/asm-mips/paccess.h
index 46f2d23d2697..147844ef103b 100644
--- a/include/asm-mips/paccess.h
+++ b/include/asm-mips/paccess.h
@@ -13,7 +13,6 @@
 #ifndef _ASM_PACCESS_H
 #define _ASM_PACCESS_H
-#include <linux/config.h>
 #include <linux/errno.h>
 #ifdef CONFIG_32BIT
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index 4035ec79ecd4..6b97744f00cd 100644
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_PAGE_H
 #define _ASM_PAGE_H
-#include <linux/config.h>
 #ifdef __KERNEL__
@@ -145,6 +144,25 @@ typedef struct { unsigned long pgprot; } pgprot_t;
 #endif
 #endif
+#ifdef CONFIG_FLATMEM
+#define pfn_valid(pfn)          ((pfn) < max_mapnr)
+#elif defined(CONFIG_NEED_MULTIPLE_NODES)
+#define pfn_valid(pfn)                                                  \
+({                                                                      \
+        unsigned long __pfn = (pfn);                                    \
+        int __n = pfn_to_nid(__pfn);                                    \
+        ((__n >= 0) ? (__pfn < NODE_DATA(__n)->node_start_pfn +         \
+                               NODE_DATA(__n)->node_spanned_pages)      \
+                    : 0);                                               \
+})
+#else
+#error Provide a definition of pfn_valid
+#endif
 #define virt_to_page(kaddr)     pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
 #define virt_addr_valid(kaddr)  pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
diff --git a/include/asm-mips/param.h b/include/asm-mips/param.h
index 2bead8273ced..1d9bb8c5ab24 100644
--- a/include/asm-mips/param.h
+++ b/include/asm-mips/param.h
@@ -11,7 +11,7 @@
 #ifdef __KERNEL__
-# include <param.h>                     /* Internal kernel timer frequency */
+# define HZ             CONFIG_HZ       /* Internal kernel timer frequency */
 # define USER_HZ        100             /* .. some user interfaces are in "ticks" */
 # define CLOCKS_PER_SEC (USER_HZ)       /* like times() */
 #endif
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index 6c9ad8171a77..c4d68bebdca6 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -6,7 +6,6 @@
 #ifndef _ASM_PCI_H
 #define _ASM_PCI_H
-#include <linux/config.h>
 #include <linux/mm.h>
 #ifdef __KERNEL__
diff --git a/include/asm-mips/pci/bridge.h b/include/asm-mips/pci/bridge.h
index b4ee995c56e6..0c45e7598f3f 100644
--- a/include/asm-mips/pci/bridge.h
+++ b/include/asm-mips/pci/bridge.h
@@ -15,6 +15,7 @@
 #include <linux/types.h>
 #include <linux/pci.h>
 #include <asm/xtalk/xwidget.h>          /* generic widget header */
+#include <asm/sn/types.h>
 /* I/O page size */
@@ -848,4 +849,6 @@ struct bridge_controller {
 extern void register_bridge_irq(unsigned int irq);
 extern int request_bridge_irq(struct bridge_controller *bc);
+extern struct pci_ops bridge_pci_ops;
 #endif /* _ASM_PCI_BRIDGE_H */
diff --git a/include/asm-mips/pgalloc.h b/include/asm-mips/pgalloc.h
index fe1df572318b..582c1fe6cc4a 100644
--- a/include/asm-mips/pgalloc.h
+++ b/include/asm-mips/pgalloc.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_PGALLOC_H
 #define _ASM_PGALLOC_H
-#include <linux/config.h>
 #include <linux/highmem.h>
 #include <linux/mm.h>
diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h
index 087c20769256..4b26d8528133 100644
--- a/include/asm-mips/pgtable-32.h
+++ b/include/asm-mips/pgtable-32.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_PGTABLE_32_H
 #define _ASM_PGTABLE_32_H
-#include <linux/config.h>
 #include <asm/addrspace.h>
 #include <asm/page.h>
diff --git a/include/asm-mips/pgtable-64.h b/include/asm-mips/pgtable-64.h
index 2faf5c9ff127..e3db93212eab 100644
--- a/include/asm-mips/pgtable-64.h
+++ b/include/asm-mips/pgtable-64.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_PGTABLE_64_H
 #define _ASM_PGTABLE_64_H
-#include <linux/config.h>
 #include <linux/linkage.h>
 #include <asm/addrspace.h>
diff --git a/include/asm-mips/pgtable-bits.h b/include/asm-mips/pgtable-bits.h
index 01e76e932e3f..7494ba91112a 100644
--- a/include/asm-mips/pgtable-bits.h
+++ b/include/asm-mips/pgtable-bits.h
@@ -10,7 +10,6 @@
 #ifndef _ASM_PGTABLE_BITS_H
 #define _ASM_PGTABLE_BITS_H
-#include <linux/config.h>
 /*
 * Note that we shift the lower 32bits of each EntryLo[01] entry
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index d0af2a3b0152..a36ca1be17f2 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -8,7 +8,6 @@
 #ifndef _ASM_PGTABLE_H
 #define _ASM_PGTABLE_H
-#include <linux/config.h>
 #ifdef CONFIG_32BIT
 #include <asm/pgtable-32.h>
 #endif
@@ -379,9 +378,7 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
        __update_cache(vma, address, pte);
 }
-#ifndef CONFIG_NEED_MULTIPLE_NODES
 #define kern_addr_valid(addr)   (1)
-#endif
 #ifdef CONFIG_64BIT_PHYS_ADDR
 extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot);
diff --git a/include/asm-mips/prefetch.h b/include/asm-mips/prefetch.h
index 71293ec1657c..17850834ccb0 100644
--- a/include/asm-mips/prefetch.h
+++ b/include/asm-mips/prefetch.h
@@ -8,7 +8,6 @@
 #ifndef __ASM_PREFETCH_H
 #define __ASM_PREFETCH_H
-#include <linux/config.h>
 /*
 * R5000 and RM5200 implements pref and prefx instructions but they're nops, so
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index 0fb75f0762e0..5f80ba71ab92 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -11,7 +11,6 @@
 #ifndef _ASM_PROCESSOR_H
 #define _ASM_PROCESSOR_H
-#include <linux/config.h>
 #include <linux/cpumask.h>
 #include <linux/threads.h>
@@ -71,11 +70,6 @@ extern unsigned int vced_count, vcei_count;
 typedef __u64 fpureg_t;
-struct mips_fpu_hard_struct {
-        fpureg_t        fpr[NUM_FPU_REGS];
-        unsigned int    fcr31;
-};
 /*
 * It would be nice to add some more fields for emulator statistics, but there
 * are a number of fixed offsets in offset.h and elsewhere that would have to
@@ -83,18 +77,13 @@ struct mips_fpu_hard_struct {
 * the FPU emulator for now.  See asm-mips/fpu_emulator.h.
 */
-struct mips_fpu_soft_struct {
+struct mips_fpu_struct {
        fpureg_t        fpr[NUM_FPU_REGS];
        unsigned int    fcr31;
 };
-union mips_fpu_union {
-        struct mips_fpu_hard_struct hard;
-        struct mips_fpu_soft_struct soft;
-};
 #define INIT_FPU { \
-        {{0,},} \
+        {0,} \
 }
 #define NUM_DSP_REGS   6
@@ -133,7 +122,7 @@ struct thread_struct {
        unsigned long cp0_status;
        /* Saved fpu/fpu emulator stuff. */
-        union mips_fpu_union fpu;
+        struct mips_fpu_struct fpu;
 #ifdef CONFIG_MIPS_MT_FPAFF
        /* Emulated instruction count */
        unsigned long emulated_fp;
diff --git a/include/asm-mips/ptrace.h b/include/asm-mips/ptrace.h
index fa9d8713c12a..4113316ee0da 100644
--- a/include/asm-mips/ptrace.h
+++ b/include/asm-mips/ptrace.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_PTRACE_H
 #define _ASM_PTRACE_H
-#include <linux/config.h>
 #include <asm/isadep.h>
diff --git a/include/asm-mips/qemu.h b/include/asm-mips/qemu.h
index 905c39585903..531caf44560c 100644
--- a/include/asm-mips/qemu.h
+++ b/include/asm-mips/qemu.h
@@ -21,4 +21,10 @@
 */
 #define QEMU_C0_COUNTER_CLOCK   100000000
+/*
+ * Magic qemu system control location.
+ */
+#define QEMU_RESTART_REG        0xBFBF0000
+#define QEMU_HALT_REG           0xBFBF0004
 #endif /* __ASM_QEMU_H */
diff --git a/include/asm-mips/reg.h b/include/asm-mips/reg.h
index 6173004cc88e..634b55d7e7f6 100644
--- a/include/asm-mips/reg.h
+++ b/include/asm-mips/reg.h
@@ -12,7 +12,6 @@
 #ifndef __ASM_MIPS_REG_H
 #define __ASM_MIPS_REG_H
-#include <linux/config.h>
 #if defined(CONFIG_32BIT) || defined(WANT_COMPAT_REG_H)
diff --git a/include/asm-mips/resource.h b/include/asm-mips/resource.h
index 1fba00c22077..87cb3085269c 100644
--- a/include/asm-mips/resource.h
+++ b/include/asm-mips/resource.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_RESOURCE_H
 #define _ASM_RESOURCE_H
-#include <linux/config.h>
 /*
 * These five resource limit IDs have a MIPS/Linux-specific ordering,
diff --git a/include/asm-mips/rm9k-ocd.h b/include/asm-mips/rm9k-ocd.h
new file mode 100644
index 000000000000..b0b80d9ecf96
--- /dev/null
+++ b/include/asm-mips/rm9k-ocd.h
@@ -0,0 +1,56 @@
+/*
+ *  Copyright (C) 2004 by Basler Vision Technologies AG
+ *  Author: Thomas Koeller <thomas.koeller@baslerweb.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#if !defined(_ASM_RM9K_OCD_H)
+#define _ASM_RM9K_OCD_H
+#include <linux/types.h>
+#include <linux/spinlock.h>
+#include <asm/io.h>
+extern volatile void __iomem * const ocd_base;
+extern volatile void __iomem * const titan_base;
+#define ocd_addr(__x__)         (ocd_base + (__x__))
+#define titan_addr(__x__)       (titan_base + (__x__))
+#define scram_addr(__x__)       (scram_base + (__x__))
+/* OCD register access */
+#define ocd_readl(__offs__) __raw_readl(ocd_addr(__offs__))
+#define ocd_readw(__offs__) __raw_readw(ocd_addr(__offs__))
+#define ocd_readb(__offs__) __raw_readb(ocd_addr(__offs__))
+#define ocd_writel(__val__, __offs__) \
+        __raw_writel((__val__), ocd_addr(__offs__))
+#define ocd_writew(__val__, __offs__) \
+        __raw_writew((__val__), ocd_addr(__offs__))
+#define ocd_writeb(__val__, __offs__) \
+        __raw_writeb((__val__), ocd_addr(__offs__))
+/* TITAN register access - 32 bit-wide only */
+#define titan_readl(__offs__) __raw_readl(titan_addr(__offs__))
+#define titan_writel(__val__, __offs__) \
+        __raw_writel((__val__), titan_addr(__offs__))
+/* Protect access to shared TITAN registers */
+extern spinlock_t titan_lock;
+extern int titan_irqflags;
+#define lock_titan_regs() spin_lock_irqsave(&titan_lock, titan_irqflags)
+#define unlock_titan_regs() spin_unlock_irqrestore(&titan_lock, titan_irqflags)
+#endif  /* !defined(_ASM_RM9K_OCD_H) */
diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h
index 7196ceb0e948..584bd9c0ab2e 100644
--- a/include/asm-mips/serial.h
+++ b/include/asm-mips/serial.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_SERIAL_H
 #define _ASM_SERIAL_H
-#include <linux/config.h>
 /*
 * This assumes you have a 1.8432 MHz clock for your UART.
diff --git a/include/asm-mips/sgiarcs.h b/include/asm-mips/sgiarcs.h
index 722b77a8c5e5..ddb859d05257 100644
--- a/include/asm-mips/sgiarcs.h
+++ b/include/asm-mips/sgiarcs.h
@@ -12,7 +12,6 @@
 #ifndef _ASM_SGIARCS_H
 #define _ASM_SGIARCS_H
-#include <linux/config.h>
 #include <asm/types.h>
 #include <asm/arc/types.h>
diff --git a/include/asm-mips/sibyte/board.h b/include/asm-mips/sibyte/board.h
index 900edcbeec37..3dfe29ed42a8 100644
--- a/include/asm-mips/sibyte/board.h
+++ b/include/asm-mips/sibyte/board.h
@@ -19,7 +19,6 @@
 #ifndef _SIBYTE_BOARD_H
 #define _SIBYTE_BOARD_H
-#include <linux/config.h>
 #if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_PTSWARM) || \
    defined(CONFIG_SIBYTE_CRHONE) || defined(CONFIG_SIBYTE_CRHINE) || \
diff --git a/include/asm-mips/sibyte/carmel.h b/include/asm-mips/sibyte/carmel.h
index b5e7dae19f0f..57c53e62a37a 100644
--- a/include/asm-mips/sibyte/carmel.h
+++ b/include/asm-mips/sibyte/carmel.h
@@ -18,7 +18,6 @@
 #ifndef __ASM_SIBYTE_CARMEL_H
 #define __ASM_SIBYTE_CARMEL_H
-#include <linux/config.h>
 #include <asm/sibyte/sb1250.h>
 #include <asm/sibyte/sb1250_int.h>
diff --git a/include/asm-mips/sibyte/sentosa.h b/include/asm-mips/sibyte/sentosa.h
index 824605847af4..64c47874f32d 100644
--- a/include/asm-mips/sibyte/sentosa.h
+++ b/include/asm-mips/sibyte/sentosa.h
@@ -18,7 +18,6 @@
 #ifndef __ASM_SIBYTE_SENTOSA_H
 #define __ASM_SIBYTE_SENTOSA_H
-#include <linux/config.h>
 #include <asm/sibyte/sb1250.h>
 #include <asm/sibyte/sb1250_int.h>
diff --git a/include/asm-mips/sibyte/swarm.h b/include/asm-mips/sibyte/swarm.h
index 06e1d528e03a..86db37e5ad85 100644
--- a/include/asm-mips/sibyte/swarm.h
+++ b/include/asm-mips/sibyte/swarm.h
@@ -18,7 +18,6 @@
 #ifndef __ASM_SIBYTE_SWARM_H
 #define __ASM_SIBYTE_SWARM_H
-#include <linux/config.h>
 #include <asm/sibyte/sb1250.h>
 #include <asm/sibyte/sb1250_int.h>
diff --git a/include/asm-mips/siginfo.h b/include/asm-mips/siginfo.h
index 2ba313d94a78..2e32949bd674 100644
--- a/include/asm-mips/siginfo.h
+++ b/include/asm-mips/siginfo.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_SIGINFO_H
 #define _ASM_SIGINFO_H
-#include <linux/config.h>
 #define __ARCH_SIGEV_PREAMBLE_SIZE (sizeof(long) + 2*sizeof(int))
 #undef __ARCH_SI_TRAPNO /* exception code needs to fill this ...  */
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index d8349e4b55ee..a1f3a3fa9bd6 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_SIGNAL_H
 #define _ASM_SIGNAL_H
-#include <linux/config.h>
 #include <linux/types.h>
 #define _NSIG           128
diff --git a/include/asm-mips/sim.h b/include/asm-mips/sim.h
index 9c2af1b00e19..67c4fe52bb42 100644
--- a/include/asm-mips/sim.h
+++ b/include/asm-mips/sim.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_SIM_H
 #define _ASM_SIM_H
-#include <linux/config.h>
 #include <asm/asm-offsets.h>
diff --git a/include/asm-mips/smp.h b/include/asm-mips/smp.h
index e14e4b69de21..1608fd71d6f7 100644
--- a/include/asm-mips/smp.h
+++ b/include/asm-mips/smp.h
@@ -11,7 +11,6 @@
 #ifndef __ASM_SMP_H
 #define __ASM_SMP_H
-#include <linux/config.h>
 #ifdef CONFIG_SMP
diff --git a/include/asm-mips/sn/addrs.h b/include/asm-mips/sn/addrs.h
index 2b5cef1ba37f..8fa0af6b68d2 100644
--- a/include/asm-mips/sn/addrs.h
+++ b/include/asm-mips/sn/addrs.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_SN_ADDRS_H
 #define _ASM_SN_ADDRS_H
-#include <linux/config.h>
 #ifndef __ASSEMBLY__
 #include <linux/types.h>
@@ -27,13 +26,8 @@
 #ifndef __ASSEMBLY__
-#if defined(CONFIG_SGI_IO)      /* FIXME */
-#define PS_UINT_CAST            (__psunsigned_t)
-#define UINT64_CAST             (__uint64_t)
-#else   /* CONFIG_SGI_IO */
 #define PS_UINT_CAST            (unsigned long)
 #define UINT64_CAST             (unsigned long)
-#endif  /* CONFIG_SGI_IO */
 #define HUBREG_CAST             (volatile hubreg_t *)
@@ -253,14 +247,6 @@
 * for _x.
 */
-#ifdef _STANDALONE
-/* DO NOT USE THESE DIRECTLY IN THE KERNEL. SEE BELOW. */
-#define LOCAL_HUB(_x)           (HUBREG_CAST (IALIAS_BASE + (_x)))
-#define REMOTE_HUB(_n, _x)      (HUBREG_CAST (NODE_SWIN_BASE(_n, 1) +   \
-                                              0x800000 + (_x)))
-#endif /* _STANDALONE */
 /*
 * WARNING:
 *      When certain Hub chip workaround are defined, it's not sufficient
@@ -327,20 +313,6 @@
        PHYS_TO_K0(NODE_OFFSET(nasid) | ARCS_SPB_OFFSET)
 #define ARCS_SPB_SIZE           0x0400
-#ifdef _STANDALONE
-#define ARCS_TVECTOR_OFFSET     0x2800
-#define ARCS_PVECTOR_OFFSET     0x2c00
-/*
- * These addresses are used by the master CPU to install the transfer
- * and private vectors.  All others use the SPB to find them.
- */
-#define TVADDR  (NODE_CAC_BASE(get_nasid()) + ARCS_TVECTOR_OFFSET)
-#define PVADDR  (NODE_CAC_BASE(get_nasid()) + ARCS_PVECTOR_OFFSET)
-#endif /* _STANDALONE */
 #define KLDIR_OFFSET            0x2000
 #define KLDIR_ADDR(nasid)                                               \
        TO_NODE_UNCAC((nasid), KLDIR_OFFSET)
diff --git a/include/asm-mips/sn/agent.h b/include/asm-mips/sn/agent.h
index d6df13aaed49..ac4ea85c3a5c 100644
--- a/include/asm-mips/sn/agent.h
+++ b/include/asm-mips/sn/agent.h
@@ -11,7 +11,6 @@
 #ifndef _ASM_SGI_SN_AGENT_H
 #define _ASM_SGI_SN_AGENT_H
-#include <linux/config.h>
 #include <linux/topology.h>
 #include <asm/sn/addrs.h>
 #include <asm/sn/arch.h>
diff --git a/include/asm-mips/sn/arch.h b/include/asm-mips/sn/arch.h
index d247a819de7f..51174af6ac52 100644
--- a/include/asm-mips/sn/arch.h
+++ b/include/asm-mips/sn/arch.h
@@ -11,7 +11,6 @@
 #ifndef _ASM_SN_ARCH_H
 #define _ASM_SN_ARCH_H
-#include <linux/config.h>
 #include <linux/types.h>
 #include <asm/sn/types.h>
 #ifdef CONFIG_SGI_IP27
diff --git a/include/asm-mips/sn/sn0/sn0_fru.h b/include/asm-mips/sn/fru.h
index 82c6377c275a..b3e3606723b7 100644
--- a/include/asm-mips/sn/sn0/sn0_fru.h
+++ b/include/asm-mips/sn/fru.h
@@ -6,10 +6,10 @@
 * Derived from IRIX <sys/SN/SN0/sn0_fru.h>
 *
 * Copyright (C) 1992 - 1997, 1999 Silcon Graphics, Inc.
- * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
+ * Copyright (C) 1999, 2006 Ralf Baechle (ralf@linux-mips)
 */
-#ifndef _ASM_SN_SN0_SN0_FRU_H
+#ifndef __ASM_SN_FRU_H
-#define _ASM_SN_SN0_SN0_FRU_H
+#define __ASM_SN_FRU_H
 #define MAX_DIMMS                       8        /* max # of dimm banks */
 #define MAX_PCIDEV                      8        /* max # of pci devices on a pci bus */
@@ -41,4 +41,4 @@ typedef struct kf_pci_bus_s {
                                        /* confidence level that the pci dev is bad */
 } kf_pci_bus_t;
-#endif /* _ASM_SN_SN0_SN0_FRU_H */
+#endif /* __ASM_SN_FRU_H */
diff --git a/include/asm-mips/sn/io.h b/include/asm-mips/sn/io.h
index 13326453efc9..ab2fa8cd2627 100644
--- a/include/asm-mips/sn/io.h
+++ b/include/asm-mips/sn/io.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_SN_IO_H
 #define _ASM_SN_IO_H
-#include <linux/config.h>
 #if defined (CONFIG_SGI_IP27)
 #include <asm/sn/sn0/hubio.h>
 #endif
diff --git a/include/asm-mips/sn/klconfig.h b/include/asm-mips/sn/klconfig.h
index 9709ff701d9b..52238e65af8e 100644
--- a/include/asm-mips/sn/klconfig.h
+++ b/include/asm-mips/sn/klconfig.h
@@ -27,7 +27,6 @@
 *      that offsets of existing fields do not change.
 */
-#include <linux/config.h>
 #include <linux/types.h>
 #include <asm/sn/types.h>
@@ -37,7 +36,7 @@
 //#include <sys/SN/router.h>
 // XXX Stolen from <sys/SN/router.h>:
 #define MAX_ROUTER_PORTS (6)    /* Max. number of ports on a router */
-#include <asm/sn/sn0/sn0_fru.h>
+#include <asm/sn/fru.h>
 //#include <sys/graph.h>
 //#include <sys/xtalk/xbow.h>
@@ -54,32 +53,21 @@
 #include <asm/sn/agent.h>
 #include <asm/arc/types.h>
 #include <asm/arc/hinv.h>
-#if defined(CONFIG_SGI_IO) || defined(CONFIG_SGI_IP35)
+#if defined(CONFIG_SGI_IP35)
 // The hack file has to be before vector and after sn0_fru....
 #include <asm/hack.h>
 #include <asm/sn/vector.h>
 #include <asm/xtalk/xtalk.h>
-#endif /* CONFIG_SGI_IO || CONFIG_SGI_IP35 */
+#endif /* CONFIG_SGI_IP35 */
 #endif /* CONFIG_SGI_IP27 || CONFIG_SGI_IP35 */
 #define KLCFGINFO_MAGIC 0xbeedbabe
-#ifdef FRUTEST
-typedef u64 klconf_off_t;
-#else
 typedef s32 klconf_off_t;
-#endif
 /*
 * Some IMPORTANT OFFSETS. These are the offsets on all NODES.
 */
-#if 0
-#define RAMBASE                 0
-#define ARCSSPB_OFF             0x1000 /* shift it to sys/arcs/spb.h */
-#define OFF_HWGRAPH             0
-#endif
 #define MAX_MODULE_ID           255
 #define SIZE_PAD                4096 /* 4k padding for structures */
 /*
@@ -134,15 +122,9 @@ typedef s32 klconf_off_t;
 typedef struct console_s {
-#if defined(CONFIG_SGI_IO)      /* FIXME */
-        __psunsigned_t  uart_base;
-        __psunsigned_t  config_base;
-        __psunsigned_t  memory_base;
-#else
        unsigned long   uart_base;
        unsigned long   config_base;
        unsigned long   memory_base;
-#endif
        short           baud;
        short           flag;
        int             type;
@@ -174,10 +156,6 @@ typedef struct kl_config_hdr {
 #define KL_CONFIG_HDR(_nasid)   ((kl_config_hdr_t *)(KLCONFIG_ADDR(_nasid)))
-#if 0
-#define KL_CONFIG_MALLOC_HDR(_nasid) \
-                                (KL_CONFIG_HDR(_nasid)->ch_malloc_hdr)
-#endif
 #define KL_CONFIG_INFO_OFFSET(_nasid)                                   \
        (KL_CONFIG_HDR(_nasid)->ch_board_info)
 #define KL_CONFIG_INFO_SET_OFFSET(_nasid, _off)                         \
@@ -197,23 +175,13 @@ typedef struct kl_config_hdr {
 /* --- New Macros for the changed kl_config_hdr_t structure --- */
-#if defined(CONFIG_SGI_IO)
-#define PTR_CH_MALLOC_HDR(_k)   ((klc_malloc_hdr_t *)\
-                        ((__psunsigned_t)_k + (_k->ch_malloc_hdr_off)))
-#else
 #define PTR_CH_MALLOC_HDR(_k)   ((klc_malloc_hdr_t *)\
                        (unsigned long)_k + (_k->ch_malloc_hdr_off)))
-#endif
 #define KL_CONFIG_CH_MALLOC_HDR(_n)   PTR_CH_MALLOC_HDR(KL_CONFIG_HDR(_n))
-#if defined(CONFIG_SGI_IO)
-#define PTR_CH_CONS_INFO(_k)    ((console_t *)\
-                        ((__psunsigned_t)_k + (_k->ch_cons_off)))
-#else
 #define PTR_CH_CONS_INFO(_k)    ((console_t *)\
                        ((unsigned long)_k + (_k->ch_cons_off)))
-#endif
 #define KL_CONFIG_CH_CONS_INFO(_n)   PTR_CH_CONS_INFO(KL_CONFIG_HDR(_n))
@@ -490,14 +458,6 @@ typedef struct lboard_s {
 #define KLCF_NUM_COMPS(_brd)    ((_brd)->brd_numcompts)
 #define KLCF_MODULE_ID(_brd)    ((_brd)->brd_module)
-#ifdef FRUTEST
-#define KLCF_NEXT(_brd)                 ((_brd)->brd_next ? (lboard_t *)((_brd)->brd_next):  NULL)
-#define KLCF_COMP(_brd, _ndx)           (klinfo_t *)((_brd)->brd_compts[(_ndx)])
-#define KLCF_COMP_ERROR(_brd, _comp)    (_brd = _brd , (_comp)->errinfo)
-#else
 #define KLCF_NEXT(_brd)         \
        ((_brd)->brd_next ?     \
         (lboard_t *)(NODE_OFFSET_TO_K1(NASID_GET(_brd), (_brd)->brd_next)):\
@@ -509,8 +469,6 @@ typedef struct lboard_s {
 #define KLCF_COMP_ERROR(_brd, _comp)    \
               (NODE_OFFSET_TO_K1(NASID_GET(_brd), (_comp)->errinfo))
-#endif
 #define KLCF_COMP_TYPE(_comp)   ((_comp)->struct_type)
 #define KLCF_BRIDGE_W_ID(_comp) ((_comp)->physid)       /* Widget ID */
@@ -631,18 +589,6 @@ typedef struct klport_s {
        klconf_off_t    port_offset;
 } klport_t;
-#if 0
-/*
- * This is very similar to the klport_s but instead of having a componant
- * offset it has a board offset.
- */
-typedef struct klxbow_port_s {
-        nasid_t         port_nasid;
-        unsigned char   port_flag;
-        klconf_off_t    board_offset;
-} klxbow_port_t;
-#endif
 typedef struct klcpu_s {                          /* CPU */
        klinfo_t        cpu_info;
        unsigned short  cpu_prid;       /* Processor PRID value */
@@ -945,36 +891,6 @@ extern klcpu_t *nasid_slice_to_cpuinfo(nasid_t, int);
 extern lboard_t *find_lboard_class(lboard_t *start, unsigned char brd_class);
-#if defined(CONFIG_SGI_IO)
-extern xwidgetnum_t nodevertex_widgetnum_get(vertex_hdl_t node_vtx);
-extern vertex_hdl_t nodevertex_xbow_peer_get(vertex_hdl_t node_vtx);
-extern lboard_t *find_gfxpipe(int pipenum);
-extern void setup_gfxpipe_link(vertex_hdl_t vhdl,int pipenum);
-extern lboard_t *find_lboard_module_class(lboard_t *start, moduleid_t mod,
-                                               unsigned char brd_class);
-extern lboard_t *find_nic_lboard(lboard_t *, nic_t);
-extern lboard_t *find_nic_type_lboard(nasid_t, unsigned char, nic_t);
-extern lboard_t *find_lboard_modslot(lboard_t *start, moduleid_t mod, slotid_t slot);
-extern lboard_t *find_lboard_module(lboard_t *start, moduleid_t mod);
-extern lboard_t *get_board_name(nasid_t nasid, moduleid_t mod, slotid_t slot, char *name);
-extern int      config_find_nic_router(nasid_t, nic_t, lboard_t **, klrou_t**);
-extern int      config_find_nic_hub(nasid_t, nic_t, lboard_t **, klhub_t**);
-extern int      config_find_xbow(nasid_t, lboard_t **, klxbow_t**);
-extern klcpu_t *get_cpuinfo(cpuid_t cpu);
-extern int      update_klcfg_cpuinfo(nasid_t, int);
-extern void     board_to_path(lboard_t *brd, char *path);
-extern moduleid_t get_module_id(nasid_t nasid);
-extern void     nic_name_convert(char *old_name, char *new_name);
-extern int      module_brds(nasid_t nasid, lboard_t **module_brds, int n);
-extern lboard_t *brd_from_key(ulong_t key);
-extern void     device_component_canonical_name_get(lboard_t *,klinfo_t *,
-                                                    char *);
-extern int      board_serial_number_get(lboard_t *,char *);
-extern int      is_master_baseio(nasid_t,moduleid_t,slotid_t);
-extern nasid_t  get_actual_nasid(lboard_t *brd) ;
-extern net_vec_t klcfg_discover_route(lboard_t *, lboard_t *, int);
-#else   /* CONFIG_SGI_IO */
 extern klcpu_t *sn_get_cpuinfo(cpuid_t cpu);
-#endif  /* CONFIG_SGI_IO */
 #endif /* _ASM_SN_KLCONFIG_H */
diff --git a/include/asm-mips/sn/kldir.h b/include/asm-mips/sn/kldir.h
index f0efab1672ec..0573cbffc104 100644
--- a/include/asm-mips/sn/kldir.h
+++ b/include/asm-mips/sn/kldir.h
@@ -11,11 +11,6 @@
 #ifndef _ASM_SN_KLDIR_H
 #define _ASM_SN_KLDIR_H
-#include <linux/config.h>
-#if defined(CONFIG_SGI_IO)
-#include <asm/hack.h>
-#endif
 /*
 * The kldir memory area resides at a fixed place in each node's memory and
@@ -136,8 +131,6 @@
 #define KLDIR_OFF_STRIDE                0x28
 #endif /* __ASSEMBLY__ */
-#if !defined(CONFIG_SGI_IO)
 /*
 * This is defined here because IP27_SYMMON_STK_SIZE must be at least what
 * we define here.  Since it's set up in the prom.  We can't redefine it later
@@ -147,7 +140,7 @@
 */
 #define SYMMON_STACK_SIZE               0x8000
-#if defined (PROM) || defined (SABLE)
+#if defined (PROM)
 /*
 * These defines are prom version dependent.  No code other than the IP27
@@ -184,7 +177,7 @@
 #define IP27_FREEMEM_COUNT              1
 #define IP27_FREEMEM_STRIDE             0
-#endif /* PROM || SABLE*/
+#endif /* PROM */
 /*
 * There will be only one of these in a partition so the IO6 must set it up.
 */
@@ -207,17 +200,11 @@
 #define KLDIR_ENT_SIZE                  0x40
 #define KLDIR_MAX_ENTRIES               (0x400 / 0x40)
-#endif  /* !CONFIG_SGI_IO */
 #ifndef __ASSEMBLY__
 typedef struct kldir_ent_s {
        u64             magic;          /* Indicates validity of entry      */
        off_t           offset;         /* Offset from start of node space  */
-#if defined(CONFIG_SGI_IO)      /* FIXME */
-        __psunsigned_t  pointer;        /* Pointer to area in some cases    */
-#else
        unsigned long   pointer;        /* Pointer to area in some cases    */
-#endif
        size_t          size;           /* Size in bytes                    */
        u64             count;          /* Repeat count if array, 1 if not  */
        size_t          stride;         /* Stride if array, 0 if not        */
@@ -227,22 +214,4 @@ typedef struct kldir_ent_s {
 } kldir_ent_t;
 #endif /* !__ASSEMBLY__ */
-#if defined(CONFIG_SGI_IO)
-#define KLDIR_ENT_SIZE                  0x40
-#define KLDIR_MAX_ENTRIES               (0x400 / 0x40)
-/*
- * The actual offsets of each memory area are machine-dependent
- */
-#ifdef CONFIG_SGI_IP27
-// Not yet #include <asm/sn/sn0/kldir.h>
-#elif defined(CONFIG_SGI_IP35)
-#include <asm/sn/sn1/kldir.h>
-#else
-#error "kldir.h is currently defined for IP27 and IP35 platforms only"
-#endif
-#endif  /* CONFIG_SGI_IO */
 #endif /* _ASM_SN_KLDIR_H */
diff --git a/include/asm-mips/sn/launch.h b/include/asm-mips/sn/launch.h
index b67699c0c475..b7c2226312c6 100644
--- a/include/asm-mips/sn/launch.h
+++ b/include/asm-mips/sn/launch.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_SN_LAUNCH_H
 #define _ASM_SN_LAUNCH_H
-#include <linux/config.h>
 #include <asm/sn/types.h>
 #include <asm/sn/addrs.h>
diff --git a/include/asm-mips/sn/mapped_kernel.h b/include/asm-mips/sn/mapped_kernel.h
index 59edb20f8ec5..c3dd5d0d525f 100644
--- a/include/asm-mips/sn/mapped_kernel.h
+++ b/include/asm-mips/sn/mapped_kernel.h
@@ -20,7 +20,6 @@
 * code. So no jumps can be done before we have switched to using
 * cksseg addresses.
 */
-#include <linux/config.h>
 #include <asm/addrspace.h>
 #define REP_BASE        CAC_BASE
diff --git a/include/asm-mips/sn/sn0/addrs.h b/include/asm-mips/sn/sn0/addrs.h
index 398815639fb8..9e8cc52910f6 100644
--- a/include/asm-mips/sn/sn0/addrs.h
+++ b/include/asm-mips/sn/sn0/addrs.h
@@ -11,7 +11,6 @@
 #ifndef _ASM_SN_SN0_ADDRS_H
 #define _ASM_SN_SN0_ADDRS_H
-#include <linux/config.h>
 /*
 * SN0 (on a T5) Address map
@@ -49,7 +48,7 @@
 * so for now we just use defines bracketed by an ifdef.
 */
-#ifdef CONFIG_SGI_SN0_N_MODE
+#ifdef CONFIG_SGI_SN_N_MODE
 #define NODE_SIZE_BITS          31
 #define BWIN_SIZE_BITS          28
@@ -63,7 +62,7 @@
 #define BDDIR_UPPER_MASK        (UINT64_CAST 0x7ffff << 10)
 #define BDECC_UPPER_MASK        (UINT64_CAST 0x3ffffff << 3)
-#else /* !defined(CONFIG_SGI_SN0_N_MODE), assume that M-mode is desired */
+#else /* !defined(CONFIG_SGI_SN_N_MODE), assume that M-mode is desired */
 #define NODE_SIZE_BITS          32
 #define BWIN_SIZE_BITS          29
@@ -77,7 +76,7 @@
 #define BDDIR_UPPER_MASK        (UINT64_CAST 0xfffff << 10)
 #define BDECC_UPPER_MASK        (UINT64_CAST 0x7ffffff << 3)
-#endif /* !defined(CONFIG_SGI_SN0_N_MODE) */
+#endif /* !defined(CONFIG_SGI_SN_N_MODE) */
 #define NODE_ADDRSPACE_SIZE     (UINT64_CAST 1 << NODE_SIZE_BITS)
@@ -85,15 +84,15 @@
 #define NASID_GET(_pa)          (int) ((UINT64_CAST (_pa) >>            \
                                        NASID_SHFT) & NASID_BITMASK)
-#if !defined(__ASSEMBLY__) && !defined(_STANDALONE)
+#if !defined(__ASSEMBLY__)
 #define NODE_SWIN_BASE(nasid, widget)                                   \
        ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN)          \
        : RAW_NODE_SWIN_BASE(nasid, widget))
-#else /* __ASSEMBLY__ || _STANDALONE */
+#else /* __ASSEMBLY__ */
 #define NODE_SWIN_BASE(nasid, widget) \
     (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS))
-#endif /* __ASSEMBLY__ || _STANDALONE */
+#endif /* __ASSEMBLY__ */
 /*
 * The following definitions pertain to the IO special address
@@ -143,12 +142,7 @@
 #define SN0_WIDGET_BASE(_nasid, _wid)   (NODE_SWIN_BASE((_nasid), (_wid)))
 /* Turn on sable logging for the processors whose bits are set. */
-#ifdef SABLE
-#define SABLE_LOG_TRIGGER(_map) \
-                *((volatile hubreg_t *)(IO_BASE + 0x17ffff0)) = (_map)
-#else
 #define SABLE_LOG_TRIGGER(_map)
-#endif /* SABLE */
 #ifndef __ASSEMBLY__
 #define KERN_NMI_ADDR(nasid, slice)                                     \
@@ -281,76 +275,6 @@
 #define _ARCSPROM
-#ifdef _STANDALONE
-/*
- * The PROM needs to pass the device base address and the
- * device pci cfg space address to the device drivers during
- * install. The COMPONENT->Key field is used for this purpose.
- * Macros needed by SN0 device drivers to convert the
- * COMPONENT->Key field to the respective base address.
- * Key field looks as follows:
- *
- *  +----------------------------------------------------+
- *  |devnasid | widget  |pciid |hubwidid|hstnasid | adap |
- *  |   2     |   1     |  1   |   1    |    2    |   1  |
- *  +----------------------------------------------------+
- *  |         |         |      |        |         |      |
- *  64        48        40     32       24        8      0
- *
- * These are used by standalone drivers till the io infrastructure
- * is in place.
- */
-#ifndef __ASSEMBLY__
-#define uchar unsigned char
-#define KEY_DEVNASID_SHFT  48
-#define KEY_WIDID_SHFT     40
-#define KEY_PCIID_SHFT     32
-#define KEY_HUBWID_SHFT    24
-#define KEY_HSTNASID_SHFT  8
-#define MK_SN0_KEY(nasid, widid, pciid) \
-                        ((((__psunsigned_t)nasid)<< KEY_DEVNASID_SHFT |\
-                                ((__psunsigned_t)widid) << KEY_WIDID_SHFT) |\
-                                ((__psunsigned_t)pciid) << KEY_PCIID_SHFT)
-#define ADD_HUBWID_KEY(key,hubwid)\
-                        (key|=((__psunsigned_t)hubwid << KEY_HUBWID_SHFT))
-#define ADD_HSTNASID_KEY(key,hstnasid)\
-                        (key|=((__psunsigned_t)hstnasid << KEY_HSTNASID_SHFT))
-#define GET_DEVNASID_FROM_KEY(key)      ((short)(key >> KEY_DEVNASID_SHFT))
-#define GET_WIDID_FROM_KEY(key)         ((uchar)(key >> KEY_WIDID_SHFT))
-#define GET_PCIID_FROM_KEY(key)         ((uchar)(key >> KEY_PCIID_SHFT))
-#define GET_HUBWID_FROM_KEY(key)        ((uchar)(key >> KEY_HUBWID_SHFT))
-#define GET_HSTNASID_FROM_KEY(key)      ((short)(key >> KEY_HSTNASID_SHFT))
-#define PCI_64_TARGID_SHFT              60
-#define GET_PCIBASE_FROM_KEY(key)  (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\
-                                        GET_WIDID_FROM_KEY(key))\
-                                        | BRIDGE_DEVIO(GET_PCIID_FROM_KEY(key)))
-#define GET_PCICFGBASE_FROM_KEY(key) \
-                        (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\
-                              GET_WIDID_FROM_KEY(key))\
-                        | BRIDGE_TYPE0_CFG_DEV(GET_PCIID_FROM_KEY(key)))
-#define GET_WIDBASE_FROM_KEY(key) \
-                        (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\
-                              GET_WIDID_FROM_KEY(key)))
-#define PUT_INSTALL_STATUS(c,s)         c->Revision = s
-#define GET_INSTALL_STATUS(c)           c->Revision
-#endif /* !__ASSEMBLY__ */
-#endif /* _STANDALONE */
 #if defined (HUB_ERR_STS_WAR)
 #define ERR_STS_WAR_REGISTER    IIO_IIBUSERR
diff --git a/include/asm-mips/sn/sn0/arch.h b/include/asm-mips/sn/sn0/arch.h
index fb78773a5efe..f734f2007f24 100644
--- a/include/asm-mips/sn/sn0/arch.h
+++ b/include/asm-mips/sn/sn0/arch.h
@@ -11,9 +11,6 @@
 #ifndef _ASM_SN_SN0_ARCH_H
 #define _ASM_SN_SN0_ARCH_H
-#include <linux/config.h>
-#ifndef SABLE
 #ifndef SN0XXL  /* 128 cpu SMP max */
 /*
@@ -54,25 +51,16 @@
 */
 #define MAX_PARTITIONS          MAX_REGIONS
-#else
-#define MAX_COMPACT_NODES       4
-#define MAX_NASIDS              4
-#define MAXCPUS                 8
-#endif
 #define NASID_MASK_BYTES        ((MAX_NASIDS + 7) / 8)
 /*
 * Slot constants for SN0
 */
-#ifdef CONFIG_SGI_SN0_N_MODE
+#ifdef CONFIG_SGI_SN_N_MODE
 #define MAX_MEM_SLOTS   16                      /* max slots per node */
-#else /* !CONFIG_SGI_SN0_N_MODE, assume M_MODE */
+#else /* !CONFIG_SGI_SN_N_MODE, assume CONFIG_SGI_SN_M_MODE */
 #define MAX_MEM_SLOTS   32                      /* max slots per node */
-#endif /* defined(N_MODE) */
+#endif /* CONFIG_SGI_SN_M_MODE */
 #define SLOT_SHIFT              (27)
 #define SLOT_MIN_MEM_SIZE       (32*1024*1024)
diff --git a/include/asm-mips/sn/sn0/hub.h b/include/asm-mips/sn/sn0/hub.h
index f5dbba6f4610..3e228f8e7969 100644
--- a/include/asm-mips/sn/sn0/hub.h
+++ b/include/asm-mips/sn/sn0/hub.h
@@ -31,10 +31,6 @@
 #include <asm/sn/sn0/hubni.h>
 //#include <asm/sn/sn0/hubcore.h>
-#ifdef SABLE
-#define IP27_NO_HUBUART_INT     1
-#endif
 /* Translation of uncached attributes */
 #define UATTR_HSPEC     0
 #define UATTR_IO        1
diff --git a/include/asm-mips/sn/sn0/hubio.h b/include/asm-mips/sn/sn0/hubio.h
index f314da21b970..ef91b3363554 100644
--- a/include/asm-mips/sn/sn0/hubio.h
+++ b/include/asm-mips/sn/sn0/hubio.h
@@ -486,22 +486,6 @@ typedef union h1_icrba_u {
 #define ICRBN_A_CERR_SHFT       54
 #define ICRBN_A_ERR_MASK        0x3ff
-#if 0   /* Disabled, this causes namespace polution and break allmodconfig */
-/*
- * Easy access macros.
- */
-#define a_error         icrba_fields_s.error
-#define a_ecode         icrba_fields_s.ecode
-#define a_lnetuce       icrba_fields_s.lnetuce
-#define a_mark          icrba_fields_s.mark
-#define a_xerr          icrba_fields_s.xerr
-#define a_sidn          icrba_fields_s.sidn
-#define a_tnum          icrba_fields_s.tnum
-#define a_addr          icrba_fields_s.addr
-#define a_valid         icrba_fields_s.valid
-#define a_iow           icrba_fields_s.iow
-#endif
 #endif /* !__ASSEMBLY__ */
 #define IIO_ICRB_ADDR_SHFT      2       /* Shift to get proper address */
diff --git a/include/asm-mips/sn/sn0/hubmd.h b/include/asm-mips/sn/sn0/hubmd.h
index a66def4e0ba0..14c225d80664 100644
--- a/include/asm-mips/sn/sn0/hubmd.h
+++ b/include/asm-mips/sn/sn0/hubmd.h
@@ -11,7 +11,6 @@
 #ifndef _ASM_SN_SN0_HUBMD_H
 #define _ASM_SN_SN0_HUBMD_H
-#include <linux/config.h>
 /*
 * Hub Memory/Directory interface registers
@@ -92,7 +91,7 @@
 #define MD_UREG1_14             0x2200f0 /* uController/UART 1 register     */
 #define MD_UREG1_15             0x2200f8 /* uController/UART 1 register     */
-#ifdef CONFIG_SGI_SN0_N_MODE
+#ifdef CONFIG_SGI_SN_N_MODE
 #define MD_MEM_BANKS            4        /* 4 banks of memory max in N mode */
 #else
 #define MD_MEM_BANKS            8        /* 8 banks of memory max in M mode */
diff --git a/include/asm-mips/sn/sn0/hubpi.h b/include/asm-mips/sn/sn0/hubpi.h
index 355bba8552e3..e39f5f9da040 100644
--- a/include/asm-mips/sn/sn0/hubpi.h
+++ b/include/asm-mips/sn/sn0/hubpi.h
@@ -398,24 +398,6 @@ typedef u64	rtc_time_t;
 /* PI_RT_FILTER_CTRL mask and shift definitions */
-#if 0
-/*
- * XXX - This register's definition has changed, but it's only implemented
- * in Hub 2.
- */
-#define PRFC_DROP_COUNT_SHFT    27
-#define PRFC_DROP_COUNT_MASK    (UINT64_CAST 0x3ff << 27)
-#define PRFC_DROP_CTR_SHFT      18
-#define PRFC_DROP_CTR_MASK      (UINT64_CAST 0x1ff << 18)
-#define PRFC_MASK_ENABLE_SHFT   10
-#define PRFC_MASK_ENABLE_MASK   (UINT64_CAST 0x7f << 10)
-#define PRFC_MASK_CTR_SHFT      2
-#define PRFC_MASK_CTR_MASK      (UINT64_CAST 0xff << 2)
-#define PRFC_OFFSET_SHFT        0
-#define PRFC_OFFSET_MASK        (UINT64_CAST 3)
-#endif /* 0 */
 /*
 * Bits for NACK_CNT_A/B and NACK_CMP
 */
diff --git a/include/asm-mips/sn/sn0/ip27.h b/include/asm-mips/sn/sn0/ip27.h
index ade0e974dd78..3c97e0855c8d 100644
--- a/include/asm-mips/sn/sn0/ip27.h
+++ b/include/asm-mips/sn/sn0/ip27.h
@@ -6,7 +6,7 @@
 * Derived from IRIX <sys/SN/SN0/IP27.h>.
 *
 * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
- * Copyright (C) 1999 by Ralf Baechle
+ * Copyright (C) 1999, 2006 by Ralf Baechle
 */
 #ifndef _ASM_SN_SN0_IP27_H
 #define _ASM_SN_SN0_IP27_H
@@ -82,11 +82,4 @@
 #define SEND_NMI(_nasid, _slice)        \
          REMOTE_HUB_S((_nasid),  (PI_NMI_A + ((_slice) * PI_NMI_OFFSET)), 1)
-/* Sanity hazzard ...  Below all the Origin hacks are following.  */
-#define SN00_BRIDGE             0x9200000008000000
-#define SN00I_BRIDGE0           0x920000000b000000
-#define SN00I_BRIDGE1           0x920000000e000000
-#define SN00I_BRIDGE2           0x920000000f000000
 #endif /* _ASM_SN_SN0_IP27_H */
diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h
index b3bc698dfdee..b9ba54d0dd35 100644
--- a/include/asm-mips/sni.h
+++ b/include/asm-mips/sni.h
@@ -15,9 +15,6 @@
 /*
 * ASIC PCI registers for little endian configuration.
 */
-#ifndef __MIPSEL__
-#error "Fix me for big endian"
-#endif
 #define PCIMT_UCONF             0xbfff0000
 #define PCIMT_IOADTIMEOUT2      0xbfff0008
 #define PCIMT_IOMEMCONF         0xbfff0010
@@ -51,9 +48,9 @@
 #define PCIMT_PCI_CONF          0xbfff0100
 /*
- * Data port for the PCI bus.
+ * Data port for the PCI bus in IO space
 */
-#define PCIMT_CONFIG_DATA       0xb4000cfc
+#define PCIMT_CONFIG_DATA       0x0cfc
 /*
 * Board specific registers
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
index c4856a874965..513aa5133830 100644
--- a/include/asm-mips/stackframe.h
+++ b/include/asm-mips/stackframe.h
@@ -10,7 +10,6 @@
 #ifndef _ASM_STACKFRAME_H
 #define _ASM_STACKFRAME_H
-#include <linux/config.h>
 #include <linux/threads.h>
 #include <asm/asm.h>
diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h
index 907da600fddd..436e3ad352d9 100644
--- a/include/asm-mips/string.h
+++ b/include/asm-mips/string.h
@@ -10,7 +10,6 @@
 #ifndef _ASM_STRING_H
 #define _ASM_STRING_H
-#include <linux/config.h>
 /*
 * Most of the inline functions are rather naive implementations so I just
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 261f71d16a07..130333d7c4ee 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -12,7 +12,6 @@
 #ifndef _ASM_SYSTEM_H
 #define _ASM_SYSTEM_H
-#include <linux/config.h>
 #include <linux/types.h>
 #include <asm/addrspace.h>
diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h
index f8d97dafd2f4..ae8ada5b42a9 100644
--- a/include/asm-mips/thread_info.h
+++ b/include/asm-mips/thread_info.h
@@ -9,7 +9,6 @@
 #ifdef __KERNEL__
-#include <linux/config.h>
 #ifndef __ASSEMBLY__
diff --git a/include/asm-mips/tlbflush.h b/include/asm-mips/tlbflush.h
index bb4ae3cdcbf1..276be77c3e85 100644
--- a/include/asm-mips/tlbflush.h
+++ b/include/asm-mips/tlbflush.h
@@ -1,7 +1,6 @@
 #ifndef __ASM_TLBFLUSH_H
 #define __ASM_TLBFLUSH_H
-#include <linux/config.h>
 #include <linux/mm.h>
 /*
diff --git a/include/asm-mips/tx4927/toshiba_rbtx4927.h b/include/asm-mips/tx4927/toshiba_rbtx4927.h
index 6ce1e9475f99..94bef03d9635 100644
--- a/include/asm-mips/tx4927/toshiba_rbtx4927.h
+++ b/include/asm-mips/tx4927/toshiba_rbtx4927.h
@@ -27,7 +27,6 @@
 #ifndef __ASM_TX4927_TOSHIBA_RBTX4927_H
 #define __ASM_TX4927_TOSHIBA_RBTX4927_H
-#include <linux/config.h>
 #include <asm/tx4927/tx4927.h>
 #include <asm/tx4927/tx4927_mips.h>
 #ifdef CONFIG_PCI
diff --git a/include/asm-mips/types.h b/include/asm-mips/types.h
index cd2813d8e136..2b52e180c6f2 100644
--- a/include/asm-mips/types.h
+++ b/include/asm-mips/types.h
@@ -52,7 +52,6 @@ typedef unsigned long long __u64;
 #ifndef __ASSEMBLY__
-#include <linux/config.h>
 typedef __signed char s8;
 typedef unsigned char u8;
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
index b96f3e0f3933..1cdd4eeb2f73 100644
--- a/include/asm-mips/uaccess.h
+++ b/include/asm-mips/uaccess.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_UACCESS_H
 #define _ASM_UACCESS_H
-#include <linux/config.h>
 #include <linux/kernel.h>
 #include <linux/errno.h>
 #include <linux/thread_info.h>
diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h
index 1068fe9a0a58..8bb0bb9b2e68 100644
--- a/include/asm-mips/unistd.h
+++ b/include/asm-mips/unistd.h
@@ -905,6 +905,8 @@
 #define __NR_N32_Linux                  6000
 #define __NR_N32_Linux_syscalls         268
+#ifdef __KERNEL__
 #ifndef __ASSEMBLY__
 /* XXX - _foo needs to be __foo, while __NR_bar could be _NR_bar. */
@@ -1168,9 +1170,6 @@ type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \
 #endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
-#ifdef __KERNEL__
-#include <linux/config.h>
 #define __ARCH_WANT_IPC_PARSE_VERSION
 #define __ARCH_WANT_OLD_READDIR
@@ -1197,7 +1196,6 @@ type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \
 # ifdef CONFIG_MIPS32_O32
 #  define __ARCH_WANT_COMPAT_SYS_TIME
 # endif
-#endif
 #ifdef __KERNEL_SYSCALLS__
@@ -1248,4 +1246,5 @@ asmlinkage long sys_rt_sigaction(int sig,
 */
 #define cond_syscall(x) asm(".weak\t" #x "\n" #x "\t=\tsys_ni_syscall")
+#endif /* __KERNEL__ */
 #endif /* _ASM_UNISTD_H */
diff --git a/include/asm-mips/vga.h b/include/asm-mips/vga.h
index 34755c0a6398..c1dd0b10bc27 100644
--- a/include/asm-mips/vga.h
+++ b/include/asm-mips/vga.h
@@ -13,7 +13,7 @@
 *      access the videoram directly without any black magic.
 */
-#define VGA_MAP_MEM(x)  (0xb0000000L + (unsigned long)(x))
+#define VGA_MAP_MEM(x,s)        (0xb0000000L + (unsigned long)(x))
 #define vga_readb(x)    (*(x))
 #define vga_writeb(x,y) (*(y) = (x))
diff --git a/include/asm-mips/vr41xx/vrc4173.h b/include/asm-mips/vr41xx/vrc4173.h
index 4d41a9c091d4..96fdcd54cec7 100644
--- a/include/asm-mips/vr41xx/vrc4173.h
+++ b/include/asm-mips/vr41xx/vrc4173.h
@@ -24,7 +24,6 @@
 #ifndef __NEC_VRC4173_H
 #define __NEC_VRC4173_H
-#include <linux/config.h>
 #include <asm/io.h>
 /*
diff --git a/include/asm-mips/war.h b/include/asm-mips/war.h
index ad374bd3f130..3ac146c019c9 100644
--- a/include/asm-mips/war.h
+++ b/include/asm-mips/war.h
@@ -8,7 +8,6 @@
 #ifndef _ASM_WAR_H
 #define _ASM_WAR_H
-#include <linux/config.h>
 /*
 * Another R4600 erratum.  Due to the lack of errata information the exact
@@ -172,7 +171,8 @@
 * On the RM9000 there is a problem which makes the CreateDirtyExclusive
 * cache operation unusable on SMP systems.
 */
-#if defined(CONFIG_MOMENCO_JAGUAR_ATX) || defined(CONFIG_PMC_YOSEMITE)
+#if defined(CONFIG_MOMENCO_JAGUAR_ATX) || defined(CONFIG_PMC_YOSEMITE) || \
+    defined(CONFIG_BASLER_EXCITE)
 #define  RM9000_CDEX_SMP_WAR            1
 #endif
@@ -182,7 +182,7 @@
 * being fetched may case spurious exceptions.
 */
 #if defined(CONFIG_MOMENCO_JAGUAR_ATX) || defined(CONFIG_MOMENCO_OCELOT_3) || \
-    defined(CONFIG_PMC_YOSEMITE)
+    defined(CONFIG_PMC_YOSEMITE) || defined(CONFIG_BASLER_EXCITE)
 #define ICACHE_REFILLS_WORKAROUND_WAR   1
 #endif
diff --git a/include/asm-mips/wbflush.h b/include/asm-mips/wbflush.h
index c3bef50f37a8..eadc0ac47e24 100644
--- a/include/asm-mips/wbflush.h
+++ b/include/asm-mips/wbflush.h
@@ -11,7 +11,6 @@
 #ifndef _ASM_WBFLUSH_H
 #define _ASM_WBFLUSH_H
-#include <linux/config.h>
 #ifdef CONFIG_CPU_HAS_WB