diff options
Diffstat (limited to 'include/asm-mips')
-rw-r--r-- | include/asm-mips/bootinfo.h | 6 | ||||
-rw-r--r-- | include/asm-mips/mach-ev64120/mach-gt64120.h | 62 | ||||
-rw-r--r-- | include/asm-mips/serial.h | 19 |
3 files changed, 0 insertions, 87 deletions
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h index b0c329783ac5..476563924fd1 100644 --- a/include/asm-mips/bootinfo.h +++ b/include/asm-mips/bootinfo.h | |||
@@ -109,12 +109,6 @@ | |||
109 | #define MACH_COSINE_ORION 0 | 109 | #define MACH_COSINE_ORION 0 |
110 | 110 | ||
111 | /* | 111 | /* |
112 | * Valid machtype for group GALILEO | ||
113 | */ | ||
114 | #define MACH_GROUP_GALILEO 11 /* Galileo Eval Boards */ | ||
115 | #define MACH_EV64120A 0 /* EV64120A */ | ||
116 | |||
117 | /* | ||
118 | * Valid machtype for group MOMENCO | 112 | * Valid machtype for group MOMENCO |
119 | */ | 113 | */ |
120 | #define MACH_GROUP_MOMENCO 12 /* Momentum Boards */ | 114 | #define MACH_GROUP_MOMENCO 12 /* Momentum Boards */ |
diff --git a/include/asm-mips/mach-ev64120/mach-gt64120.h b/include/asm-mips/mach-ev64120/mach-gt64120.h deleted file mode 100644 index 7e272ce57ea3..000000000000 --- a/include/asm-mips/mach-ev64120/mach-gt64120.h +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | /* | ||
2 | * This is a direct copy of the ev96100.h file, with a global | ||
3 | * search and replace. The numbers are the same. | ||
4 | * | ||
5 | * The reason I'm duplicating this is so that the 64120/96100 | ||
6 | * defines won't be confusing in the source code. | ||
7 | */ | ||
8 | #ifndef __ASM_GALILEO_BOARDS_MIPS_EV64120_H | ||
9 | #define __ASM_GALILEO_BOARDS_MIPS_EV64120_H | ||
10 | |||
11 | /* | ||
12 | * GT64120 config space base address | ||
13 | */ | ||
14 | extern unsigned long gt64120_base; | ||
15 | |||
16 | #define GT64120_BASE (gt64120_base) | ||
17 | |||
18 | /* | ||
19 | * PCI Bus allocation | ||
20 | */ | ||
21 | #define GT_PCI_MEM_BASE 0x12000000UL | ||
22 | #define GT_PCI_MEM_SIZE 0x02000000UL | ||
23 | #define GT_PCI_IO_BASE 0x10000000UL | ||
24 | #define GT_PCI_IO_SIZE 0x02000000UL | ||
25 | #define GT_ISA_IO_BASE PCI_IO_BASE | ||
26 | |||
27 | /* | ||
28 | * Duart I/O ports. | ||
29 | */ | ||
30 | #define EV64120_COM1_BASE_ADDR (0x1d000000 + 0x20) | ||
31 | #define EV64120_COM2_BASE_ADDR (0x1d000000 + 0x00) | ||
32 | |||
33 | |||
34 | /* | ||
35 | * EV64120 interrupt controller register base. | ||
36 | */ | ||
37 | #define EV64120_ICTRL_REGS_BASE (KSEG1ADDR(0x1f000000)) | ||
38 | |||
39 | /* | ||
40 | * EV64120 UART register base. | ||
41 | */ | ||
42 | #define EV64120_UART0_REGS_BASE (KSEG1ADDR(EV64120_COM1_BASE_ADDR)) | ||
43 | #define EV64120_UART1_REGS_BASE (KSEG1ADDR(EV64120_COM2_BASE_ADDR)) | ||
44 | #define EV64120_BASE_BAUD ( 3686400 / 16 ) | ||
45 | #define EV64120_UART_IRQ 6 | ||
46 | |||
47 | /* | ||
48 | * PCI interrupts will come in on either the INTA or INTD interrups lines, | ||
49 | * which are mapped to the #2 and #5 interrupt pins of the MIPS. On our | ||
50 | * boards, they all either come in on IntD or they all come in on IntA, they | ||
51 | * aren't mixed. There can be numerous PCI interrupts, so we keep a list of the | ||
52 | * "requested" interrupt numbers and go through the list whenever we get an | ||
53 | * IntA/D. | ||
54 | * | ||
55 | * Interrupts < 8 are directly wired to the processor; PCI INTA is 8 and | ||
56 | * INTD is 11. | ||
57 | */ | ||
58 | #define GT_TIMER 4 | ||
59 | #define GT_INTA 2 | ||
60 | #define GT_INTD 5 | ||
61 | |||
62 | #endif /* __ASM_GALILEO_BOARDS_MIPS_EV64120_H */ | ||
diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h index ce51213d84f9..01f1a8213ccc 100644 --- a/include/asm-mips/serial.h +++ b/include/asm-mips/serial.h | |||
@@ -51,24 +51,6 @@ | |||
51 | #define JAZZ_SERIAL_PORT_DEFNS | 51 | #define JAZZ_SERIAL_PORT_DEFNS |
52 | #endif | 52 | #endif |
53 | 53 | ||
54 | /* | ||
55 | * Galileo EV64120 evaluation board | ||
56 | */ | ||
57 | #ifdef CONFIG_MIPS_EV64120 | ||
58 | #include <mach-gt64120.h> | ||
59 | #define EV64120_SERIAL_PORT_DEFNS \ | ||
60 | { .baud_base = EV64120_BASE_BAUD, .irq = EV64120_UART_IRQ, \ | ||
61 | .flags = STD_COM_FLAGS, \ | ||
62 | .iomem_base = EV64120_UART0_REGS_BASE, .iomem_reg_shift = 2, \ | ||
63 | .io_type = SERIAL_IO_MEM }, \ | ||
64 | { .baud_base = EV64120_BASE_BAUD, .irq = EV64120_UART_IRQ, \ | ||
65 | .flags = STD_COM_FLAGS, \ | ||
66 | .iomem_base = EV64120_UART1_REGS_BASE, .iomem_reg_shift = 2, \ | ||
67 | .io_type = SERIAL_IO_MEM }, | ||
68 | #else | ||
69 | #define EV64120_SERIAL_PORT_DEFNS | ||
70 | #endif | ||
71 | |||
72 | #ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT | 54 | #ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT |
73 | #define STD_SERIAL_PORT_DEFNS \ | 55 | #define STD_SERIAL_PORT_DEFNS \ |
74 | /* UART CLK PORT IRQ FLAGS */ \ | 56 | /* UART CLK PORT IRQ FLAGS */ \ |
@@ -166,7 +148,6 @@ | |||
166 | 148 | ||
167 | #define SERIAL_PORT_DFNS \ | 149 | #define SERIAL_PORT_DFNS \ |
168 | DDB5477_SERIAL_PORT_DEFNS \ | 150 | DDB5477_SERIAL_PORT_DEFNS \ |
169 | EV64120_SERIAL_PORT_DEFNS \ | ||
170 | IP32_SERIAL_PORT_DEFNS \ | 151 | IP32_SERIAL_PORT_DEFNS \ |
171 | JAZZ_SERIAL_PORT_DEFNS \ | 152 | JAZZ_SERIAL_PORT_DEFNS \ |
172 | STD_SERIAL_PORT_DEFNS \ | 153 | STD_SERIAL_PORT_DEFNS \ |