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-rw-r--r--include/asm-mips/apm.h64
-rw-r--r--include/asm-mips/bootinfo.h5
-rw-r--r--include/asm-mips/cacheflush.h2
-rw-r--r--include/asm-mips/checksum.h34
-rw-r--r--include/asm-mips/compat.h1
-rw-r--r--include/asm-mips/ddb5xxx/ddb5477.h41
-rw-r--r--include/asm-mips/dec/interrupts.h3
-rw-r--r--include/asm-mips/dec/system.h3
-rw-r--r--include/asm-mips/dec/tc.h41
-rw-r--r--include/asm-mips/dec/tcinfo.h47
-rw-r--r--include/asm-mips/dec/tcmodule.h39
-rw-r--r--include/asm-mips/dma.h1
-rw-r--r--include/asm-mips/emma2rh/emma2rh.h5
-rw-r--r--include/asm-mips/emma2rh/markeins.h1
-rw-r--r--include/asm-mips/hazards.h2
-rw-r--r--include/asm-mips/i8259.h3
-rw-r--r--include/asm-mips/io.h10
-rw-r--r--include/asm-mips/irq.h8
-rw-r--r--include/asm-mips/irq_cpu.h6
-rw-r--r--include/asm-mips/irqflags.h22
-rw-r--r--include/asm-mips/mach-au1x00/au1000.h1
-rw-r--r--include/asm-mips/mach-cobalt/cobalt.h4
-rw-r--r--include/asm-mips/mach-emma2rh/irq.h2
-rw-r--r--include/asm-mips/mach-generic/irq.h32
-rw-r--r--include/asm-mips/mach-ip27/irq.h2
-rw-r--r--include/asm-mips/mach-ip27/topology.h1
-rw-r--r--include/asm-mips/mach-mips/irq.h2
-rw-r--r--include/asm-mips/mach-rm/cpu-feature-overrides.h (renamed from include/asm-mips/mach-rm200/cpu-feature-overrides.h)0
-rw-r--r--include/asm-mips/mach-rm/mc146818rtc.h (renamed from include/asm-mips/mach-rm200/mc146818rtc.h)0
-rw-r--r--include/asm-mips/mach-rm/timex.h (renamed from include/asm-mips/mach-rm200/timex.h)0
-rw-r--r--include/asm-mips/mach-vr41xx/irq.h11
-rw-r--r--include/asm-mips/mips-boards/atlasint.h4
-rw-r--r--include/asm-mips/mips-boards/maltaint.h4
-rw-r--r--include/asm-mips/mips-boards/prom.h1
-rw-r--r--include/asm-mips/mips-boards/seadint.h4
-rw-r--r--include/asm-mips/mips-boards/simint.h3
-rw-r--r--include/asm-mips/mipsmtregs.h2
-rw-r--r--include/asm-mips/page.h41
-rw-r--r--include/asm-mips/pci.h6
-rw-r--r--include/asm-mips/pgtable.h10
-rw-r--r--include/asm-mips/ptrace.h8
-rw-r--r--include/asm-mips/rtlx.h3
-rw-r--r--include/asm-mips/sections.h2
-rw-r--r--include/asm-mips/sgi/ip22.h13
-rw-r--r--include/asm-mips/smtc_ipi.h3
-rw-r--r--include/asm-mips/sn/arch.h1
-rw-r--r--include/asm-mips/sn/klconfig.h2
-rw-r--r--include/asm-mips/system.h9
-rw-r--r--include/asm-mips/termbits.h11
-rw-r--r--include/asm-mips/thread_info.h2
-rw-r--r--include/asm-mips/uaccess.h3
-rw-r--r--include/asm-mips/vr41xx/cmbvr4133.h5
-rw-r--r--include/asm-mips/war.h2
53 files changed, 222 insertions, 310 deletions
diff --git a/include/asm-mips/apm.h b/include/asm-mips/apm.h
deleted file mode 100644
index 4b99ffc11529..000000000000
--- a/include/asm-mips/apm.h
+++ /dev/null
@@ -1,64 +0,0 @@
1/* -*- linux-c -*-
2 *
3 * (C) 2003 zecke@handhelds.org
4 *
5 * GPL version 2
6 *
7 * based on arch/arm/kernel/apm.c
8 * factor out the information needed by architectures to provide
9 * apm status
10 *
11 *
12 */
13#ifndef MIPS_ASM_SA1100_APM_H
14#define MIPS_ASM_SA1100_APM_H
15
16#include <linux/apm_bios.h>
17
18/*
19 * This structure gets filled in by the machine specific 'get_power_status'
20 * implementation. Any fields which are not set default to a safe value.
21 */
22struct apm_power_info {
23 unsigned char ac_line_status;
24#define APM_AC_OFFLINE 0
25#define APM_AC_ONLINE 1
26#define APM_AC_BACKUP 2
27#define APM_AC_UNKNOWN 0xff
28
29 unsigned char battery_status;
30#define APM_BATTERY_STATUS_HIGH 0
31#define APM_BATTERY_STATUS_LOW 1
32#define APM_BATTERY_STATUS_CRITICAL 2
33#define APM_BATTERY_STATUS_CHARGING 3
34#define APM_BATTERY_STATUS_NOT_PRESENT 4
35#define APM_BATTERY_STATUS_UNKNOWN 0xff
36
37 unsigned char battery_flag;
38#define APM_BATTERY_FLAG_HIGH (1 << 0)
39#define APM_BATTERY_FLAG_LOW (1 << 1)
40#define APM_BATTERY_FLAG_CRITICAL (1 << 2)
41#define APM_BATTERY_FLAG_CHARGING (1 << 3)
42#define APM_BATTERY_FLAG_NOT_PRESENT (1 << 7)
43#define APM_BATTERY_FLAG_UNKNOWN 0xff
44
45 int battery_life;
46 int time;
47 int units;
48#define APM_UNITS_MINS 0
49#define APM_UNITS_SECS 1
50#define APM_UNITS_UNKNOWN -1
51
52};
53
54/*
55 * This allows machines to provide their own "apm get power status" function.
56 */
57extern void (*apm_get_power_status)(struct apm_power_info *);
58
59/*
60 * Queue an event (APM_SYS_SUSPEND or APM_CRITICAL_SUSPEND)
61 */
62void apm_queue_event(apm_event_t event);
63
64#endif
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
index 1e5ccdad3b02..c7c945baf1ee 100644
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -131,6 +131,7 @@
131#define MACH_PHILIPS_NINO 0 /* Nino */ 131#define MACH_PHILIPS_NINO 0 /* Nino */
132#define MACH_PHILIPS_VELO 1 /* Velo */ 132#define MACH_PHILIPS_VELO 1 /* Velo */
133#define MACH_PHILIPS_JBS 2 /* JBS */ 133#define MACH_PHILIPS_JBS 2 /* JBS */
134#define MACH_PHILIPS_STB810 3 /* STB810 */
134 135
135/* 136/*
136 * Valid machtype for group SIBYTE 137 * Valid machtype for group SIBYTE
@@ -242,6 +243,10 @@ extern struct boot_mem_map boot_mem_map;
242extern void add_memory_region(phys_t start, phys_t size, long type); 243extern void add_memory_region(phys_t start, phys_t size, long type);
243 244
244extern void prom_init(void); 245extern void prom_init(void);
246extern void prom_free_prom_memory(void);
247
248extern void free_init_pages(const char *what,
249 unsigned long begin, unsigned long end);
245 250
246/* 251/*
247 * Initial kernel command line, usually setup by prom_init() 252 * Initial kernel command line, usually setup by prom_init()
diff --git a/include/asm-mips/cacheflush.h b/include/asm-mips/cacheflush.h
index e3c9925876a3..0ddada3bb0b6 100644
--- a/include/asm-mips/cacheflush.h
+++ b/include/asm-mips/cacheflush.h
@@ -17,6 +17,7 @@
17 * 17 *
18 * - flush_cache_all() flushes entire cache 18 * - flush_cache_all() flushes entire cache
19 * - flush_cache_mm(mm) flushes the specified mm context's cache lines 19 * - flush_cache_mm(mm) flushes the specified mm context's cache lines
20 * - flush_cache_dup mm(mm) handles cache flushing when forking
20 * - flush_cache_page(mm, vmaddr, pfn) flushes a single page 21 * - flush_cache_page(mm, vmaddr, pfn) flushes a single page
21 * - flush_cache_range(vma, start, end) flushes a range of pages 22 * - flush_cache_range(vma, start, end) flushes a range of pages
22 * - flush_icache_range(start, end) flush a range of instructions 23 * - flush_icache_range(start, end) flush a range of instructions
@@ -31,6 +32,7 @@
31extern void (*flush_cache_all)(void); 32extern void (*flush_cache_all)(void);
32extern void (*__flush_cache_all)(void); 33extern void (*__flush_cache_all)(void);
33extern void (*flush_cache_mm)(struct mm_struct *mm); 34extern void (*flush_cache_mm)(struct mm_struct *mm);
35#define flush_cache_dup_mm(mm) do { (void) (mm); } while (0)
34extern void (*flush_cache_range)(struct vm_area_struct *vma, 36extern void (*flush_cache_range)(struct vm_area_struct *vma,
35 unsigned long start, unsigned long end); 37 unsigned long start, unsigned long end);
36extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn); 38extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn);
diff --git a/include/asm-mips/checksum.h b/include/asm-mips/checksum.h
index 9b768c3b96b3..20a81e1548f5 100644
--- a/include/asm-mips/checksum.h
+++ b/include/asm-mips/checksum.h
@@ -29,31 +29,38 @@
29 */ 29 */
30__wsum csum_partial(const void *buff, int len, __wsum sum); 30__wsum csum_partial(const void *buff, int len, __wsum sum);
31 31
32__wsum __csum_partial_copy_user(const void *src, void *dst,
33 int len, __wsum sum, int *err_ptr);
34
32/* 35/*
33 * this is a new version of the above that records errors it finds in *errp, 36 * this is a new version of the above that records errors it finds in *errp,
34 * but continues and zeros the rest of the buffer. 37 * but continues and zeros the rest of the buffer.
35 */ 38 */
36__wsum csum_partial_copy_from_user(const void __user *src, 39static inline
37 void *dst, int len, 40__wsum csum_partial_copy_from_user(const void __user *src, void *dst, int len,
38 __wsum sum, int *errp); 41 __wsum sum, int *err_ptr)
42{
43 might_sleep();
44 return __csum_partial_copy_user((__force void *)src, dst,
45 len, sum, err_ptr);
46}
39 47
40/* 48/*
41 * Copy and checksum to user 49 * Copy and checksum to user
42 */ 50 */
43#define HAVE_CSUM_COPY_USER 51#define HAVE_CSUM_COPY_USER
44static inline __wsum csum_and_copy_to_user (const void *src, void __user *dst, 52static inline
45 int len, __wsum sum, 53__wsum csum_and_copy_to_user(const void *src, void __user *dst, int len,
46 int *err_ptr) 54 __wsum sum, int *err_ptr)
47{ 55{
48 might_sleep(); 56 might_sleep();
49 sum = csum_partial(src, len, sum); 57 if (access_ok(VERIFY_WRITE, dst, len))
50 58 return __csum_partial_copy_user(src, (__force void *)dst,
51 if (copy_to_user(dst, src, len)) { 59 len, sum, err_ptr);
60 if (len)
52 *err_ptr = -EFAULT; 61 *err_ptr = -EFAULT;
53 return (__force __wsum)-1;
54 }
55 62
56 return sum; 63 return (__force __wsum)-1; /* invalid checksum */
57} 64}
58 65
59/* 66/*
@@ -152,7 +159,8 @@ static inline __wsum csum_tcpudp_nofold(__be32 saddr,
152#endif 159#endif
153 " .set pop" 160 " .set pop"
154 : "=r" (sum) 161 : "=r" (sum)
155 : "0" (daddr), "r"(saddr), 162 : "0" ((__force unsigned long)daddr),
163 "r" ((__force unsigned long)saddr),
156#ifdef __MIPSEL__ 164#ifdef __MIPSEL__
157 "r" ((proto + len) << 8), 165 "r" ((proto + len) << 8),
158#else 166#else
diff --git a/include/asm-mips/compat.h b/include/asm-mips/compat.h
index 55a0152feb08..432653d7ae09 100644
--- a/include/asm-mips/compat.h
+++ b/include/asm-mips/compat.h
@@ -5,6 +5,7 @@
5 */ 5 */
6#include <linux/types.h> 6#include <linux/types.h>
7#include <asm/page.h> 7#include <asm/page.h>
8#include <asm/ptrace.h>
8 9
9#define COMPAT_USER_HZ 100 10#define COMPAT_USER_HZ 100
10 11
diff --git a/include/asm-mips/ddb5xxx/ddb5477.h b/include/asm-mips/ddb5xxx/ddb5477.h
index c5af4b73fdd7..6cf177caf6d5 100644
--- a/include/asm-mips/ddb5xxx/ddb5477.h
+++ b/include/asm-mips/ddb5xxx/ddb5477.h
@@ -17,6 +17,7 @@
17#ifndef __ASM_DDB5XXX_DDB5477_H 17#ifndef __ASM_DDB5XXX_DDB5477_H
18#define __ASM_DDB5XXX_DDB5477_H 18#define __ASM_DDB5XXX_DDB5477_H
19 19
20#include <irq.h>
20 21
21/* 22/*
22 * This contains macros that are specific to DDB5477 or renamed from 23 * This contains macros that are specific to DDB5477 or renamed from
@@ -251,14 +252,10 @@ extern void ll_vrc5477_irq_disable(int vrc5477_irq);
251 */ 252 */
252 253
253#define NUM_CPU_IRQ 8 254#define NUM_CPU_IRQ 8
254#define NUM_I8259_IRQ 16
255#define NUM_VRC5477_IRQ 32 255#define NUM_VRC5477_IRQ 32
256 256
257#define DDB_IRQ_BASE 0 257#define CPU_IRQ_BASE MIPS_CPU_IRQ_BASE
258 258#define VRC5477_IRQ_BASE (CPU_IRQ_BASE + NUM_CPU_IRQ)
259#define I8259_IRQ_BASE DDB_IRQ_BASE
260#define VRC5477_IRQ_BASE (I8259_IRQ_BASE + NUM_I8259_IRQ)
261#define CPU_IRQ_BASE (VRC5477_IRQ_BASE + NUM_VRC5477_IRQ)
262 259
263/* 260/*
264 * vrc5477 irq defs 261 * vrc5477 irq defs
@@ -300,22 +297,22 @@ extern void ll_vrc5477_irq_disable(int vrc5477_irq);
300/* 297/*
301 * i2859 irq assignment 298 * i2859 irq assignment
302 */ 299 */
303#define I8259_IRQ_RESERVED_0 (0 + I8259_IRQ_BASE) 300#define I8259_IRQ_RESERVED_0 (0 + I8259A_IRQ_BASE)
304#define I8259_IRQ_KEYBOARD (1 + I8259_IRQ_BASE) /* M1543 default */ 301#define I8259_IRQ_KEYBOARD (1 + I8259A_IRQ_BASE) /* M1543 default */
305#define I8259_IRQ_CASCADE (2 + I8259_IRQ_BASE) 302#define I8259_IRQ_CASCADE (2 + I8259A_IRQ_BASE)
306#define I8259_IRQ_UART_B (3 + I8259_IRQ_BASE) /* M1543 default, may conflict with RTC according to schematic diagram */ 303#define I8259_IRQ_UART_B (3 + I8259A_IRQ_BASE) /* M1543 default, may conflict with RTC according to schematic diagram */
307#define I8259_IRQ_UART_A (4 + I8259_IRQ_BASE) /* M1543 default */ 304#define I8259_IRQ_UART_A (4 + I8259A_IRQ_BASE) /* M1543 default */
308#define I8259_IRQ_PARALLEL (5 + I8259_IRQ_BASE) /* M1543 default */ 305#define I8259_IRQ_PARALLEL (5 + I8259A_IRQ_BASE) /* M1543 default */
309#define I8259_IRQ_RESERVED_6 (6 + I8259_IRQ_BASE) 306#define I8259_IRQ_RESERVED_6 (6 + I8259A_IRQ_BASE)
310#define I8259_IRQ_RESERVED_7 (7 + I8259_IRQ_BASE) 307#define I8259_IRQ_RESERVED_7 (7 + I8259A_IRQ_BASE)
311#define I8259_IRQ_RTC (8 + I8259_IRQ_BASE) /* who set this? */ 308#define I8259_IRQ_RTC (8 + I8259A_IRQ_BASE) /* who set this? */
312#define I8259_IRQ_USB (9 + I8259_IRQ_BASE) /* ddb_setup */ 309#define I8259_IRQ_USB (9 + I8259A_IRQ_BASE) /* ddb_setup */
313#define I8259_IRQ_PMU (10 + I8259_IRQ_BASE) /* ddb_setup */ 310#define I8259_IRQ_PMU (10 + I8259A_IRQ_BASE) /* ddb_setup */
314#define I8259_IRQ_RESERVED_11 (11 + I8259_IRQ_BASE) 311#define I8259_IRQ_RESERVED_11 (11 + I8259A_IRQ_BASE)
315#define I8259_IRQ_RESERVED_12 (12 + I8259_IRQ_BASE) /* m1543_irq_setup */ 312#define I8259_IRQ_RESERVED_12 (12 + I8259A_IRQ_BASE) /* m1543_irq_setup */
316#define I8259_IRQ_RESERVED_13 (13 + I8259_IRQ_BASE) 313#define I8259_IRQ_RESERVED_13 (13 + I8259A_IRQ_BASE)
317#define I8259_IRQ_HDC1 (14 + I8259_IRQ_BASE) /* default and ddb_setup */ 314#define I8259_IRQ_HDC1 (14 + I8259A_IRQ_BASE) /* default and ddb_setup */
318#define I8259_IRQ_HDC2 (15 + I8259_IRQ_BASE) /* default */ 315#define I8259_IRQ_HDC2 (15 + I8259A_IRQ_BASE) /* default */
319 316
320 317
321/* 318/*
diff --git a/include/asm-mips/dec/interrupts.h b/include/asm-mips/dec/interrupts.h
index 273e4d65bfe6..e10d341067c8 100644
--- a/include/asm-mips/dec/interrupts.h
+++ b/include/asm-mips/dec/interrupts.h
@@ -14,6 +14,7 @@
14#ifndef __ASM_DEC_INTERRUPTS_H 14#ifndef __ASM_DEC_INTERRUPTS_H
15#define __ASM_DEC_INTERRUPTS_H 15#define __ASM_DEC_INTERRUPTS_H
16 16
17#include <irq.h>
17#include <asm/mipsregs.h> 18#include <asm/mipsregs.h>
18 19
19 20
@@ -87,7 +88,7 @@
87#define DEC_CPU_INR_SW1 1 /* software #1 */ 88#define DEC_CPU_INR_SW1 1 /* software #1 */
88#define DEC_CPU_INR_SW0 0 /* software #0 */ 89#define DEC_CPU_INR_SW0 0 /* software #0 */
89 90
90#define DEC_CPU_IRQ_BASE 0 /* first IRQ assigned to CPU */ 91#define DEC_CPU_IRQ_BASE MIPS_CPU_IRQ_BASE /* first IRQ assigned to CPU */
91 92
92#define DEC_CPU_IRQ_NR(n) ((n) + DEC_CPU_IRQ_BASE) 93#define DEC_CPU_IRQ_NR(n) ((n) + DEC_CPU_IRQ_BASE)
93#define DEC_CPU_IRQ_MASK(n) (1 << ((n) + CAUSEB_IP)) 94#define DEC_CPU_IRQ_MASK(n) (1 << ((n) + CAUSEB_IP))
diff --git a/include/asm-mips/dec/system.h b/include/asm-mips/dec/system.h
index 78af51fbc797..b2afaccd6831 100644
--- a/include/asm-mips/dec/system.h
+++ b/include/asm-mips/dec/system.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * Generic DECstation/DECsystem bits. 4 * Generic DECstation/DECsystem bits.
5 * 5 *
6 * Copyright (C) 2005 Maciej W. Rozycki 6 * Copyright (C) 2005, 2006 Maciej W. Rozycki
7 * 7 *
8 * This program is free software; you can redistribute it and/or 8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License 9 * modify it under the terms of the GNU General Public License
@@ -14,5 +14,6 @@
14#define __ASM_DEC_SYSTEM_H 14#define __ASM_DEC_SYSTEM_H
15 15
16extern unsigned long dec_kn_slot_base, dec_kn_slot_size; 16extern unsigned long dec_kn_slot_base, dec_kn_slot_size;
17extern int dec_tc_bus;
17 18
18#endif /* __ASM_DEC_SYSTEM_H */ 19#endif /* __ASM_DEC_SYSTEM_H */
diff --git a/include/asm-mips/dec/tc.h b/include/asm-mips/dec/tc.h
deleted file mode 100644
index 9cb51f24d42c..000000000000
--- a/include/asm-mips/dec/tc.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * Interface to the TURBOchannel related routines
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (c) 1998 Harald Koerfgen
9 */
10#ifndef __ASM_DEC_TC_H
11#define __ASM_DEC_TC_H
12
13/*
14 * Search for a TURBOchannel Option Module
15 * with a certain name. Returns slot number
16 * of the first card not in use or -ENODEV
17 * if none found.
18 */
19extern int search_tc_card(const char *);
20/*
21 * Marks the card in slot as used
22 */
23extern void claim_tc_card(int);
24/*
25 * Marks the card in slot as free
26 */
27extern void release_tc_card(int);
28/*
29 * Return base address of card in slot
30 */
31extern unsigned long get_tc_base_addr(int);
32/*
33 * Return interrupt number of slot
34 */
35extern unsigned long get_tc_irq_nr(int);
36/*
37 * Return TURBOchannel clock frequency in Hz
38 */
39extern unsigned long get_tc_speed(void);
40
41#endif /* __ASM_DEC_TC_H */
diff --git a/include/asm-mips/dec/tcinfo.h b/include/asm-mips/dec/tcinfo.h
deleted file mode 100644
index cc23509ee77a..000000000000
--- a/include/asm-mips/dec/tcinfo.h
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * Various TURBOchannel related stuff
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Information obtained through the get_tcinfo prom call
9 * created from:
10 *
11 * TURBOchannel Firmware Specification
12 *
13 * EK-TCAAD-FS-004
14 * from Digital Equipment Corporation
15 *
16 * Copyright (c) 1998 Harald Koerfgen
17 */
18
19typedef struct {
20 int revision;
21 int clk_period;
22 int slot_size;
23 int io_timeout;
24 int dma_range;
25 int max_dma_burst;
26 int parity;
27 int reserved[4];
28} tcinfo;
29
30#define MAX_SLOT 7
31
32typedef struct {
33 unsigned long base_addr;
34 unsigned char name[9];
35 unsigned char vendor[9];
36 unsigned char firmware[9];
37 int interrupt;
38 int flags;
39} slot_info;
40
41/*
42 * Values for flags
43 */
44#define FREE 1<<0
45#define IN_USE 1<<1
46
47
diff --git a/include/asm-mips/dec/tcmodule.h b/include/asm-mips/dec/tcmodule.h
deleted file mode 100644
index 6268e8915d87..000000000000
--- a/include/asm-mips/dec/tcmodule.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Offsets for the ROM header locations for
7 * TURBOchannel cards
8 *
9 * created from:
10 *
11 * TURBOchannel Firmware Specification
12 *
13 * EK-TCAAD-FS-004
14 * from Digital Equipment Corporation
15 *
16 * Jan.1998 Harald Koerfgen
17 */
18#ifndef __ASM_DEC_TCMODULE_H
19#define __ASM_DEC_TCMODULE_H
20
21#define OLDCARD 0x3c0000
22#define NEWCARD 0x000000
23
24#define TC_ROM_WIDTH 0x3e0
25#define TC_ROM_STRIDE 0x3e4
26#define TC_ROM_SIZE 0x3e8
27#define TC_SLOT_SIZE 0x3ec
28#define TC_PATTERN0 0x3f0
29#define TC_PATTERN1 0x3f4
30#define TC_PATTERN2 0x3f8
31#define TC_PATTERN3 0x3fc
32#define TC_FIRM_VER 0x400
33#define TC_VENDOR 0x420
34#define TC_MODULE 0x440
35#define TC_FIRM_TYPE 0x460
36#define TC_FLAGS 0x470
37#define TC_ROM_OBJECTS 0x480
38
39#endif /* __ASM_DEC_TCMODULE_H */
diff --git a/include/asm-mips/dma.h b/include/asm-mips/dma.h
index 23f789c80845..e06ef0776d48 100644
--- a/include/asm-mips/dma.h
+++ b/include/asm-mips/dma.h
@@ -91,6 +91,7 @@
91#else 91#else
92#define MAX_DMA_ADDRESS (PAGE_OFFSET + 0x01000000) 92#define MAX_DMA_ADDRESS (PAGE_OFFSET + 0x01000000)
93#endif 93#endif
94#define MAX_DMA_PFN PFN_DOWN(virt_to_phys((void *)MAX_DMA_ADDRESS))
94 95
95/* 8237 DMA controllers */ 96/* 8237 DMA controllers */
96#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */ 97#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */
diff --git a/include/asm-mips/emma2rh/emma2rh.h b/include/asm-mips/emma2rh/emma2rh.h
index 4fb8df71caa9..6a1af0af51e3 100644
--- a/include/asm-mips/emma2rh/emma2rh.h
+++ b/include/asm-mips/emma2rh/emma2rh.h
@@ -24,6 +24,8 @@
24#ifndef __ASM_EMMA2RH_EMMA2RH_H 24#ifndef __ASM_EMMA2RH_EMMA2RH_H
25#define __ASM_EMMA2RH_EMMA2RH_H 25#define __ASM_EMMA2RH_EMMA2RH_H
26 26
27#include <irq.h>
28
27/* 29/*
28 * EMMA2RH registers 30 * EMMA2RH registers
29 */ 31 */
@@ -104,7 +106,8 @@
104#define NUM_EMMA2RH_IRQ 96 106#define NUM_EMMA2RH_IRQ 96
105 107
106#define CPU_EMMA2RH_CASCADE 2 108#define CPU_EMMA2RH_CASCADE 2
107#define EMMA2RH_IRQ_BASE 0 109#define CPU_IRQ_BASE MIPS_CPU_IRQ_BASE
110#define EMMA2RH_IRQ_BASE (CPU_IRQ_BASE + NUM_CPU_IRQ)
108 111
109/* 112/*
110 * emma2rh irq defs 113 * emma2rh irq defs
diff --git a/include/asm-mips/emma2rh/markeins.h b/include/asm-mips/emma2rh/markeins.h
index 8fa766795078..973b0628490d 100644
--- a/include/asm-mips/emma2rh/markeins.h
+++ b/include/asm-mips/emma2rh/markeins.h
@@ -33,7 +33,6 @@
33 33
34#define EMMA2RH_SW_IRQ_BASE (EMMA2RH_IRQ_BASE + NUM_EMMA2RH_IRQ) 34#define EMMA2RH_SW_IRQ_BASE (EMMA2RH_IRQ_BASE + NUM_EMMA2RH_IRQ)
35#define EMMA2RH_GPIO_IRQ_BASE (EMMA2RH_SW_IRQ_BASE + NUM_EMMA2RH_IRQ_SW) 35#define EMMA2RH_GPIO_IRQ_BASE (EMMA2RH_SW_IRQ_BASE + NUM_EMMA2RH_IRQ_SW)
36#define CPU_IRQ_BASE (EMMA2RH_GPIO_IRQ_BASE + NUM_EMMA2RH_IRQ_GPIO)
37 36
38#define EMMA2RH_SW_IRQ_INT0 (0+EMMA2RH_SW_IRQ_BASE) 37#define EMMA2RH_SW_IRQ_INT0 (0+EMMA2RH_SW_IRQ_BASE)
39#define EMMA2RH_SW_IRQ_INT1 (1+EMMA2RH_SW_IRQ_BASE) 38#define EMMA2RH_SW_IRQ_INT1 (1+EMMA2RH_SW_IRQ_BASE)
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h
index 0fe02945feba..50073157a617 100644
--- a/include/asm-mips/hazards.h
+++ b/include/asm-mips/hazards.h
@@ -157,7 +157,7 @@ ASMMACRO(back_to_back_c0_hazard,
157 * processors. 157 * processors.
158 */ 158 */
159ASMMACRO(mtc0_tlbw_hazard, 159ASMMACRO(mtc0_tlbw_hazard,
160 nop 160 nop; nop
161 ) 161 )
162ASMMACRO(tlbw_use_hazard, 162ASMMACRO(tlbw_use_hazard,
163 nop; nop; nop 163 nop; nop; nop
diff --git a/include/asm-mips/i8259.h b/include/asm-mips/i8259.h
index 4df8d8b118c0..e88a01607fea 100644
--- a/include/asm-mips/i8259.h
+++ b/include/asm-mips/i8259.h
@@ -18,6 +18,7 @@
18#include <linux/spinlock.h> 18#include <linux/spinlock.h>
19 19
20#include <asm/io.h> 20#include <asm/io.h>
21#include <irq.h>
21 22
22/* i8259A PIC registers */ 23/* i8259A PIC registers */
23#define PIC_MASTER_CMD 0x20 24#define PIC_MASTER_CMD 0x20
@@ -42,8 +43,6 @@ extern void disable_8259A_irq(unsigned int irq);
42 43
43extern void init_i8259_irqs(void); 44extern void init_i8259_irqs(void);
44 45
45#define I8259A_IRQ_BASE 0
46
47/* 46/*
48 * Do the traditional i8259 interrupt polling thing. This is for the few 47 * Do the traditional i8259 interrupt polling thing. This is for the few
49 * cases where no better interrupt acknowledge method is available and we 48 * cases where no better interrupt acknowledge method is available and we
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index d77b657c09c7..b6a2eb816628 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -115,7 +115,7 @@ static inline void set_io_port_base(unsigned long base)
115 */ 115 */
116static inline unsigned long virt_to_phys(volatile const void *address) 116static inline unsigned long virt_to_phys(volatile const void *address)
117{ 117{
118 return (unsigned long)address - PAGE_OFFSET; 118 return (unsigned long)address - PAGE_OFFSET + PHYS_OFFSET;
119} 119}
120 120
121/* 121/*
@@ -132,7 +132,7 @@ static inline unsigned long virt_to_phys(volatile const void *address)
132 */ 132 */
133static inline void * phys_to_virt(unsigned long address) 133static inline void * phys_to_virt(unsigned long address)
134{ 134{
135 return (void *)(address + PAGE_OFFSET); 135 return (void *)(address + PAGE_OFFSET - PHYS_OFFSET);
136} 136}
137 137
138/* 138/*
@@ -556,12 +556,6 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
556#define __ISA_IO_base ((char *)(isa_slot_offset)) 556#define __ISA_IO_base ((char *)(isa_slot_offset))
557 557
558/* 558/*
559 * We don't have csum_partial_copy_fromio() yet, so we cheat here and
560 * just copy it. The net code will then do the checksum later.
561 */
562#define eth_io_copy_and_sum(skb,src,len,unused) memcpy_fromio((skb)->data,(src),(len))
563
564/*
565 * The caches on some architectures aren't dma-coherent and have need to 559 * The caches on some architectures aren't dma-coherent and have need to
566 * handle this in software. There are three types of operations that 560 * handle this in software. There are three types of operations that
567 * can be applied to dma buffers. 561 * can be applied to dma buffers.
diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h
index 67657089efa7..91803ba30ff2 100644
--- a/include/asm-mips/irq.h
+++ b/include/asm-mips/irq.h
@@ -18,7 +18,7 @@
18#ifdef CONFIG_I8259 18#ifdef CONFIG_I8259
19static inline int irq_canonicalize(int irq) 19static inline int irq_canonicalize(int irq)
20{ 20{
21 return ((irq == 2) ? 9 : irq); 21 return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq);
22} 22}
23#else 23#else
24#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */ 24#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
@@ -31,14 +31,14 @@ static inline int irq_canonicalize(int irq)
31 * functions will take over re-enabling the low-level mask. 31 * functions will take over re-enabling the low-level mask.
32 * Otherwise it will be done on return from exception. 32 * Otherwise it will be done on return from exception.
33 */ 33 */
34#define __DO_IRQ_SMTC_HOOK() \ 34#define __DO_IRQ_SMTC_HOOK(irq) \
35do { \ 35do { \
36 if (irq_hwmask[irq] & 0x0000ff00) \ 36 if (irq_hwmask[irq] & 0x0000ff00) \
37 write_c0_tccontext(read_c0_tccontext() & \ 37 write_c0_tccontext(read_c0_tccontext() & \
38 ~(irq_hwmask[irq] & 0x0000ff00)); \ 38 ~(irq_hwmask[irq] & 0x0000ff00)); \
39} while (0) 39} while (0)
40#else 40#else
41#define __DO_IRQ_SMTC_HOOK() do { } while (0) 41#define __DO_IRQ_SMTC_HOOK(irq) do { } while (0)
42#endif 42#endif
43 43
44/* 44/*
@@ -52,7 +52,7 @@ do { \
52#define do_IRQ(irq) \ 52#define do_IRQ(irq) \
53do { \ 53do { \
54 irq_enter(); \ 54 irq_enter(); \
55 __DO_IRQ_SMTC_HOOK(); \ 55 __DO_IRQ_SMTC_HOOK(irq); \
56 generic_handle_irq(irq); \ 56 generic_handle_irq(irq); \
57 irq_exit(); \ 57 irq_exit(); \
58} while (0) 58} while (0)
diff --git a/include/asm-mips/irq_cpu.h b/include/asm-mips/irq_cpu.h
index ed3d1e3d09ec..ef6a07cddb23 100644
--- a/include/asm-mips/irq_cpu.h
+++ b/include/asm-mips/irq_cpu.h
@@ -13,8 +13,8 @@
13#ifndef _ASM_IRQ_CPU_H 13#ifndef _ASM_IRQ_CPU_H
14#define _ASM_IRQ_CPU_H 14#define _ASM_IRQ_CPU_H
15 15
16extern void mips_cpu_irq_init(int irq_base); 16extern void mips_cpu_irq_init(void);
17extern void rm7k_cpu_irq_init(int irq_base); 17extern void rm7k_cpu_irq_init(void);
18extern void rm9k_cpu_irq_init(int irq_base); 18extern void rm9k_cpu_irq_init(void);
19 19
20#endif /* _ASM_IRQ_CPU_H */ 20#endif /* _ASM_IRQ_CPU_H */
diff --git a/include/asm-mips/irqflags.h b/include/asm-mips/irqflags.h
index 46bf5de5ac72..af3b07dfad4b 100644
--- a/include/asm-mips/irqflags.h
+++ b/include/asm-mips/irqflags.h
@@ -15,6 +15,27 @@
15 15
16#include <asm/hazards.h> 16#include <asm/hazards.h>
17 17
18/*
19 * CONFIG_MIPS_MT_SMTC_INSTANT_REPLAY does prompt replay of deferred IPIs,
20 * at the cost of branch and call overhead on each local_irq_restore()
21 */
22
23#ifdef CONFIG_MIPS_MT_SMTC_INSTANT_REPLAY
24
25extern void smtc_ipi_replay(void);
26
27#define irq_restore_epilog(flags) \
28do { \
29 if (!(flags & 0x0400)) \
30 smtc_ipi_replay(); \
31} while (0)
32
33#else
34
35#define irq_restore_epilog(ignore) do { } while (0)
36
37#endif /* CONFIG_MIPS_MT_SMTC_INSTANT_REPLAY */
38
18__asm__ ( 39__asm__ (
19 " .macro raw_local_irq_enable \n" 40 " .macro raw_local_irq_enable \n"
20 " .set push \n" 41 " .set push \n"
@@ -193,6 +214,7 @@ do { \
193 : "=r" (__tmp1) \ 214 : "=r" (__tmp1) \
194 : "0" (flags) \ 215 : "0" (flags) \
195 : "memory"); \ 216 : "memory"); \
217 irq_restore_epilog(flags); \
196} while(0) 218} while(0)
197 219
198static inline int raw_irqs_disabled_flags(unsigned long flags) 220static inline int raw_irqs_disabled_flags(unsigned long flags)
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 582acd8adb81..58fca8a5a9a6 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -39,6 +39,7 @@
39#ifndef _LANGUAGE_ASSEMBLY 39#ifndef _LANGUAGE_ASSEMBLY
40 40
41#include <linux/delay.h> 41#include <linux/delay.h>
42#include <linux/types.h>
42#include <asm/io.h> 43#include <asm/io.h>
43 44
44/* cpu pipeline flush */ 45/* cpu pipeline flush */
diff --git a/include/asm-mips/mach-cobalt/cobalt.h b/include/asm-mips/mach-cobalt/cobalt.h
index 00b0fc68d5cb..24a8d51a55a3 100644
--- a/include/asm-mips/mach-cobalt/cobalt.h
+++ b/include/asm-mips/mach-cobalt/cobalt.h
@@ -12,6 +12,8 @@
12#ifndef __ASM_COBALT_H 12#ifndef __ASM_COBALT_H
13#define __ASM_COBALT_H 13#define __ASM_COBALT_H
14 14
15#include <irq.h>
16
15/* 17/*
16 * i8259 legacy interrupts used on Cobalt: 18 * i8259 legacy interrupts used on Cobalt:
17 * 19 *
@@ -25,7 +27,7 @@
25/* 27/*
26 * CPU IRQs are 16 ... 23 28 * CPU IRQs are 16 ... 23
27 */ 29 */
28#define COBALT_CPU_IRQ 16 30#define COBALT_CPU_IRQ MIPS_CPU_IRQ_BASE
29 31
30#define COBALT_GALILEO_IRQ (COBALT_CPU_IRQ + 2) 32#define COBALT_GALILEO_IRQ (COBALT_CPU_IRQ + 2)
31#define COBALT_SCC_IRQ (COBALT_CPU_IRQ + 3) /* pre-production has 85C30 */ 33#define COBALT_SCC_IRQ (COBALT_CPU_IRQ + 3) /* pre-production has 85C30 */
diff --git a/include/asm-mips/mach-emma2rh/irq.h b/include/asm-mips/mach-emma2rh/irq.h
index bce64244b800..5439eb856461 100644
--- a/include/asm-mips/mach-emma2rh/irq.h
+++ b/include/asm-mips/mach-emma2rh/irq.h
@@ -10,4 +10,6 @@
10 10
11#define NR_IRQS 256 11#define NR_IRQS 256
12 12
13#include_next <irq.h>
14
13#endif /* __ASM_MACH_EMMA2RH_IRQ_H */ 15#endif /* __ASM_MACH_EMMA2RH_IRQ_H */
diff --git a/include/asm-mips/mach-generic/irq.h b/include/asm-mips/mach-generic/irq.h
index 500e10ff24de..70d9a25132c5 100644
--- a/include/asm-mips/mach-generic/irq.h
+++ b/include/asm-mips/mach-generic/irq.h
@@ -8,6 +8,38 @@
8#ifndef __ASM_MACH_GENERIC_IRQ_H 8#ifndef __ASM_MACH_GENERIC_IRQ_H
9#define __ASM_MACH_GENERIC_IRQ_H 9#define __ASM_MACH_GENERIC_IRQ_H
10 10
11#ifndef NR_IRQS
11#define NR_IRQS 128 12#define NR_IRQS 128
13#endif
14
15#ifdef CONFIG_I8259
16#ifndef I8259A_IRQ_BASE
17#define I8259A_IRQ_BASE 0
18#endif
19#endif
20
21#ifdef CONFIG_IRQ_CPU
22
23#ifndef MIPS_CPU_IRQ_BASE
24#ifdef CONFIG_I8259
25#define MIPS_CPU_IRQ_BASE 16
26#else
27#define MIPS_CPU_IRQ_BASE 0
28#endif /* CONFIG_I8259 */
29#endif
30
31#ifdef CONFIG_IRQ_CPU_RM7K
32#ifndef RM7K_CPU_IRQ_BASE
33#define RM7K_CPU_IRQ_BASE (MIPS_CPU_IRQ_BASE+8)
34#endif
35#endif
36
37#ifdef CONFIG_IRQ_CPU_RM9K
38#ifndef RM9K_CPU_IRQ_BASE
39#define RM9K_CPU_IRQ_BASE (MIPS_CPU_IRQ_BASE+12)
40#endif
41#endif
42
43#endif /* CONFIG_IRQ_CPU */
12 44
13#endif /* __ASM_MACH_GENERIC_IRQ_H */ 45#endif /* __ASM_MACH_GENERIC_IRQ_H */
diff --git a/include/asm-mips/mach-ip27/irq.h b/include/asm-mips/mach-ip27/irq.h
index 806213ce31b6..25f0c3f39adf 100644
--- a/include/asm-mips/mach-ip27/irq.h
+++ b/include/asm-mips/mach-ip27/irq.h
@@ -10,8 +10,6 @@
10#ifndef __ASM_MACH_IP27_IRQ_H 10#ifndef __ASM_MACH_IP27_IRQ_H
11#define __ASM_MACH_IP27_IRQ_H 11#define __ASM_MACH_IP27_IRQ_H
12 12
13#include <asm/sn/arch.h>
14
15/* 13/*
16 * A hardwired interrupt number is completly stupid for this system - a 14 * A hardwired interrupt number is completly stupid for this system - a
17 * large configuration might have thousands if not tenthousands of 15 * large configuration might have thousands if not tenthousands of
diff --git a/include/asm-mips/mach-ip27/topology.h b/include/asm-mips/mach-ip27/topology.h
index a13b715fd9ca..44790fdc5d00 100644
--- a/include/asm-mips/mach-ip27/topology.h
+++ b/include/asm-mips/mach-ip27/topology.h
@@ -1,7 +1,6 @@
1#ifndef _ASM_MACH_TOPOLOGY_H 1#ifndef _ASM_MACH_TOPOLOGY_H
2#define _ASM_MACH_TOPOLOGY_H 1 2#define _ASM_MACH_TOPOLOGY_H 1
3 3
4#include <asm/sn/arch.h>
5#include <asm/sn/hub.h> 4#include <asm/sn/hub.h>
6#include <asm/mmzone.h> 5#include <asm/mmzone.h>
7 6
diff --git a/include/asm-mips/mach-mips/irq.h b/include/asm-mips/mach-mips/irq.h
index e994b0c01227..9b9da26683c2 100644
--- a/include/asm-mips/mach-mips/irq.h
+++ b/include/asm-mips/mach-mips/irq.h
@@ -4,4 +4,6 @@
4 4
5#define NR_IRQS 256 5#define NR_IRQS 256
6 6
7#include_next <irq.h>
8
7#endif /* __ASM_MACH_MIPS_IRQ_H */ 9#endif /* __ASM_MACH_MIPS_IRQ_H */
diff --git a/include/asm-mips/mach-rm200/cpu-feature-overrides.h b/include/asm-mips/mach-rm/cpu-feature-overrides.h
index 11410ae10d36..11410ae10d36 100644
--- a/include/asm-mips/mach-rm200/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-rm/cpu-feature-overrides.h
diff --git a/include/asm-mips/mach-rm200/mc146818rtc.h b/include/asm-mips/mach-rm/mc146818rtc.h
index d37ae68dc6a3..d37ae68dc6a3 100644
--- a/include/asm-mips/mach-rm200/mc146818rtc.h
+++ b/include/asm-mips/mach-rm/mc146818rtc.h
diff --git a/include/asm-mips/mach-rm200/timex.h b/include/asm-mips/mach-rm/timex.h
index 11ff6cb0f214..11ff6cb0f214 100644
--- a/include/asm-mips/mach-rm200/timex.h
+++ b/include/asm-mips/mach-rm/timex.h
diff --git a/include/asm-mips/mach-vr41xx/irq.h b/include/asm-mips/mach-vr41xx/irq.h
new file mode 100644
index 000000000000..848812296052
--- /dev/null
+++ b/include/asm-mips/mach-vr41xx/irq.h
@@ -0,0 +1,11 @@
1#ifndef __ASM_MACH_VR41XX_IRQ_H
2#define __ASM_MACH_VR41XX_IRQ_H
3
4#include <asm/vr41xx/irq.h> /* for MIPS_CPU_IRQ_BASE */
5#ifdef CONFIG_NEC_CMBVR4133
6#include <asm/vr41xx/cmbvr4133.h> /* for I8259A_IRQ_BASE */
7#endif
8
9#include_next <irq.h>
10
11#endif /* __ASM_MACH_VR41XX_IRQ_H */
diff --git a/include/asm-mips/mips-boards/atlasint.h b/include/asm-mips/mips-boards/atlasint.h
index b15e4ea0b091..76add42e486e 100644
--- a/include/asm-mips/mips-boards/atlasint.h
+++ b/include/asm-mips/mips-boards/atlasint.h
@@ -26,10 +26,12 @@
26#ifndef _MIPS_ATLASINT_H 26#ifndef _MIPS_ATLASINT_H
27#define _MIPS_ATLASINT_H 27#define _MIPS_ATLASINT_H
28 28
29#include <irq.h>
30
29/* 31/*
30 * Interrupts 0..7 are used for Atlas CPU interrupts (nonEIC mode) 32 * Interrupts 0..7 are used for Atlas CPU interrupts (nonEIC mode)
31 */ 33 */
32#define MIPSCPU_INT_BASE 0 34#define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE
33 35
34/* CPU interrupt offsets */ 36/* CPU interrupt offsets */
35#define MIPSCPU_INT_SW0 0 37#define MIPSCPU_INT_SW0 0
diff --git a/include/asm-mips/mips-boards/maltaint.h b/include/asm-mips/mips-boards/maltaint.h
index da6cc2fbbc78..9180d6466113 100644
--- a/include/asm-mips/mips-boards/maltaint.h
+++ b/include/asm-mips/mips-boards/maltaint.h
@@ -25,6 +25,8 @@
25#ifndef _MIPS_MALTAINT_H 25#ifndef _MIPS_MALTAINT_H
26#define _MIPS_MALTAINT_H 26#define _MIPS_MALTAINT_H
27 27
28#include <irq.h>
29
28/* 30/*
29 * Interrupts 0..15 are used for Malta ISA compatible interrupts 31 * Interrupts 0..15 are used for Malta ISA compatible interrupts
30 */ 32 */
@@ -33,7 +35,7 @@
33/* 35/*
34 * Interrupts 16..23 are used for Malta CPU interrupts (nonEIC mode) 36 * Interrupts 16..23 are used for Malta CPU interrupts (nonEIC mode)
35 */ 37 */
36#define MIPSCPU_INT_BASE 16 38#define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE
37 39
38/* CPU interrupt offsets */ 40/* CPU interrupt offsets */
39#define MIPSCPU_INT_SW0 0 41#define MIPSCPU_INT_SW0 0
diff --git a/include/asm-mips/mips-boards/prom.h b/include/asm-mips/mips-boards/prom.h
index 4168c7fcd43e..7bf6f5f6ab9c 100644
--- a/include/asm-mips/mips-boards/prom.h
+++ b/include/asm-mips/mips-boards/prom.h
@@ -33,7 +33,6 @@ extern void prom_printf(char *fmt, ...);
33extern void prom_init_cmdline(void); 33extern void prom_init_cmdline(void);
34extern void prom_meminit(void); 34extern void prom_meminit(void);
35extern void prom_fixup_mem_map(unsigned long start_mem, unsigned long end_mem); 35extern void prom_fixup_mem_map(unsigned long start_mem, unsigned long end_mem);
36extern unsigned long prom_free_prom_memory (void);
37extern void mips_display_message(const char *str); 36extern void mips_display_message(const char *str);
38extern void mips_display_word(unsigned int num); 37extern void mips_display_word(unsigned int num);
39extern int get_ethernet_addr(char *ethernet_addr); 38extern int get_ethernet_addr(char *ethernet_addr);
diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h
index 365c2a3c64f5..4f6a3933699d 100644
--- a/include/asm-mips/mips-boards/seadint.h
+++ b/include/asm-mips/mips-boards/seadint.h
@@ -20,10 +20,12 @@
20#ifndef _MIPS_SEADINT_H 20#ifndef _MIPS_SEADINT_H
21#define _MIPS_SEADINT_H 21#define _MIPS_SEADINT_H
22 22
23#include <irq.h>
24
23/* 25/*
24 * Interrupts 0..7 are used for SEAD CPU interrupts 26 * Interrupts 0..7 are used for SEAD CPU interrupts
25 */ 27 */
26#define MIPSCPU_INT_BASE 0 28#define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE
27 29
28#define MIPSCPU_INT_UART0 2 30#define MIPSCPU_INT_UART0 2
29#define MIPSCPU_INT_UART1 3 31#define MIPSCPU_INT_UART1 3
diff --git a/include/asm-mips/mips-boards/simint.h b/include/asm-mips/mips-boards/simint.h
index 4952e0b3bf11..54f2fe621d69 100644
--- a/include/asm-mips/mips-boards/simint.h
+++ b/include/asm-mips/mips-boards/simint.h
@@ -17,10 +17,11 @@
17#ifndef _MIPS_SIMINT_H 17#ifndef _MIPS_SIMINT_H
18#define _MIPS_SIMINT_H 18#define _MIPS_SIMINT_H
19 19
20#include <irq.h>
20 21
21#define SIM_INT_BASE 0 22#define SIM_INT_BASE 0
22#define MIPSCPU_INT_MB0 2 23#define MIPSCPU_INT_MB0 2
23#define MIPSCPU_INT_BASE 16 24#define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE
24#define MIPS_CPU_TIMER_IRQ 7 25#define MIPS_CPU_TIMER_IRQ 7
25 26
26 27
diff --git a/include/asm-mips/mipsmtregs.h b/include/asm-mips/mipsmtregs.h
index 3e9468f424f4..294bca12cd3f 100644
--- a/include/asm-mips/mipsmtregs.h
+++ b/include/asm-mips/mipsmtregs.h
@@ -165,8 +165,6 @@
165 165
166#ifndef __ASSEMBLY__ 166#ifndef __ASSEMBLY__
167 167
168extern void mips_mt_regdump(unsigned long previous_mvpcontrol_value);
169
170static inline unsigned int dvpe(void) 168static inline unsigned int dvpe(void)
171{ 169{
172 int res = 0; 170 int res = 0;
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index 0dc1a45c27ed..d3fbd83ff545 100644
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -34,8 +34,21 @@
34 34
35#ifndef __ASSEMBLY__ 35#ifndef __ASSEMBLY__
36 36
37/*
38 * This gives the physical RAM offset.
39 */
40#ifndef PHYS_OFFSET
41#define PHYS_OFFSET 0UL
42#endif
43
44/*
45 * It's normally defined only for FLATMEM config but it's
46 * used in our early mem init code for all memory models.
47 * So always define it.
48 */
49#define ARCH_PFN_OFFSET PFN_UP(PHYS_OFFSET)
50
37#include <linux/pfn.h> 51#include <linux/pfn.h>
38#include <asm/cpu-features.h>
39#include <asm/io.h> 52#include <asm/io.h>
40 53
41extern void clear_page(void * page); 54extern void clear_page(void * page);
@@ -61,16 +74,13 @@ static inline void clear_user_page(void *addr, unsigned long vaddr,
61 flush_data_cache_page((unsigned long)addr); 74 flush_data_cache_page((unsigned long)addr);
62} 75}
63 76
64static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, 77extern void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
65 struct page *to) 78 struct page *to);
66{ 79struct vm_area_struct;
67 extern void (*flush_data_cache_page)(unsigned long addr); 80extern void copy_user_highpage(struct page *to, struct page *from,
81 unsigned long vaddr, struct vm_area_struct *vma);
68 82
69 copy_page(vto, vfrom); 83#define __HAVE_ARCH_COPY_USER_HIGHPAGE
70 if (!cpu_has_ic_fills_f_dc ||
71 pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
72 flush_data_cache_page((unsigned long)vto);
73}
74 84
75/* 85/*
76 * These are used to make use of C type-checking.. 86 * These are used to make use of C type-checking..
@@ -136,20 +146,23 @@ typedef struct { unsigned long pgprot; } pgprot_t;
136/* to align the pointer to the (next) page boundary */ 146/* to align the pointer to the (next) page boundary */
137#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK) 147#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK)
138 148
149/*
150 * __pa()/__va() should be used only during mem init.
151 */
139#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) 152#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
140#define __pa_page_offset(x) ((unsigned long)(x) < CKSEG0 ? PAGE_OFFSET : CKSEG0) 153#define __pa_page_offset(x) ((unsigned long)(x) < CKSEG0 ? PAGE_OFFSET : CKSEG0)
141#else 154#else
142#define __pa_page_offset(x) PAGE_OFFSET 155#define __pa_page_offset(x) PAGE_OFFSET
143#endif 156#endif
144#define __pa(x) ((unsigned long)(x) - __pa_page_offset(x)) 157#define __pa(x) ((unsigned long)(x) - __pa_page_offset(x) + PHYS_OFFSET)
145#define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x),0)) 158#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET))
146#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET)) 159#define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x),0))
147 160
148#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) 161#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
149 162
150#ifdef CONFIG_FLATMEM 163#ifdef CONFIG_FLATMEM
151 164
152#define pfn_valid(pfn) ((pfn) < max_mapnr) 165#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr)
153 166
154#elif defined(CONFIG_SPARSEMEM) 167#elif defined(CONFIG_SPARSEMEM)
155 168
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index c4d68bebdca6..7f0f120ca07c 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -187,4 +187,10 @@ static inline void pcibios_add_platform_entries(struct pci_dev *dev)
187/* Do platform specific device initialization at pci_enable_device() time */ 187/* Do platform specific device initialization at pci_enable_device() time */
188extern int pcibios_plat_dev_init(struct pci_dev *dev); 188extern int pcibios_plat_dev_init(struct pci_dev *dev);
189 189
190/* Chances are this interrupt is wired PC-style ... */
191static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
192{
193 return channel ? 15 : 14;
194}
195
190#endif /* _ASM_PCI_H */ 196#endif /* _ASM_PCI_H */
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index f2e1325fec6c..3fcfd7979de5 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -69,16 +69,6 @@ extern unsigned long zero_page_mask;
69#define ZERO_PAGE(vaddr) \ 69#define ZERO_PAGE(vaddr) \
70 (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask)))) 70 (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
71 71
72#define __HAVE_ARCH_MOVE_PTE
73#define move_pte(pte, prot, old_addr, new_addr) \
74({ \
75 pte_t newpte = (pte); \
76 if (pte_present(pte) && pfn_valid(pte_pfn(pte)) && \
77 pte_page(pte) == ZERO_PAGE(old_addr)) \
78 newpte = mk_pte(ZERO_PAGE(new_addr), (prot)); \
79 newpte; \
80})
81
82extern void paging_init(void); 72extern void paging_init(void);
83 73
84/* 74/*
diff --git a/include/asm-mips/ptrace.h b/include/asm-mips/ptrace.h
index 30bf555faeaa..8a1f2b6f04ac 100644
--- a/include/asm-mips/ptrace.h
+++ b/include/asm-mips/ptrace.h
@@ -82,6 +82,14 @@ struct pt_regs {
82 82
83extern asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit); 83extern asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit);
84 84
85extern NORET_TYPE void die(const char *, struct pt_regs *);
86
87static inline void die_if_kernel(const char *str, struct pt_regs *regs)
88{
89 if (unlikely(!user_mode(regs)))
90 die(str, regs);
91}
92
85#endif 93#endif
86 94
87#endif /* _ASM_PTRACE_H */ 95#endif /* _ASM_PTRACE_H */
diff --git a/include/asm-mips/rtlx.h b/include/asm-mips/rtlx.h
index 76cd51c6be39..59162f74a798 100644
--- a/include/asm-mips/rtlx.h
+++ b/include/asm-mips/rtlx.h
@@ -6,9 +6,10 @@
6#ifndef __ASM_RTLX_H 6#ifndef __ASM_RTLX_H
7#define __ASM_RTLX_H_ 7#define __ASM_RTLX_H_
8 8
9#include <irq.h>
10
9#define LX_NODE_BASE 10 11#define LX_NODE_BASE 10
10 12
11#define MIPSCPU_INT_BASE 16
12#define MIPS_CPU_RTLX_IRQ 0 13#define MIPS_CPU_RTLX_IRQ 0
13 14
14#define RTLX_VERSION 2 15#define RTLX_VERSION 2
diff --git a/include/asm-mips/sections.h b/include/asm-mips/sections.h
index f7016278b266..b7e37262c246 100644
--- a/include/asm-mips/sections.h
+++ b/include/asm-mips/sections.h
@@ -3,6 +3,4 @@
3 3
4#include <asm-generic/sections.h> 4#include <asm-generic/sections.h>
5 5
6extern char _fdata;
7
8#endif /* _ASM_SECTIONS_H */ 6#endif /* _ASM_SECTIONS_H */
diff --git a/include/asm-mips/sgi/ip22.h b/include/asm-mips/sgi/ip22.h
index bbfc05c3cab9..6592f3bd1999 100644
--- a/include/asm-mips/sgi/ip22.h
+++ b/include/asm-mips/sgi/ip22.h
@@ -21,15 +21,16 @@
21 * HAL2 driver). This will prevent many complications, trust me ;-) 21 * HAL2 driver). This will prevent many complications, trust me ;-)
22 */ 22 */
23 23
24#include <irq.h>
24#include <asm/sgi/ioc.h> 25#include <asm/sgi/ioc.h>
25 26
26#define SGINT_EISA 0 /* 16 EISA irq levels (Indigo2) */ 27#define SGINT_EISA 0 /* 16 EISA irq levels (Indigo2) */
27#define SGINT_CPU 16 /* MIPS CPU define 8 interrupt sources */ 28#define SGINT_CPU MIPS_CPU_IRQ_BASE /* MIPS CPU define 8 interrupt sources */
28#define SGINT_LOCAL0 24 /* 8 local0 irq levels */ 29#define SGINT_LOCAL0 (SGINT_CPU+8) /* 8 local0 irq levels */
29#define SGINT_LOCAL1 32 /* 8 local1 irq levels */ 30#define SGINT_LOCAL1 (SGINT_CPU+16) /* 8 local1 irq levels */
30#define SGINT_LOCAL2 40 /* 8 local2 vectored irq levels */ 31#define SGINT_LOCAL2 (SGINT_CPU+24) /* 8 local2 vectored irq levels */
31#define SGINT_LOCAL3 48 /* 8 local3 vectored irq levels */ 32#define SGINT_LOCAL3 (SGINT_CPU+32) /* 8 local3 vectored irq levels */
32#define SGINT_END 56 /* End of 'spaces' */ 33#define SGINT_END (SGINT_CPU+40) /* End of 'spaces' */
33 34
34/* 35/*
35 * Individual interrupt definitions for the Indy and Indigo2 36 * Individual interrupt definitions for the Indy and Indigo2
diff --git a/include/asm-mips/smtc_ipi.h b/include/asm-mips/smtc_ipi.h
index f22c3e2f993a..55f3419f6546 100644
--- a/include/asm-mips/smtc_ipi.h
+++ b/include/asm-mips/smtc_ipi.h
@@ -44,9 +44,6 @@ struct smtc_ipi_q {
44 int depth; 44 int depth;
45}; 45};
46 46
47extern struct smtc_ipi_q IPIQ[NR_CPUS];
48extern struct smtc_ipi_q freeIPIq;
49
50static inline void smtc_ipi_nq(struct smtc_ipi_q *q, struct smtc_ipi *p) 47static inline void smtc_ipi_nq(struct smtc_ipi_q *q, struct smtc_ipi *p)
51{ 48{
52 long flags; 49 long flags;
diff --git a/include/asm-mips/sn/arch.h b/include/asm-mips/sn/arch.h
index 51174af6ac52..da523de628be 100644
--- a/include/asm-mips/sn/arch.h
+++ b/include/asm-mips/sn/arch.h
@@ -18,7 +18,6 @@
18#endif 18#endif
19 19
20typedef u64 hubreg_t; 20typedef u64 hubreg_t;
21typedef u64 nic_t;
22 21
23#define cputonasid(cpu) (cpu_data[(cpu)].p_nasid) 22#define cputonasid(cpu) (cpu_data[(cpu)].p_nasid)
24#define cputoslice(cpu) (cpu_data[(cpu)].p_slice) 23#define cputoslice(cpu) (cpu_data[(cpu)].p_slice)
diff --git a/include/asm-mips/sn/klconfig.h b/include/asm-mips/sn/klconfig.h
index 15d70ca56187..82aeb9e322db 100644
--- a/include/asm-mips/sn/klconfig.h
+++ b/include/asm-mips/sn/klconfig.h
@@ -61,6 +61,8 @@
61#endif /* CONFIG_SGI_IP35 */ 61#endif /* CONFIG_SGI_IP35 */
62#endif /* CONFIG_SGI_IP27 || CONFIG_SGI_IP35 */ 62#endif /* CONFIG_SGI_IP27 || CONFIG_SGI_IP35 */
63 63
64typedef u64 nic_t;
65
64#define KLCFGINFO_MAGIC 0xbeedbabe 66#define KLCFGINFO_MAGIC 0xbeedbabe
65 67
66typedef s32 klconf_off_t; 68typedef s32 klconf_off_t;
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 9428057a50cf..5e1289c85ed9 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -19,7 +19,6 @@
19#include <asm/barrier.h> 19#include <asm/barrier.h>
20#include <asm/cpu-features.h> 20#include <asm/cpu-features.h>
21#include <asm/dsp.h> 21#include <asm/dsp.h>
22#include <asm/ptrace.h>
23#include <asm/war.h> 22#include <asm/war.h>
24 23
25 24
@@ -336,14 +335,6 @@ extern void *set_except_vector(int n, void *addr);
336extern unsigned long ebase; 335extern unsigned long ebase;
337extern void per_cpu_trap_init(void); 336extern void per_cpu_trap_init(void);
338 337
339extern NORET_TYPE void die(const char *, struct pt_regs *);
340
341static inline void die_if_kernel(const char *str, struct pt_regs *regs)
342{
343 if (unlikely(!user_mode(regs)))
344 die(str, regs);
345}
346
347extern int stop_a_enabled; 338extern int stop_a_enabled;
348 339
349/* 340/*
diff --git a/include/asm-mips/termbits.h b/include/asm-mips/termbits.h
index b62ec7c521cc..0bbe07b42a07 100644
--- a/include/asm-mips/termbits.h
+++ b/include/asm-mips/termbits.h
@@ -30,6 +30,17 @@ struct termios {
30 cc_t c_cc[NCCS]; /* control characters */ 30 cc_t c_cc[NCCS]; /* control characters */
31}; 31};
32 32
33struct ktermios {
34 tcflag_t c_iflag; /* input mode flags */
35 tcflag_t c_oflag; /* output mode flags */
36 tcflag_t c_cflag; /* control mode flags */
37 tcflag_t c_lflag; /* local mode flags */
38 cc_t c_line; /* line discipline */
39 cc_t c_cc[NCCS]; /* control characters */
40 speed_t c_ispeed; /* input speed */
41 speed_t c_ospeed; /* output speed */
42};
43
33/* c_cc characters */ 44/* c_cc characters */
34#define VINTR 0 /* Interrupt character [ISIG]. */ 45#define VINTR 0 /* Interrupt character [ISIG]. */
35#define VQUIT 1 /* Quit character [ISIG]. */ 46#define VQUIT 1 /* Quit character [ISIG]. */
diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h
index e475c45ea263..fbcda8204473 100644
--- a/include/asm-mips/thread_info.h
+++ b/include/asm-mips/thread_info.h
@@ -118,6 +118,7 @@ register struct thread_info *__current_thread_info __asm__("$28");
118#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ 118#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
119#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 119#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
120#define TIF_MEMDIE 18 120#define TIF_MEMDIE 18
121#define TIF_FREEZE 19
121#define TIF_SYSCALL_TRACE 31 /* syscall trace active */ 122#define TIF_SYSCALL_TRACE 31 /* syscall trace active */
122 123
123#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 124#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
@@ -129,6 +130,7 @@ register struct thread_info *__current_thread_info __asm__("$28");
129#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) 130#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
130#define _TIF_USEDFPU (1<<TIF_USEDFPU) 131#define _TIF_USEDFPU (1<<TIF_USEDFPU)
131#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 132#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
133#define _TIF_FREEZE (1<<TIF_FREEZE)
132 134
133/* work to do on interrupt/exception return */ 135/* work to do on interrupt/exception return */
134#define _TIF_WORK_MASK (0x0000ffef & ~_TIF_SECCOMP) 136#define _TIF_WORK_MASK (0x0000ffef & ~_TIF_SECCOMP)
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
index 1cdd4eeb2f73..c12ebc53ef31 100644
--- a/include/asm-mips/uaccess.h
+++ b/include/asm-mips/uaccess.h
@@ -488,7 +488,8 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);
488}) 488})
489 489
490/* 490/*
491 * __copy_from_user: - Copy a block of data from user space, with less checking. * @to: Destination address, in kernel space. 491 * __copy_from_user: - Copy a block of data from user space, with less checking.
492 * @to: Destination address, in kernel space.
492 * @from: Source address, in user space. 493 * @from: Source address, in user space.
493 * @n: Number of bytes to copy. 494 * @n: Number of bytes to copy.
494 * 495 *
diff --git a/include/asm-mips/vr41xx/cmbvr4133.h b/include/asm-mips/vr41xx/cmbvr4133.h
index 9490ade58b46..42300037d593 100644
--- a/include/asm-mips/vr41xx/cmbvr4133.h
+++ b/include/asm-mips/vr41xx/cmbvr4133.h
@@ -35,8 +35,8 @@
35#define CMBVR41XX_INTD_IRQ GIU_IRQ(CMBVR41XX_INTD_PIN) 35#define CMBVR41XX_INTD_IRQ GIU_IRQ(CMBVR41XX_INTD_PIN)
36#define CMBVR41XX_INTE_IRQ GIU_IRQ(CMBVR41XX_INTE_PIN) 36#define CMBVR41XX_INTE_IRQ GIU_IRQ(CMBVR41XX_INTE_PIN)
37 37
38#define I8259_IRQ_BASE 72 38#define I8259A_IRQ_BASE 72
39#define I8259_IRQ(x) (I8259_IRQ_BASE + (x)) 39#define I8259_IRQ(x) (I8259A_IRQ_BASE + (x))
40#define TIMER_IRQ I8259_IRQ(0) 40#define TIMER_IRQ I8259_IRQ(0)
41#define KEYBOARD_IRQ I8259_IRQ(1) 41#define KEYBOARD_IRQ I8259_IRQ(1)
42#define I8259_SLAVE_IRQ I8259_IRQ(2) 42#define I8259_SLAVE_IRQ I8259_IRQ(2)
@@ -52,6 +52,5 @@
52#define AUX_IRQ I8259_IRQ(12) 52#define AUX_IRQ I8259_IRQ(12)
53#define IDE_PRIMARY_IRQ I8259_IRQ(14) 53#define IDE_PRIMARY_IRQ I8259_IRQ(14)
54#define IDE_SECONDARY_IRQ I8259_IRQ(15) 54#define IDE_SECONDARY_IRQ I8259_IRQ(15)
55#define I8259_IRQ_LAST IDE_SECONDARY_IRQ
56 55
57#endif /* __NEC_CMBVR4133_H */ 56#endif /* __NEC_CMBVR4133_H */
diff --git a/include/asm-mips/war.h b/include/asm-mips/war.h
index 3ac146c019c9..13a3502eef44 100644
--- a/include/asm-mips/war.h
+++ b/include/asm-mips/war.h
@@ -76,7 +76,7 @@
76/* 76/*
77 * But the RM200C seems to have been shipped only with V2.0 R4600s 77 * But the RM200C seems to have been shipped only with V2.0 R4600s
78 */ 78 */
79#ifdef CONFIG_SNI_RM200_PCI 79#ifdef CONFIG_SNI_RM
80 80
81#define R4600_V2_HIT_CACHEOP_WAR 1 81#define R4600_V2_HIT_CACHEOP_WAR 1
82 82
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-26 21:44:26 -0500