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-rw-r--r--include/asm-mips/atomic.h4
-rw-r--r--include/asm-mips/cpu-info.h4
-rw-r--r--include/asm-mips/gic.h6
-rw-r--r--include/asm-mips/lasat/serial.h4
-rw-r--r--include/asm-mips/mach-au1x00/au1000.h3
-rw-r--r--include/asm-mips/mach-au1x00/au1xxx_dbdma.h1
-rw-r--r--include/asm-mips/mipsregs.h3
-rw-r--r--include/asm-mips/pgtable-bits.h2
-rw-r--r--include/asm-mips/pgtable.h3
-rw-r--r--include/asm-mips/rtlx.h2
10 files changed, 18 insertions, 14 deletions
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index a798d6299a79..1232be3885b0 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -283,10 +283,10 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
283 " beqz %0, 2f \n" 283 " beqz %0, 2f \n"
284 " subu %0, %1, %3 \n" 284 " subu %0, %1, %3 \n"
285 " .set reorder \n" 285 " .set reorder \n"
286 "1: \n"
287 " .subsection 2 \n" 286 " .subsection 2 \n"
288 "2: b 1b \n" 287 "2: b 1b \n"
289 " .previous \n" 288 " .previous \n"
289 "1: \n"
290 " .set mips0 \n" 290 " .set mips0 \n"
291 : "=&r" (result), "=&r" (temp), "=m" (v->counter) 291 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
292 : "Ir" (i), "m" (v->counter) 292 : "Ir" (i), "m" (v->counter)
@@ -664,10 +664,10 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
664 " beqz %0, 2f \n" 664 " beqz %0, 2f \n"
665 " dsubu %0, %1, %3 \n" 665 " dsubu %0, %1, %3 \n"
666 " .set reorder \n" 666 " .set reorder \n"
667 "1: \n"
668 " .subsection 2 \n" 667 " .subsection 2 \n"
669 "2: b 1b \n" 668 "2: b 1b \n"
670 " .previous \n" 669 " .previous \n"
670 "1: \n"
671 " .set mips0 \n" 671 " .set mips0 \n"
672 : "=&r" (result), "=&r" (temp), "=m" (v->counter) 672 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
673 : "Ir" (i), "m" (v->counter) 673 : "Ir" (i), "m" (v->counter)
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h
index 0c5a358863f3..2de73dbb2e9e 100644
--- a/include/asm-mips/cpu-info.h
+++ b/include/asm-mips/cpu-info.h
@@ -56,7 +56,7 @@ struct cpuinfo_mips {
56 struct cache_desc tcache; /* Tertiary/split secondary cache */ 56 struct cache_desc tcache; /* Tertiary/split secondary cache */
57 int srsets; /* Shadow register sets */ 57 int srsets; /* Shadow register sets */
58 int core; /* physical core number */ 58 int core; /* physical core number */
59#if defined(CONFIG_MIPS_MT_SMTC) 59#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)
60 /* 60 /*
61 * In the MIPS MT "SMTC" model, each TC is considered 61 * In the MIPS MT "SMTC" model, each TC is considered
62 * to be a "CPU" for the purposes of scheduling, but 62 * to be a "CPU" for the purposes of scheduling, but
@@ -64,7 +64,7 @@ struct cpuinfo_mips {
64 * to all TCs within the same VPE. 64 * to all TCs within the same VPE.
65 */ 65 */
66 int vpe_id; /* Virtual Processor number */ 66 int vpe_id; /* Virtual Processor number */
67#endif /* CONFIG_MIPS_MT */ 67#endif
68#ifdef CONFIG_MIPS_MT_SMTC 68#ifdef CONFIG_MIPS_MT_SMTC
69 int tc_id; /* Thread Context number */ 69 int tc_id; /* Thread Context number */
70#endif 70#endif
diff --git a/include/asm-mips/gic.h b/include/asm-mips/gic.h
index 01b2f92dc33d..954807d9d66a 100644
--- a/include/asm-mips/gic.h
+++ b/include/asm-mips/gic.h
@@ -24,8 +24,8 @@
24 24
25#define MSK(n) ((1 << (n)) - 1) 25#define MSK(n) ((1 << (n)) - 1)
26#define REG32(addr) (*(volatile unsigned int *) (addr)) 26#define REG32(addr) (*(volatile unsigned int *) (addr))
27#define REG(base, offs) REG32((unsigned int)(base) + offs##_##OFS) 27#define REG(base, offs) REG32((unsigned long)(base) + offs##_##OFS)
28#define REGP(base, phys) REG32((unsigned int)(base) + (phys)) 28#define REGP(base, phys) REG32((unsigned long)(base) + (phys))
29 29
30/* Accessors */ 30/* Accessors */
31#define GIC_REG(segment, offset) \ 31#define GIC_REG(segment, offset) \
@@ -330,7 +330,7 @@
330 330
331#define GIC_SH_RMASK_OFS 0x0300 331#define GIC_SH_RMASK_OFS 0x0300
332#define GIC_CLR_INTR_MASK(intr, val) \ 332#define GIC_CLR_INTR_MASK(intr, val) \
333 GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_RMASK_OFS + 4 + (((((intr) / 32) ^ 1) - 1) * 4)), ((val) << ((intr) % 32)) 333 GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_RMASK_OFS + 4 + (((((intr) / 32) ^ 1) - 1) * 4)), ((val) << ((intr) % 32)))
334 334
335/* Register Map for Local Section */ 335/* Register Map for Local Section */
336#define GIC_VPE_CTL_OFS 0x0000 336#define GIC_VPE_CTL_OFS 0x0000
diff --git a/include/asm-mips/lasat/serial.h b/include/asm-mips/lasat/serial.h
index bafe68b10614..1c37d70579b8 100644
--- a/include/asm-mips/lasat/serial.h
+++ b/include/asm-mips/lasat/serial.h
@@ -4,10 +4,10 @@
4#define LASAT_BASE_BAUD_100 (7372800 / 16) 4#define LASAT_BASE_BAUD_100 (7372800 / 16)
5#define LASAT_UART_REGS_BASE_100 0x1c8b0000 5#define LASAT_UART_REGS_BASE_100 0x1c8b0000
6#define LASAT_UART_REGS_SHIFT_100 2 6#define LASAT_UART_REGS_SHIFT_100 2
7#define LASATINT_UART_100 8 7#define LASATINT_UART_100 16
8 8
9/* * LASAT 200 boards serial configuration */ 9/* * LASAT 200 boards serial configuration */
10#define LASAT_BASE_BAUD_200 (100000000 / 16 / 12) 10#define LASAT_BASE_BAUD_200 (100000000 / 16 / 12)
11#define LASAT_UART_REGS_BASE_200 (Vrc5074_PHYS_BASE + 0x0300) 11#define LASAT_UART_REGS_BASE_200 (Vrc5074_PHYS_BASE + 0x0300)
12#define LASAT_UART_REGS_SHIFT_200 3 12#define LASAT_UART_REGS_SHIFT_200 3
13#define LASATINT_UART_200 13 13#define LASATINT_UART_200 21
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 363a14ee0ae5..0d302bad4492 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -615,6 +615,7 @@ enum soc_au1500_ints {
615 AU1000_RTC_MATCH1_INT, 615 AU1000_RTC_MATCH1_INT,
616 AU1000_RTC_MATCH2_INT, 616 AU1000_RTC_MATCH2_INT,
617 AU1500_PCI_ERR_INT, 617 AU1500_PCI_ERR_INT,
618 AU1500_RESERVED_INT,
618 AU1000_USB_DEV_REQ_INT, 619 AU1000_USB_DEV_REQ_INT,
619 AU1000_USB_DEV_SUS_INT, 620 AU1000_USB_DEV_SUS_INT,
620 AU1000_USB_HOST_INT, 621 AU1000_USB_HOST_INT,
@@ -1036,7 +1037,7 @@ enum soc_au1200_ints {
1036#define USBD_INTSTAT 0xB020001C 1037#define USBD_INTSTAT 0xB020001C
1037# define USBDEV_INT_SOF (1 << 12) 1038# define USBDEV_INT_SOF (1 << 12)
1038# define USBDEV_INT_HF_BIT 6 1039# define USBDEV_INT_HF_BIT 6
1039# define USBDEV_INT_HF_MASK 0x3f << USBDEV_INT_HF_BIT) 1040# define USBDEV_INT_HF_MASK (0x3f << USBDEV_INT_HF_BIT)
1040# define USBDEV_INT_CMPLT_BIT 0 1041# define USBDEV_INT_CMPLT_BIT 0
1041# define USBDEV_INT_CMPLT_MASK (0x3f << USBDEV_INT_CMPLT_BIT) 1042# define USBDEV_INT_CMPLT_MASK (0x3f << USBDEV_INT_CMPLT_BIT)
1042#define USBD_CONFIG 0xB0200020 1043#define USBD_CONFIG 0xB0200020
diff --git a/include/asm-mips/mach-au1x00/au1xxx_dbdma.h b/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
index ad17d7ce516a..44a67bf05dc1 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
@@ -355,6 +355,7 @@ void au1xxx_dbdma_dump(u32 chanid);
355u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr); 355u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr);
356 356
357u32 au1xxx_ddma_add_device(dbdev_tab_t *dev); 357u32 au1xxx_ddma_add_device(dbdev_tab_t *dev);
358extern void au1xxx_ddma_del_device(u32 devid);
358void *au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp); 359void *au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp);
359 360
360/* 361/*
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index aa17f658f73c..a46f8e258e6b 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -765,6 +765,9 @@ do { \
765#define read_c0_index() __read_32bit_c0_register($0, 0) 765#define read_c0_index() __read_32bit_c0_register($0, 0)
766#define write_c0_index(val) __write_32bit_c0_register($0, 0, val) 766#define write_c0_index(val) __write_32bit_c0_register($0, 0, val)
767 767
768#define read_c0_random() __read_32bit_c0_register($1, 0)
769#define write_c0_random(val) __write_32bit_c0_register($1, 0, val)
770
768#define read_c0_entrylo0() __read_ulong_c0_register($2, 0) 771#define read_c0_entrylo0() __read_ulong_c0_register($2, 0)
769#define write_c0_entrylo0(val) __write_ulong_c0_register($2, 0, val) 772#define write_c0_entrylo0(val) __write_ulong_c0_register($2, 0, val)
770 773
diff --git a/include/asm-mips/pgtable-bits.h b/include/asm-mips/pgtable-bits.h
index 60e2f9338fcd..51b34a48c84a 100644
--- a/include/asm-mips/pgtable-bits.h
+++ b/include/asm-mips/pgtable-bits.h
@@ -134,6 +134,4 @@
134 134
135#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK) 135#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK)
136 136
137#define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT>>_CACHE_SHIFT)
138
139#endif /* _ASM_PGTABLE_BITS_H */ 137#endif /* _ASM_PGTABLE_BITS_H */
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index 2f597eea4448..6a0edf72ffbc 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -239,9 +239,10 @@ static inline pte_t pte_mkdirty(pte_t pte)
239static inline pte_t pte_mkyoung(pte_t pte) 239static inline pte_t pte_mkyoung(pte_t pte)
240{ 240{
241 pte.pte_low |= _PAGE_ACCESSED; 241 pte.pte_low |= _PAGE_ACCESSED;
242 if (pte.pte_low & _PAGE_READ) 242 if (pte.pte_low & _PAGE_READ) {
243 pte.pte_low |= _PAGE_SILENT_READ; 243 pte.pte_low |= _PAGE_SILENT_READ;
244 pte.pte_high |= _PAGE_SILENT_READ; 244 pte.pte_high |= _PAGE_SILENT_READ;
245 }
245 return pte; 246 return pte;
246} 247}
247#else 248#else
diff --git a/include/asm-mips/rtlx.h b/include/asm-mips/rtlx.h
index 20b666022dcb..4ca3063ed2ce 100644
--- a/include/asm-mips/rtlx.h
+++ b/include/asm-mips/rtlx.h
@@ -3,7 +3,7 @@
3 * 3 *
4 */ 4 */
5 5
6#ifndef __ASM_RTLX_H 6#ifndef __ASM_RTLX_H_
7#define __ASM_RTLX_H_ 7#define __ASM_RTLX_H_
8 8
9#include <irq.h> 9#include <irq.h>