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-rw-r--r--include/asm-mips/cpu.h6
-rw-r--r--include/asm-mips/gcc/sgidefs.h17
-rw-r--r--include/asm-mips/mach-generic/timex.h11
-rw-r--r--include/asm-mips/mach-rm200/timex.h13
-rw-r--r--include/asm-mips/mman.h20
-rw-r--r--include/asm-mips/r4kcache.h74
-rw-r--r--include/asm-mips/uaccess.h9
-rw-r--r--include/asm-mips/unistd.h10
8 files changed, 80 insertions, 80 deletions
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 934e063e79f1..818b9a97e214 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -204,9 +204,9 @@
204 */ 204 */
205#define MIPS_CPU_ISA_I 0x00000001 205#define MIPS_CPU_ISA_I 0x00000001
206#define MIPS_CPU_ISA_II 0x00000002 206#define MIPS_CPU_ISA_II 0x00000002
207#define MIPS_CPU_ISA_III 0x00000003 207#define MIPS_CPU_ISA_III 0x00000004
208#define MIPS_CPU_ISA_IV 0x00000004 208#define MIPS_CPU_ISA_IV 0x00000008
209#define MIPS_CPU_ISA_V 0x00000005 209#define MIPS_CPU_ISA_V 0x00000010
210#define MIPS_CPU_ISA_M32R1 0x00000020 210#define MIPS_CPU_ISA_M32R1 0x00000020
211#define MIPS_CPU_ISA_M32R2 0x00000040 211#define MIPS_CPU_ISA_M32R2 0x00000040
212#define MIPS_CPU_ISA_M64R1 0x00000080 212#define MIPS_CPU_ISA_M64R1 0x00000080
diff --git a/include/asm-mips/gcc/sgidefs.h b/include/asm-mips/gcc/sgidefs.h
deleted file mode 100644
index 05994371a2af..000000000000
--- a/include/asm-mips/gcc/sgidefs.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * include/sgidefs.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1996 by Ralf Baechle
9 *
10 * This file is here to satisfy GCC's expectations.
11 */
12#ifndef __SGIDEFS_H
13#define __SGIDEFS_H
14
15#include <asm/sgidefs.h>
16
17#endif /* __SGIDEFS_H */
diff --git a/include/asm-mips/mach-generic/timex.h b/include/asm-mips/mach-generic/timex.h
index c6a2e5f0574a..48b4cfaa0d50 100644
--- a/include/asm-mips/mach-generic/timex.h
+++ b/include/asm-mips/mach-generic/timex.h
@@ -3,20 +3,11 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2003 by Ralf Baechle 6 * Copyright (C) 2003, 2005 by Ralf Baechle
7 */ 7 */
8#ifndef __ASM_MACH_GENERIC_TIMEX_H 8#ifndef __ASM_MACH_GENERIC_TIMEX_H
9#define __ASM_MACH_GENERIC_TIMEX_H 9#define __ASM_MACH_GENERIC_TIMEX_H
10 10
11#include <linux/config.h>
12
13/*
14 * Last remaining user of the i8254 PIC, will be converted, too ...
15 */
16#ifdef CONFIG_SNI_RM200_PCI
17#define CLOCK_TICK_RATE 1193182
18#else
19#define CLOCK_TICK_RATE 500000 11#define CLOCK_TICK_RATE 500000
20#endif
21 12
22#endif /* __ASM_MACH_GENERIC_TIMEX_H */ 13#endif /* __ASM_MACH_GENERIC_TIMEX_H */
diff --git a/include/asm-mips/mach-rm200/timex.h b/include/asm-mips/mach-rm200/timex.h
new file mode 100644
index 000000000000..11ff6cb0f214
--- /dev/null
+++ b/include/asm-mips/mach-rm200/timex.h
@@ -0,0 +1,13 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003, 2005 by Ralf Baechle
7 */
8#ifndef __ASM_MACH_RM200_TIMEX_H
9#define __ASM_MACH_RM200_TIMEX_H
10
11#define CLOCK_TICK_RATE 1193182
12
13#endif /* __ASM_MACH_RM200_TIMEX_H */
diff --git a/include/asm-mips/mman.h b/include/asm-mips/mman.h
index dd17c8bd62a1..046cf686bee7 100644
--- a/include/asm-mips/mman.h
+++ b/include/asm-mips/mman.h
@@ -60,15 +60,19 @@
60#define MCL_CURRENT 1 /* lock all current mappings */ 60#define MCL_CURRENT 1 /* lock all current mappings */
61#define MCL_FUTURE 2 /* lock all future mappings */ 61#define MCL_FUTURE 2 /* lock all future mappings */
62 62
63#define MADV_NORMAL 0x0 /* default page-in behavior */ 63#define MADV_NORMAL 0 /* no further special treatment */
64#define MADV_RANDOM 0x1 /* page-in minimum required */ 64#define MADV_RANDOM 1 /* expect random page references */
65#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */ 65#define MADV_SEQUENTIAL 2 /* expect sequential page references */
66#define MADV_WILLNEED 0x3 /* pre-fault pages */ 66#define MADV_WILLNEED 3 /* will need these pages */
67#define MADV_DONTNEED 0x4 /* discard these pages */ 67#define MADV_DONTNEED 4 /* don't need these pages */
68#define MADV_REMOVE 0x5 /* remove these pages & resources */ 68
69/* common parameters: try to keep these consistent across architectures */
70#define MADV_REMOVE 9 /* remove these pages & resources */
71#define MADV_DONTFORK 10 /* don't inherit across fork */
72#define MADV_DOFORK 11 /* do inherit across fork */
69 73
70/* compatibility flags */ 74/* compatibility flags */
71#define MAP_ANON MAP_ANONYMOUS 75#define MAP_ANON MAP_ANONYMOUS
72#define MAP_FILE 0 76#define MAP_FILE 0
73 77
74#endif /* _ASM_MMAN_H */ 78#endif /* _ASM_MMAN_H */
diff --git a/include/asm-mips/r4kcache.h b/include/asm-mips/r4kcache.h
index cc53196efa40..9632c27dad15 100644
--- a/include/asm-mips/r4kcache.h
+++ b/include/asm-mips/r4kcache.h
@@ -14,6 +14,7 @@
14 14
15#include <asm/asm.h> 15#include <asm/asm.h>
16#include <asm/cacheops.h> 16#include <asm/cacheops.h>
17#include <asm/cpu-features.h>
17 18
18/* 19/*
19 * This macro return a properly sign-extended address suitable as base address 20 * This macro return a properly sign-extended address suitable as base address
@@ -78,22 +79,25 @@ static inline void flush_scache_line(unsigned long addr)
78 cache_op(Hit_Writeback_Inv_SD, addr); 79 cache_op(Hit_Writeback_Inv_SD, addr);
79} 80}
80 81
82#define protected_cache_op(op,addr) \
83 __asm__ __volatile__( \
84 " .set push \n" \
85 " .set noreorder \n" \
86 " .set mips3 \n" \
87 "1: cache %0, (%1) \n" \
88 "2: .set pop \n" \
89 " .section __ex_table,\"a\" \n" \
90 " "STR(PTR)" 1b, 2b \n" \
91 " .previous" \
92 : \
93 : "i" (op), "r" (addr))
94
81/* 95/*
82 * The next two are for badland addresses like signal trampolines. 96 * The next two are for badland addresses like signal trampolines.
83 */ 97 */
84static inline void protected_flush_icache_line(unsigned long addr) 98static inline void protected_flush_icache_line(unsigned long addr)
85{ 99{
86 __asm__ __volatile__( 100 protected_cache_op(Hit_Invalidate_I, addr);
87 " .set push \n"
88 " .set noreorder \n"
89 " .set mips3 \n"
90 "1: cache %0, (%1) \n"
91 "2: .set pop \n"
92 " .section __ex_table,\"a\" \n"
93 " "STR(PTR)" 1b, 2b \n"
94 " .previous"
95 :
96 : "i" (Hit_Invalidate_I), "r" (addr));
97} 101}
98 102
99/* 103/*
@@ -104,32 +108,12 @@ static inline void protected_flush_icache_line(unsigned long addr)
104 */ 108 */
105static inline void protected_writeback_dcache_line(unsigned long addr) 109static inline void protected_writeback_dcache_line(unsigned long addr)
106{ 110{
107 __asm__ __volatile__( 111 protected_cache_op(Hit_Writeback_Inv_D, addr);
108 " .set push \n"
109 " .set noreorder \n"
110 " .set mips3 \n"
111 "1: cache %0, (%1) \n"
112 "2: .set pop \n"
113 " .section __ex_table,\"a\" \n"
114 " "STR(PTR)" 1b, 2b \n"
115 " .previous"
116 :
117 : "i" (Hit_Writeback_Inv_D), "r" (addr));
118} 112}
119 113
120static inline void protected_writeback_scache_line(unsigned long addr) 114static inline void protected_writeback_scache_line(unsigned long addr)
121{ 115{
122 __asm__ __volatile__( 116 protected_cache_op(Hit_Writeback_Inv_SD, addr);
123 " .set push \n"
124 " .set noreorder \n"
125 " .set mips3 \n"
126 "1: cache %0, (%1) \n"
127 "2: .set pop \n"
128 " .section __ex_table,\"a\" \n"
129 " "STR(PTR)" 1b, 2b \n"
130 " .previous"
131 :
132 : "i" (Hit_Writeback_Inv_SD), "r" (addr));
133} 117}
134 118
135/* 119/*
@@ -295,4 +279,28 @@ __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64)
295__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64) 279__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64)
296__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128) 280__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128)
297 281
282/* build blast_xxx_range, protected_blast_xxx_range */
283#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot) \
284static inline void prot##blast_##pfx##cache##_range(unsigned long start, \
285 unsigned long end) \
286{ \
287 unsigned long lsize = cpu_##desc##_line_size(); \
288 unsigned long addr = start & ~(lsize - 1); \
289 unsigned long aend = (end - 1) & ~(lsize - 1); \
290 while (1) { \
291 prot##cache_op(hitop, addr); \
292 if (addr == aend) \
293 break; \
294 addr += lsize; \
295 } \
296}
297
298__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_)
299__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_)
300__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_)
301__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, )
302__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, )
303/* blast_inv_dcache_range */
304__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, )
305
298#endif /* _ASM_R4KCACHE_H */ 306#endif /* _ASM_R4KCACHE_H */
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
index 91d813a37823..b96f3e0f3933 100644
--- a/include/asm-mips/uaccess.h
+++ b/include/asm-mips/uaccess.h
@@ -233,7 +233,7 @@ do { \
233#define __get_user_check(x,ptr,size) \ 233#define __get_user_check(x,ptr,size) \
234({ \ 234({ \
235 long __gu_err = -EFAULT; \ 235 long __gu_err = -EFAULT; \
236 const void __user * __gu_ptr = (ptr); \ 236 const __typeof__(*(ptr)) __user * __gu_ptr = (ptr); \
237 \ 237 \
238 if (likely(access_ok(VERIFY_READ, __gu_ptr, size))) \ 238 if (likely(access_ok(VERIFY_READ, __gu_ptr, size))) \
239 __get_user_common((x), size, __gu_ptr); \ 239 __get_user_common((x), size, __gu_ptr); \
@@ -258,7 +258,7 @@ do { \
258 : "=r" (__gu_err), "=r" (__gu_tmp) \ 258 : "=r" (__gu_err), "=r" (__gu_tmp) \
259 : "0" (0), "o" (__m(addr)), "i" (-EFAULT)); \ 259 : "0" (0), "o" (__m(addr)), "i" (-EFAULT)); \
260 \ 260 \
261 (val) = (__typeof__(val)) __gu_tmp; \ 261 (val) = (__typeof__(*(addr))) __gu_tmp; \
262} 262}
263 263
264/* 264/*
@@ -266,6 +266,8 @@ do { \
266 */ 266 */
267#define __get_user_asm_ll32(val, addr) \ 267#define __get_user_asm_ll32(val, addr) \
268{ \ 268{ \
269 unsigned long long __gu_tmp; \
270 \
269 __asm__ __volatile__( \ 271 __asm__ __volatile__( \
270 "1: lw %1, (%3) \n" \ 272 "1: lw %1, (%3) \n" \
271 "2: lw %D1, 4(%3) \n" \ 273 "2: lw %D1, 4(%3) \n" \
@@ -280,8 +282,9 @@ do { \
280 " " __UA_ADDR " 1b, 4b \n" \ 282 " " __UA_ADDR " 1b, 4b \n" \
281 " " __UA_ADDR " 2b, 4b \n" \ 283 " " __UA_ADDR " 2b, 4b \n" \
282 " .previous \n" \ 284 " .previous \n" \
283 : "=r" (__gu_err), "=&r" (val) \ 285 : "=r" (__gu_err), "=&r" (__gu_tmp) \
284 : "0" (0), "r" (addr), "i" (-EFAULT)); \ 286 : "0" (0), "r" (addr), "i" (-EFAULT)); \
287 (val) = (__typeof__(*(addr))) __gu_tmp; \
285} 288}
286 289
287/* 290/*
diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h
index e7ff9b187783..b5c78a4a0192 100644
--- a/include/asm-mips/unistd.h
+++ b/include/asm-mips/unistd.h
@@ -313,7 +313,7 @@
313#define __NR_mknodat (__NR_Linux + 290) 313#define __NR_mknodat (__NR_Linux + 290)
314#define __NR_fchownat (__NR_Linux + 291) 314#define __NR_fchownat (__NR_Linux + 291)
315#define __NR_futimesat (__NR_Linux + 292) 315#define __NR_futimesat (__NR_Linux + 292)
316#define __NR_newfstatat (__NR_Linux + 293) 316#define __NR_fstatat (__NR_Linux + 293)
317#define __NR_unlinkat (__NR_Linux + 294) 317#define __NR_unlinkat (__NR_Linux + 294)
318#define __NR_renameat (__NR_Linux + 295) 318#define __NR_renameat (__NR_Linux + 295)
319#define __NR_linkat (__NR_Linux + 296) 319#define __NR_linkat (__NR_Linux + 296)
@@ -593,7 +593,7 @@
593#define __NR_mknodat (__NR_Linux + 249) 593#define __NR_mknodat (__NR_Linux + 249)
594#define __NR_fchownat (__NR_Linux + 250) 594#define __NR_fchownat (__NR_Linux + 250)
595#define __NR_futimesat (__NR_Linux + 251) 595#define __NR_futimesat (__NR_Linux + 251)
596#define __NR_newfstatat (__NR_Linux + 252) 596#define __NR_fstatat (__NR_Linux + 252)
597#define __NR_unlinkat (__NR_Linux + 253) 597#define __NR_unlinkat (__NR_Linux + 253)
598#define __NR_renameat (__NR_Linux + 254) 598#define __NR_renameat (__NR_Linux + 254)
599#define __NR_linkat (__NR_Linux + 255) 599#define __NR_linkat (__NR_Linux + 255)
@@ -877,7 +877,7 @@
877#define __NR_mknodat (__NR_Linux + 253) 877#define __NR_mknodat (__NR_Linux + 253)
878#define __NR_fchownat (__NR_Linux + 254) 878#define __NR_fchownat (__NR_Linux + 254)
879#define __NR_futimesat (__NR_Linux + 255) 879#define __NR_futimesat (__NR_Linux + 255)
880#define __NR_newfstatat (__NR_Linux + 256) 880#define __NR_fstatat (__NR_Linux + 256)
881#define __NR_unlinkat (__NR_Linux + 257) 881#define __NR_unlinkat (__NR_Linux + 257)
882#define __NR_renameat (__NR_Linux + 258) 882#define __NR_renameat (__NR_Linux + 258)
883#define __NR_linkat (__NR_Linux + 259) 883#define __NR_linkat (__NR_Linux + 259)
@@ -1184,10 +1184,8 @@ type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \
1184#define __ARCH_WANT_SYS_SIGPENDING 1184#define __ARCH_WANT_SYS_SIGPENDING
1185#define __ARCH_WANT_SYS_SIGPROCMASK 1185#define __ARCH_WANT_SYS_SIGPROCMASK
1186#define __ARCH_WANT_SYS_RT_SIGACTION 1186#define __ARCH_WANT_SYS_RT_SIGACTION
1187# ifndef __mips64
1188# define __ARCH_WANT_STAT64
1189# endif
1190# ifdef CONFIG_32BIT 1187# ifdef CONFIG_32BIT
1188# define __ARCH_WANT_STAT64
1191# define __ARCH_WANT_SYS_TIME 1189# define __ARCH_WANT_SYS_TIME
1192# endif 1190# endif
1193# ifdef CONFIG_MIPS32_O32 1191# ifdef CONFIG_MIPS32_O32
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-20 12:09:26 -0500