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-rw-r--r--include/asm-mips/vr41xx/giu.h69
-rw-r--r--include/asm-mips/vr41xx/vr41xx.h35
2 files changed, 69 insertions, 35 deletions
diff --git a/include/asm-mips/vr41xx/giu.h b/include/asm-mips/vr41xx/giu.h
new file mode 100644
index 000000000000..8590885a7638
--- /dev/null
+++ b/include/asm-mips/vr41xx/giu.h
@@ -0,0 +1,69 @@
1/*
2 * Include file for NEC VR4100 series General-purpose I/O Unit.
3 *
4 * Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __NEC_VR41XX_GIU_H
21#define __NEC_VR41XX_GIU_H
22
23typedef enum {
24 IRQ_TRIGGER_LEVEL,
25 IRQ_TRIGGER_EDGE,
26 IRQ_TRIGGER_EDGE_FALLING,
27 IRQ_TRIGGER_EDGE_RISING,
28} irq_trigger_t;
29
30typedef enum {
31 IRQ_SIGNAL_THROUGH,
32 IRQ_SIGNAL_HOLD,
33} irq_signal_t;
34
35extern void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, irq_signal_t signal);
36
37typedef enum {
38 IRQ_LEVEL_LOW,
39 IRQ_LEVEL_HIGH,
40} irq_level_t;
41
42extern void vr41xx_set_irq_level(unsigned int pin, irq_level_t level);
43
44typedef enum {
45 GPIO_DATA_LOW,
46 GPIO_DATA_HIGH,
47 GPIO_DATA_INVAL,
48} gpio_data_t;
49
50extern gpio_data_t vr41xx_gpio_get_pin(unsigned int pin);
51extern int vr41xx_gpio_set_pin(unsigned int pin, gpio_data_t data);
52
53typedef enum {
54 GPIO_INPUT,
55 GPIO_OUTPUT,
56 GPIO_OUTPUT_DISABLE,
57} gpio_direction_t;
58
59extern int vr41xx_gpio_set_direction(unsigned int pin, gpio_direction_t dir);
60
61typedef enum {
62 GPIO_PULL_DOWN,
63 GPIO_PULL_UP,
64 GPIO_PULL_DISABLE,
65} gpio_pull_t;
66
67extern int vr41xx_gpio_pullupdown(unsigned int pin, gpio_pull_t pull);
68
69#endif /* __NEC_VR41XX_GIU_H */
diff --git a/include/asm-mips/vr41xx/vr41xx.h b/include/asm-mips/vr41xx/vr41xx.h
index ad0d1ea144f0..7d41e44463f9 100644
--- a/include/asm-mips/vr41xx/vr41xx.h
+++ b/include/asm-mips/vr41xx/vr41xx.h
@@ -126,7 +126,6 @@ extern void vr41xx_mask_clock(vr41xx_clock_t clock);
126#define GIU_IRQ_BASE 40 126#define GIU_IRQ_BASE 40
127#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */ 127#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */
128#define GIU_IRQ_LAST GIU_IRQ(31) 128#define GIU_IRQ_LAST GIU_IRQ(31)
129#define GIU_IRQ_TO_PIN(x) ((x) - GIU_IRQ_BASE) /* Pin 0-31 */
130 129
131extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign); 130extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign);
132extern int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq)); 131extern int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq));
@@ -197,38 +196,4 @@ extern void vr41xx_disable_csiint(uint16_t mask);
197extern void vr41xx_enable_bcuint(void); 196extern void vr41xx_enable_bcuint(void);
198extern void vr41xx_disable_bcuint(void); 197extern void vr41xx_disable_bcuint(void);
199 198
200/*
201 * General-Purpose I/O Unit
202 */
203enum {
204 TRIGGER_LEVEL,
205 TRIGGER_EDGE,
206 TRIGGER_EDGE_FALLING,
207 TRIGGER_EDGE_RISING
208};
209
210enum {
211 SIGNAL_THROUGH,
212 SIGNAL_HOLD
213};
214
215extern void vr41xx_set_irq_trigger(int pin, int trigger, int hold);
216
217enum {
218 LEVEL_LOW,
219 LEVEL_HIGH
220};
221
222extern void vr41xx_set_irq_level(int pin, int level);
223
224enum {
225 PIO_INPUT,
226 PIO_OUTPUT
227};
228
229enum {
230 DATA_LOW,
231 DATA_HIGH
232};
233
234#endif /* __NEC_VR41XX_H */ 199#endif /* __NEC_VR41XX_H */